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This can lead to spurious IRQ_NONE returns when DMA interrupts are pending but m_irq is zero. Move the DMA TX/RX status register reads to the beginning of the ISR, right after reading m_irq. Update the early return condition to check all three status registers (m_irq, dma_tx_status, dma_rx_status) before returning IRQ_NONE. Signed-off-by: Praveen Talari Reviewed-by: Konrad Dybcio --- drivers/spi/spi-geni-qcom.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c index 43ce47f2454c..69d26e23628c 100644 --- a/drivers/spi/spi-geni-qcom.c +++ b/drivers/spi/spi-geni-qcom.c @@ -906,10 +906,13 @@ static irqreturn_t geni_spi_isr(int irq, void *data) struct spi_controller *spi =3D data; struct spi_geni_master *mas =3D spi_controller_get_devdata(spi); struct geni_se *se =3D &mas->se; - u32 m_irq; + u32 m_irq, dma_tx_status, dma_rx_status; =20 m_irq =3D readl(se->base + SE_GENI_M_IRQ_STATUS); - if (!m_irq) + dma_tx_status =3D readl_relaxed(se->base + SE_DMA_TX_IRQ_STAT); + dma_rx_status =3D readl_relaxed(se->base + SE_DMA_RX_IRQ_STAT); + + if (!m_irq && !dma_tx_status && !dma_rx_status) return IRQ_NONE; =20 if (m_irq & (M_CMD_OVERRUN_EN | M_ILLEGAL_CMD_EN | M_CMD_FAILURE_EN | @@ -957,8 +960,6 @@ static irqreturn_t geni_spi_isr(int irq, void *data) } } else if (mas->cur_xfer_mode =3D=3D GENI_SE_DMA) { const struct spi_transfer *xfer =3D mas->cur_xfer; - u32 dma_tx_status =3D readl_relaxed(se->base + SE_DMA_TX_IRQ_STAT); - u32 dma_rx_status =3D readl_relaxed(se->base + SE_DMA_RX_IRQ_STAT); =20 if (dma_tx_status) writel(dma_tx_status, se->base + SE_DMA_TX_IRQ_CLR); --- base-commit: 5c9e55fecf9365890c64f14761a80f9413a3b1d1 change-id: 20260313-spi-geni-qcom-fix-dma-irq-handling-5f8a7755cfa4 Best regards, --=20 Praveen Talari