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Fri, 13 Mar 2026 06:20:09 -0700 (PDT) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82a0724407csm5775254b3a.8.2026.03.13.06.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 06:20:08 -0700 (PDT) From: Vikash Garodia Date: Fri, 13 Mar 2026 18:49:35 +0530 Subject: [PATCH v3 1/7] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260313-kaanapali-iris-v3-1-9c0d1a67af4b@oss.qualcomm.com> References: <20260313-kaanapali-iris-v3-0-9c0d1a67af4b@oss.qualcomm.com> In-Reply-To: <20260313-kaanapali-iris-v3-0-9c0d1a67af4b@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue , Vikash Garodia , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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When compared to previous generation, iris3x, it has, - separate power domains for stream and pixel processing hardware blocks (bse and vpp). - additional power domain for apv codec. - power domains for individual pipes (VPPx). - different clocks and reset lines. This patch depends on https://github.com/devicetree-org/dt-schema/pull/184/changes/d341298d62805b= c972dfba691da6b3b62aa3ff15 Nacked-by: Krzysztof Kozlowski Signed-off-by: Vikash Garodia --- .../bindings/media/qcom,kaanapali-iris.yaml | 254 +++++++++++++++++= ++++ include/dt-bindings/media/qcom,kaanapali-iris.h | 18 ++ 2 files changed, 272 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.ya= ml b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml new file mode 100644 index 0000000000000000000000000000000000000000..1f35472a2caea7acd2ef20b5cbd= afadba882bd3a --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml @@ -0,0 +1,254 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,kaanapali-iris.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Kaanapali Iris video encoder and decoder + +maintainers: + - Vikash Garodia + - Dikshita Agarwal + +description: + The iris video processing unit is a video encode and decode accelerator + present on Qualcomm Kaanapali SoC. + +properties: + compatible: + const: qcom,kaanapali-iris + + reg: + maxItems: 1 + + clocks: + maxItems: 10 + + clock-names: + items: + - const: iface + - const: core + - const: vcodec0_core + - const: iface1 + - const: core_freerun + - const: vcodec0_core_freerun + - const: vcodec_bse + - const: vcodec_vpp0 + - const: vcodec_vpp1 + - const: vcodec_apv + + dma-coherent: true + + firmware-name: + maxItems: 1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: cpu-cfg + - const: video-mem + + interrupts: + maxItems: 1 + + iommu-map: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + - description: bitstream stream from vcodec + items: + - description: Function ID + - description: Phandle to IOMMU + - description: IOMMU stream ID base + - description: IOMMU stream ID mask + - description: Number of stream IDs + - description: non-pixel stream from vcodec + - description: non-pixel stream from tensilica + - description: pixel stream from vcodec + - description: secure bitstream stream from vcodec + - description: secure non-pixel stream from vcodec + - description: secure non-pixel stream from tensilica + - description: secure pixel stream from vcodec + # firmware might be handled by the TZ / hyp + - description: firmware stream from tensilica + minItems: 8 + + memory-region: + maxItems: 1 + + operating-points-v2: true + opp-table: + type: object + + power-domains: + maxItems: 7 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + - const: mxc + - const: mmcx + - const: vpp0 + - const: vpp1 + - const: apv + + resets: + maxItems: 4 + + reset-names: + items: + - const: bus0 + - const: bus1 + - const: core + - const: vcodec0_core + +required: + - compatible + - reg + - clocks + - clock-names + - dma-coherent + - interconnects + - interconnect-names + - interrupts + - iommu-map + - memory-region + - power-domains + - power-domain-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + video-codec@2000000 { + compatible =3D "qcom,kaanapali-iris"; + reg =3D <0x02000000 0xf0000>; + + clocks =3D <&gcc_video_axi0_clk>, + <&video_cc_mvs0c_clk>, + <&video_cc_mvs0_clk>, + <&gcc_video_axi1_clk>, + <&video_cc_mvs0c_freerun_clk>, + <&video_cc_mvs0_freerun_clk>, + <&video_cc_mvs0b_clk>, + <&video_cc_mvs0_vpp0_clk>, + <&video_cc_mvs0_vpp1_clk>, + <&video_cc_mvs0a_clk>; + clock-names =3D "iface", + "core", + "vcodec0_core", + "iface1", + "core_freerun", + "vcodec0_core_freerun", + "vcodec_bse", + "vcodec_vpp0", + "vcodec_vpp1", + "vcodec_apv"; + + dma-coherent; + + interconnects =3D <&gem_noc_master_appss_proc &config_noc_slave_ve= nus_cfg>, + <&mmss_noc_master_video_mvp &mc_virt_slave_ebi1>; + interconnect-names =3D "cpu-cfg", + "video-mem"; + + interrupts =3D ; + + iommu-map =3D , + , + , + , + , + , + , + , + ; + + memory-region =3D <&video_mem>; + + operating-points-v2 =3D <&iris_opp_table>; + + power-domains =3D <&video_cc_mvs0c_gdsc>, + <&video_cc_mvs0_gdsc>, + <&rpmhpd RPMHPD_MXC>, + <&rpmhpd RPMHPD_MMCX>, + <&video_cc_mvs0_vpp0_gdsc>, + <&video_cc_mvs0_vpp1_gdsc>, + <&video_cc_mvs0a_gdsc>; + power-domain-names =3D "venus", + "vcodec0", + "mxc", + "mmcx", + "vpp0", + "vpp1", + "apv"; + + resets =3D <&gcc_video_axi0_clk_ares>, + <&gcc_video_axi1_clk_ares>, + <&video_cc_mvs0c_freerun_clk_ares>, + <&video_cc_mvs0_freerun_clk_ares>; + reset-names =3D "bus0", + "bus1", + "core", + "vcodec0_core"; + + iris_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-240000000 { + opp-hz =3D /bits/ 64 <240000000 240000000 240000000 360000= 000>; + required-opps =3D <&rpmhpd_opp_low_svs_d1>, + <&rpmhpd_opp_low_svs_d1>; + }; + + opp-338000000 { + opp-hz =3D /bits/ 64 <338000000 338000000 338000000 507000= 000>; + required-opps =3D <&rpmhpd_opp_low_svs>, + <&rpmhpd_opp_low_svs>; + }; + + opp-420000000 { + opp-hz =3D /bits/ 64 <420000000 420000000 420000000 630000= 000>; + required-opps =3D <&rpmhpd_opp_svs>, + <&rpmhpd_opp_svs>; + }; + + opp-444000000 { + opp-hz =3D /bits/ 64 <444000000 444000000 444000000 666000= 000>; + required-opps =3D <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_svs_l1>; + }; + + opp-533000000 { + opp-hz =3D /bits/ 64 <533000000 533000000 533000000 800000= 000>; + required-opps =3D <&rpmhpd_opp_nom>, + <&rpmhpd_opp_nom>; + }; + + opp-630000000 { + opp-hz =3D /bits/ 64 <630000000 630000000 630000000 110400= 0000>; + required-opps =3D <&rpmhpd_opp_turbo>, + <&rpmhpd_opp_turbo>; + }; + + opp-800000000 { + opp-hz =3D /bits/ 64 <800000000 630000000 630000000 126000= 0000>; + required-opps =3D <&rpmhpd_opp_turbo_l0>, + <&rpmhpd_opp_turbo_l0>; + }; + + opp-1000000000 { + opp-hz =3D /bits/ 64 <1000000000 630000000 850000000 12600= 00000>; + required-opps =3D <&rpmhpd_opp_turbo_l1>, + <&rpmhpd_opp_turbo_l1>; + }; + }; + }; diff --git a/include/dt-bindings/media/qcom,kaanapali-iris.h b/include/dt-b= indings/media/qcom,kaanapali-iris.h new file mode 100644 index 0000000000000000000000000000000000000000..757313799293d59b2122dd8d05b= 654f7a3a9876a --- /dev/null +++ b/include/dt-bindings/media/qcom,kaanapali-iris.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef _DT_BINDINGS_MEDIA_QCOM_KAANAPALI_IRIS_H_ +#define _DT_BINDINGS_MEDIA_QCOM_KAANAPALI_IRIS_H_ + +/* Function identifiers for iommu-map to attach for the context bank devic= es */ +#define IRIS_BITSTREAM 0 +#define IRIS_NON_PIXEL 1 +#define IRIS_PIXEL 2 +#define IRIS_SECURE_BITSTREAM 3 +#define IRIS_SECURE_NON_PIXEL 4 +#define IRIS_SECURE_PIXEL 5 +#define IRIS_FIRMWARE 6 + +#endif --=20 2.34.1 From nobody Fri Apr 3 04:42:42 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 707963932D1 for ; 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Fri, 13 Mar 2026 06:20:16 -0700 (PDT) Received: from hu-vgarodia-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82a0724407csm5775254b3a.8.2026.03.13.06.20.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Mar 2026 06:20:15 -0700 (PDT) From: Vikash Garodia Date: Fri, 13 Mar 2026 18:49:36 +0530 Subject: [PATCH v3 2/7] media: iris: switch to hardware mode after firmware boot Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260313-kaanapali-iris-v3-2-9c0d1a67af4b@oss.qualcomm.com> References: <20260313-kaanapali-iris-v3-0-9c0d1a67af4b@oss.qualcomm.com> In-Reply-To: <20260313-kaanapali-iris-v3-0-9c0d1a67af4b@oss.qualcomm.com> To: Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Dmitry Baryshkov , Conor Dooley , Saravana Kannan , Joerg Roedel , Will Deacon , Robin Murphy , Stefan Schmidt , Hans Verkuil , Krzysztof Kozlowski , Vishnu Reddy , Hans Verkuil Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, Bryan O'Donoghue , Vikash Garodia X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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GDSC can be powered off, keeping in hw mode, thereby the vcodec registers programmed in TrustZone (TZ) carry default (reset) values. Move the transition to HW mode after firmware load and boot sequence. The bug was exposed with driver configuring different stream ids to different devices via iommu-map. With registers carrying reset values, VPU would not generate desired stream-id, thereby leading to SMMU fault. For vpu4, when GDSC is switched to HW mode, there is a need to perform the reset operation. Without reset, there are occassional issues of register corruption observed. Hence the vpu GDSC switch also involves the reset. Fixes: dde659d37036 ("media: iris: Introduce vpu ops for vpu4 with necessar= y hooks") Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia Reviewed-by: Dikshita Agarwal Reviewed-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_core.c | 4 ++++ drivers/media/platform/qcom/iris/iris_hfi_common.c | 4 ++++ drivers/media/platform/qcom/iris/iris_vpu2.c | 1 + drivers/media/platform/qcom/iris/iris_vpu3x.c | 9 +++----- drivers/media/platform/qcom/iris/iris_vpu4x.c | 24 ++++++++++++------= ---- drivers/media/platform/qcom/iris/iris_vpu_common.c | 16 +++++++++------ drivers/media/platform/qcom/iris/iris_vpu_common.h | 3 +++ 7 files changed, 38 insertions(+), 23 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_core.c b/drivers/media/p= latform/qcom/iris/iris_core.c index 8406c48d635b6eba0879396ce9f9ae2292743f09..dbaac01eb15a0e622e85635fddd= 29c1f7fc18662 100644 --- a/drivers/media/platform/qcom/iris/iris_core.c +++ b/drivers/media/platform/qcom/iris/iris_core.c @@ -75,6 +75,10 @@ int iris_core_init(struct iris_core *core) if (ret) goto error_unload_fw; =20 + ret =3D iris_vpu_switch_to_hwmode(core); + if (ret) + goto error_unload_fw; + ret =3D iris_hfi_core_init(core); if (ret) goto error_unload_fw; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_common.c b/drivers/m= edia/platform/qcom/iris/iris_hfi_common.c index 92112eb16c11048e28230a2926dfb46e3163aada..621c66593d88d47ef3438c98a07= cb29421c4e375 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_common.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_common.c @@ -159,6 +159,10 @@ int iris_hfi_pm_resume(struct iris_core *core) if (ret) goto err_suspend_hw; =20 + ret =3D iris_vpu_switch_to_hwmode(core); + if (ret) + goto err_suspend_hw; + ret =3D ops->sys_interframe_powercollapse(core); if (ret) goto err_suspend_hw; diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/p= latform/qcom/iris/iris_vpu2.c index 9c103a2e4e4eafee101a8a9b168fdc8ca76e277d..01ef40f3895743b3784464e2d5b= a2de1aeca5a4a 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c @@ -44,4 +44,5 @@ const struct vpu_ops iris_vpu2_ops =3D { .power_off_controller =3D iris_vpu_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu2_calc_freq, + .set_hwmode =3D iris_vpu_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/= platform/qcom/iris/iris_vpu3x.c index fe4423b951b1e9e31d06dffc69d18071cc985731..3dad47be78b58f6cd5ed6f333b3= 376571a04dbf0 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c @@ -234,14 +234,8 @@ static int iris_vpu35_power_on_hw(struct iris_core *co= re) if (ret) goto err_disable_hw_free_clk; =20 - ret =3D dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER= _DOMAIN], true); - if (ret) - goto err_disable_hw_clk; - return 0; =20 -err_disable_hw_clk: - iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_hw_free_clk: iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK); err_disable_axi_clk: @@ -266,6 +260,7 @@ const struct vpu_ops iris_vpu3_ops =3D { .power_off_controller =3D iris_vpu_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; =20 const struct vpu_ops iris_vpu33_ops =3D { @@ -274,6 +269,7 @@ const struct vpu_ops iris_vpu33_ops =3D { .power_off_controller =3D iris_vpu33_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; =20 const struct vpu_ops iris_vpu35_ops =3D { @@ -283,4 +279,5 @@ const struct vpu_ops iris_vpu35_ops =3D { .power_on_controller =3D iris_vpu35_vpu4x_power_on_controller, .program_bootup_registers =3D iris_vpu35_vpu4x_program_bootup_registers, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/= platform/qcom/iris/iris_vpu4x.c index a8db02ce5c5ec583c4027166b34ce51d3d683b4e..02e100a4045fced33d7a3545b63= 2cc5f0955233f 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu4x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c @@ -252,21 +252,10 @@ static int iris_vpu4x_power_on_hardware(struct iris_c= ore *core) ret =3D iris_vpu4x_power_on_apv(core); if (ret) goto disable_hw_clocks; - - iris_vpu4x_ahb_sync_reset_apv(core); } =20 - iris_vpu4x_ahb_sync_reset_hardware(core); - - ret =3D iris_vpu4x_genpd_set_hwmode(core, true, efuse_value); - if (ret) - goto disable_apv_power_domain; - return 0; =20 -disable_apv_power_domain: - if (!(efuse_value & DISABLE_VIDEO_APV_BIT)) - iris_vpu4x_power_off_apv(core); disable_hw_clocks: iris_vpu4x_disable_hardware_clocks(core, efuse_value); disable_vpp1_power_domain: @@ -359,6 +348,18 @@ static void iris_vpu4x_power_off_hardware(struct iris_= core *core) iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWE= R_DOMAIN]); } =20 +static int iris_vpu4x_set_hwmode(struct iris_core *core) +{ + u32 efuse_value =3D readl(core->reg_base + WRAPPER_EFUSE_MONITOR); + + if (!(efuse_value & DISABLE_VIDEO_APV_BIT)) + iris_vpu4x_ahb_sync_reset_apv(core); + + iris_vpu4x_ahb_sync_reset_hardware(core); + + return iris_vpu4x_genpd_set_hwmode(core, true, efuse_value); +} + const struct vpu_ops iris_vpu4x_ops =3D { .power_off_hw =3D iris_vpu4x_power_off_hardware, .power_on_hw =3D iris_vpu4x_power_on_hardware, @@ -366,4 +367,5 @@ const struct vpu_ops iris_vpu4x_ops =3D { .power_on_controller =3D iris_vpu35_vpu4x_power_on_controller, .program_bootup_registers =3D iris_vpu35_vpu4x_program_bootup_registers, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu4x_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.c index 548e5f1727fdb7543f76a1871f17257fa2360733..69e6126dc4d95ed9e5fccf59620= 5e84ec0bfc82d 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -292,14 +292,8 @@ int iris_vpu_power_on_hw(struct iris_core *core) if (ret && ret !=3D -ENOENT) goto err_disable_hw_clock; =20 - ret =3D dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER= _DOMAIN], true); - if (ret) - goto err_disable_hw_ahb_clock; - return 0; =20 -err_disable_hw_ahb_clock: - iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); err_disable_hw_clock: iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_power: @@ -308,6 +302,16 @@ int iris_vpu_power_on_hw(struct iris_core *core) return ret; } =20 +int iris_vpu_set_hwmode(struct iris_core *core) +{ + return dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_= DOMAIN], true); +} + +int iris_vpu_switch_to_hwmode(struct iris_core *core) +{ + return core->iris_platform_data->vpu_ops->set_hwmode(core); +} + int iris_vpu35_vpu4x_power_off_controller(struct iris_core *core) { u32 clk_rst_tbl_size =3D core->iris_platform_data->clk_rst_tbl_size; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.h index f6dffc613b822341fb21e12de6b1395202f62cde..dee3b1349c5e869619c7f7c294d= d711f9ff72b92 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h @@ -21,6 +21,7 @@ struct vpu_ops { int (*power_on_controller)(struct iris_core *core); void (*program_bootup_registers)(struct iris_core *core); u64 (*calc_freq)(struct iris_inst *inst, size_t data_size); + int (*set_hwmode)(struct iris_core *core); }; =20 int iris_vpu_boot_firmware(struct iris_core *core); @@ -30,6 +31,8 @@ int iris_vpu_watchdog(struct iris_core *core, u32 intr_st= atus); int iris_vpu_prepare_pc(struct iris_core *core); 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Iris devices need their own bus so that they can run their own dma_configure() logic. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- drivers/iommu/iommu.c | 4 +++ drivers/media/platform/qcom/iris/Makefile | 4 +++ .../platform/qcom/iris/iris_platform_common.h | 6 ++++ drivers/media/platform/qcom/iris/iris_vpu_bus.c | 32 ++++++++++++++++++= ++++ include/linux/iris_vpu_bus.h | 13 +++++++++ 5 files changed, 59 insertions(+) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 35db5178095404fec87cd0f18e44ea97cf354e78..fd5fb7c10da22ab548d359ca1f4= 4504acc3d646c 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -178,6 +179,9 @@ static const struct bus_type * const iommu_buses[] =3D { #ifdef CONFIG_CDX_BUS &cdx_bus_type, #endif +#if IS_ENABLED(CONFIG_VIDEO_QCOM_IRIS) + &iris_vpu_bus_type, +#endif }; =20 /* diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/plat= form/qcom/iris/Makefile index 2abbd3aeb4af07e52bf372a4b2f352463529c92c..6f4052b98491aeddc299669334d= 4c93e9a3420e4 100644 --- a/drivers/media/platform/qcom/iris/Makefile +++ b/drivers/media/platform/qcom/iris/Makefile @@ -31,3 +31,7 @@ qcom-iris-objs +=3D iris_platform_gen1.o endif =20 obj-$(CONFIG_VIDEO_QCOM_IRIS) +=3D qcom-iris.o + +ifdef CONFIG_VIDEO_QCOM_IRIS +obj-y +=3D iris_vpu_bus.o +endif diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 5a489917580eb10022fdcb52f7321a915e8b239d..2273243d1a80446233dd82dcd77= 444aa043ad064 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -204,6 +204,12 @@ struct icc_vote_data { u32 fps; }; =20 +struct iris_context_bank { + char *name; + u32 f_id; + u32 region_mask; +}; + enum platform_pm_domain_type { IRIS_CTRL_POWER_DOMAIN, IRIS_HW_POWER_DOMAIN, diff --git a/drivers/media/platform/qcom/iris/iris_vpu_bus.c b/drivers/medi= a/platform/qcom/iris/iris_vpu_bus.c new file mode 100644 index 0000000000000000000000000000000000000000..9e9fdeb6e405aab26ecf5e57ca9= 1fca6b8eda2c5 --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_vpu_bus.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +#include "iris_platform_common.h" + +static int iris_vpu_bus_dma_configure(struct device *dev) +{ + struct iris_context_bank *cb =3D dev_get_drvdata(dev); + + if (!cb) + return -ENODEV; + + return of_dma_configure_id(dev, dev->parent->of_node, true, &cb->f_id); +} + +const struct bus_type iris_vpu_bus_type =3D { + .name =3D "iris-bus", + .dma_configure =3D iris_vpu_bus_dma_configure, +}; +EXPORT_SYMBOL_GPL(iris_vpu_bus_type); + +static int __init iris_vpu_bus_init(void) +{ + return bus_register(&iris_vpu_bus_type); +} + +postcore_initcall(iris_vpu_bus_init); diff --git a/include/linux/iris_vpu_bus.h b/include/linux/iris_vpu_bus.h new file mode 100644 index 0000000000000000000000000000000000000000..422898cdf2f62eb7f4583d970a0= 1c8776dd12164 --- /dev/null +++ b/include/linux/iris_vpu_bus.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only + * + * Copyright (c) Qualcomm Innovation Center, Inc. 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Different stream IDs from VPU would be associated to one of these CB. Multiple CBs are needed to increase the IOVA for the video usecases like higher concurrent sessions. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_core.h | 2 + .../platform/qcom/iris/iris_platform_common.h | 14 +++++ drivers/media/platform/qcom/iris/iris_probe.c | 66 ++++++++++++++++++= ++-- drivers/media/platform/qcom/iris/iris_resources.c | 46 +++++++++++++++ drivers/media/platform/qcom/iris/iris_resources.h | 1 + 5 files changed, 125 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_core.h b/drivers/media/p= latform/qcom/iris/iris_core.h index fb194c967ad4f9b5e00cd74f0d41e0b827ef14db..62364bd6909e9a03d223bac8696= 2dc9094a40243 100644 --- a/drivers/media/platform/qcom/iris/iris_core.h +++ b/drivers/media/platform/qcom/iris/iris_core.h @@ -34,6 +34,7 @@ enum domain_type { * struct iris_core - holds core parameters valid for all instances * * @dev: reference to device structure + * @cb_devs: array of context bank devices (eg: bitstream, non-pixel, pixe= l, etc) * @reg_base: IO memory base address * @irq: iris irq * @v4l2_dev: a holder for v4l2 device structure @@ -77,6 +78,7 @@ enum domain_type { =20 struct iris_core { struct device *dev; + struct device *cb_devs[IRIS_MAX_REGION]; void __iomem *reg_base; int irq; struct v4l2_device v4l2_dev; diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 2273243d1a80446233dd82dcd77444aa043ad064..df63a06b8401cd367c69ab8909a= f227f04bf69bf 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -204,6 +204,18 @@ struct icc_vote_data { u32 fps; }; =20 +enum iris_buffer_region { + IRIS_UNKNOWN_REGION, + IRIS_BITSTREAM_REGION, + IRIS_NON_PIXEL_REGION, + IRIS_PIXEL_REGION, + IRIS_SECURE_BITSTREAM_REGION, + IRIS_SECURE_NON_PIXEL_REGION, + IRIS_SECURE_PIXEL_REGION, + IRIS_FIRMWARE_REGION, + IRIS_MAX_REGION, +}; + struct iris_context_bank { char *name; u32 f_id; @@ -252,6 +264,8 @@ struct iris_platform_data { u32 inst_fw_caps_enc_size; const struct tz_cp_config *tz_cp_config_data; u32 tz_cp_config_data_size; + const struct iris_context_bank *cb_data; + const u32 cb_data_size; u32 core_arch; u32 hw_response_timeout; struct ubwc_config_data *ubwc_config; diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index ddaacda523ecb9990af0dd0640196223fbcc2cab..439e6e0fe8adf8287f81d26257e= f2a7e9f21e53d 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -123,6 +123,55 @@ static int iris_init_resets(struct iris_core *core) core->iris_platform_data->controller_rst_tbl_size); } =20 +static void iris_destroy_child_device(struct iris_core *core, const struct= iris_context_bank *cb) +{ + u32 index, region_mask =3D cb->region_mask; + struct device *dev =3D NULL; + + while (region_mask) { + index =3D __ffs(region_mask); + dev =3D core->cb_devs[index]; + core->cb_devs[index] =3D NULL; + region_mask &=3D ~BIT(index); + } + + if (dev) + device_unregister(dev); +} + +static void iris_deinit_context_bank_devices(struct iris_core *core) +{ + const struct iris_context_bank *cb; + int i; + + for (i =3D 0; i < core->iris_platform_data->cb_data_size; i++) { + cb =3D &core->iris_platform_data->cb_data[i]; + iris_destroy_child_device(core, cb); + } +} + +static int iris_init_context_bank_devices(struct iris_core *core) +{ + const struct iris_context_bank *cb; + int ret, i; + + for (i =3D 0; i < core->iris_platform_data->cb_data_size; i++) { + cb =3D &core->iris_platform_data->cb_data[i]; + + ret =3D iris_create_child_device_and_map(core, cb); + if (ret) + goto err_deinit_cb; + } + + return 0; + +err_deinit_cb: + while (i-- > 0) + iris_destroy_child_device(core, &core->iris_platform_data->cb_data[i]); + + return ret; +} + static int iris_init_resources(struct iris_core *core) { int ret; @@ -193,6 +242,7 @@ static void iris_remove(struct platform_device *pdev) return; =20 iris_core_deinit(core); + iris_deinit_context_bank_devices(core); =20 video_unregister_device(core->vdev_dec); video_unregister_device(core->vdev_enc); @@ -275,12 +325,18 @@ static int iris_probe(struct platform_device *pdev) =20 platform_set_drvdata(pdev, core); =20 - dma_mask =3D core->iris_platform_data->dma_mask; - - ret =3D dma_set_mask_and_coherent(dev, dma_mask); + ret =3D iris_init_context_bank_devices(core); if (ret) goto err_vdev_unreg_enc; =20 + dma_mask =3D core->iris_platform_data->dma_mask; + + if (device_iommu_mapped(core->dev)) { + ret =3D dma_set_mask_and_coherent(core->dev, dma_mask); + if (ret) + goto err_deinit_cb; + } + dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); dma_set_seg_boundary(&pdev->dev, DMA_BIT_MASK(32)); =20 @@ -288,10 +344,12 @@ static int iris_probe(struct platform_device *pdev) pm_runtime_use_autosuspend(core->dev); ret =3D devm_pm_runtime_enable(core->dev); if (ret) - goto err_vdev_unreg_enc; + goto err_deinit_cb; =20 return 0; =20 +err_deinit_cb: + iris_deinit_context_bank_devices(core); err_vdev_unreg_enc: video_unregister_device(core->vdev_enc); err_vdev_unreg_dec: diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index 773f6548370a257b8ae7332242544266cbbd61a9..a2e648f4cdb8c63db89396d49f3= 2bbc06d870ea5 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -141,3 +142,48 @@ int iris_disable_unprepare_clock(struct iris_core *cor= e, enum platform_clk_type =20 return 0; } + +static void iris_device_release(struct device *dev) +{ + dev_set_drvdata(dev, NULL); + kfree(dev); +} + +int iris_create_child_device_and_map(struct iris_core *core, const struct = iris_context_bank *cb) +{ + u32 index, region_mask =3D cb->region_mask; + struct device *dev; + int ret; + + dev =3D kzalloc_obj(*dev); + if (!dev) + return -ENOMEM; + + dev->release =3D iris_device_release; + dev->bus =3D &iris_vpu_bus_type; + dev->parent =3D core->dev; + dev->coherent_dma_mask =3D core->iris_platform_data->dma_mask; + dev->dma_mask =3D &dev->coherent_dma_mask; + + dev_set_name(dev, "%s", cb->name); + dev_set_drvdata(dev, (void *)cb); + + ret =3D device_register(dev); + if (ret) { + put_device(dev); + return ret; + } + + if (!device_iommu_mapped(dev)) { + device_unregister(dev); + return 0; + } + + while (region_mask) { + index =3D __ffs(region_mask); + core->cb_devs[index] =3D dev; + region_mask &=3D ~BIT(index); + } + + return 0; +} diff --git a/drivers/media/platform/qcom/iris/iris_resources.h b/drivers/me= dia/platform/qcom/iris/iris_resources.h index 6bfbd2dc6db095ec05e53c894e048285f82446c6..c573016535b87d4fd140cad967d= 926cc1de63382 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.h +++ b/drivers/media/platform/qcom/iris/iris_resources.h @@ -15,5 +15,6 @@ int iris_unset_icc_bw(struct iris_core *core); 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Fallback to parent device for backward compatibility. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_buffer.c | 7 ++-- drivers/media/platform/qcom/iris/iris_hfi_queue.c | 16 +++++---- drivers/media/platform/qcom/iris/iris_resources.c | 41 +++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_resources.h | 2 ++ drivers/media/platform/qcom/iris/iris_vidc.c | 4 +-- 5 files changed, 58 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media= /platform/qcom/iris/iris_buffer.c index 9151f43bc6b9c2c34c803de4231d1e6de0bec6c4..a016eaa4e02fe78aeefd97cc3cf= f51aec25778ff 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_buffer.c @@ -335,8 +335,8 @@ void iris_get_internal_buffers(struct iris_inst *inst, = u32 plane) static int iris_create_internal_buffer(struct iris_inst *inst, enum iris_buffer_type buffer_type, u32 index) { + struct device *dev =3D iris_get_cb_dev(inst->core, iris_get_region(inst, = buffer_type)); struct iris_buffers *buffers =3D &inst->buffers[buffer_type]; - struct iris_core *core =3D inst->core; struct iris_buffer *buffer; =20 if (!buffers->size) @@ -352,7 +352,7 @@ static int iris_create_internal_buffer(struct iris_inst= *inst, buffer->buffer_size =3D buffers->size; buffer->dma_attrs =3D DMA_ATTR_WRITE_COMBINE | DMA_ATTR_NO_KERNEL_MAPPING; =20 - buffer->kvaddr =3D dma_alloc_attrs(core->dev, buffer->buffer_size, + buffer->kvaddr =3D dma_alloc_attrs(dev, buffer->buffer_size, &buffer->device_addr, GFP_KERNEL, buffer->dma_attrs); if (!buffer->kvaddr) { kfree(buffer); @@ -490,9 +490,10 @@ int iris_queue_internal_buffers(struct iris_inst *inst= , u32 plane) int iris_destroy_internal_buffer(struct iris_inst *inst, struct iris_buffe= r *buffer) { struct iris_core *core =3D inst->core; + struct device *dev =3D iris_get_cb_dev(core, iris_get_region(inst, buffer= ->type)); =20 list_del(&buffer->list); - dma_free_attrs(core->dev, buffer->buffer_size, buffer->kvaddr, + dma_free_attrs(dev, buffer->buffer_size, buffer->kvaddr, buffer->device_addr, buffer->dma_attrs); kfree(buffer); =20 diff --git a/drivers/media/platform/qcom/iris/iris_hfi_queue.c b/drivers/me= dia/platform/qcom/iris/iris_hfi_queue.c index b3ed06297953b902d5ea6c452385a88d5431ac66..b8179b2c0ee9d13ff4294922d74= 767825069683b 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_queue.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_queue.c @@ -245,25 +245,26 @@ static void iris_hfi_queue_deinit(struct iris_iface_q= _info *iface_q) =20 int iris_hfi_queues_init(struct iris_core *core) { + struct device *dev =3D iris_get_cb_dev(core, IRIS_NON_PIXEL_REGION); struct iris_hfi_queue_table_header *q_tbl_hdr; u32 queue_size; =20 /* Iris hardware requires 4K queue alignment */ queue_size =3D ALIGN((sizeof(*q_tbl_hdr) + (IFACEQ_QUEUE_SIZE * IFACEQ_NU= MQ)), SZ_4K); - core->iface_q_table_vaddr =3D dma_alloc_attrs(core->dev, queue_size, + core->iface_q_table_vaddr =3D dma_alloc_attrs(dev, queue_size, &core->iface_q_table_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->iface_q_table_vaddr) { - dev_err(core->dev, "queues alloc and map failed\n"); + dev_err(dev, "queues alloc and map failed\n"); return -ENOMEM; } =20 - core->sfr_vaddr =3D dma_alloc_attrs(core->dev, SFR_SIZE, + core->sfr_vaddr =3D dma_alloc_attrs(dev, SFR_SIZE, &core->sfr_daddr, GFP_KERNEL, DMA_ATTR_WRITE_COMBINE); if (!core->sfr_vaddr) { - dev_err(core->dev, "sfr alloc and map failed\n"); - dma_free_attrs(core->dev, sizeof(*q_tbl_hdr), core->iface_q_table_vaddr, + dev_err(dev, "sfr alloc and map failed\n"); + dma_free_attrs(dev, sizeof(*q_tbl_hdr), core->iface_q_table_vaddr, core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE); return -ENOMEM; } @@ -291,6 +292,7 @@ int iris_hfi_queues_init(struct iris_core *core) =20 void iris_hfi_queues_deinit(struct iris_core *core) { + struct device *dev =3D iris_get_cb_dev(core, IRIS_NON_PIXEL_REGION); u32 queue_size; =20 if (!core->iface_q_table_vaddr) @@ -300,7 +302,7 @@ void iris_hfi_queues_deinit(struct iris_core *core) iris_hfi_queue_deinit(&core->message_queue); iris_hfi_queue_deinit(&core->command_queue); =20 - dma_free_attrs(core->dev, SFR_SIZE, core->sfr_vaddr, + dma_free_attrs(dev, SFR_SIZE, core->sfr_vaddr, core->sfr_daddr, DMA_ATTR_WRITE_COMBINE); =20 core->sfr_vaddr =3D NULL; @@ -309,7 +311,7 @@ void iris_hfi_queues_deinit(struct iris_core *core) queue_size =3D ALIGN(sizeof(struct iris_hfi_queue_table_header) + (IFACEQ_QUEUE_SIZE * IFACEQ_NUMQ), SZ_4K); =20 - dma_free_attrs(core->dev, queue_size, core->iface_q_table_vaddr, + dma_free_attrs(dev, queue_size, core->iface_q_table_vaddr, core->iface_q_table_daddr, DMA_ATTR_WRITE_COMBINE); =20 core->iface_q_table_vaddr =3D NULL; diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index a2e648f4cdb8c63db89396d49f32bbc06d870ea5..9a896271c21187ecda25be86c1a= bd2e905e32d8a 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -13,6 +13,7 @@ #include =20 #include "iris_core.h" +#include "iris_instance.h" #include "iris_resources.h" =20 #define BW_THRESHOLD 50000 @@ -187,3 +188,43 @@ int iris_create_child_device_and_map(struct iris_core = *core, const struct iris_c =20 return 0; } + +enum iris_buffer_region iris_get_region(struct iris_inst *inst, enum iris_= buffer_type buffer_type) +{ + switch (buffer_type) { + case BUF_INPUT: + if (inst->domain =3D=3D ENCODER) + return IRIS_PIXEL_REGION; + else + return IRIS_BITSTREAM_REGION; + case BUF_OUTPUT: + if (inst->domain =3D=3D ENCODER) + return IRIS_BITSTREAM_REGION; + else + return IRIS_PIXEL_REGION; + case BUF_BIN: + return IRIS_BITSTREAM_REGION; + case BUF_DPB: + case BUF_PARTIAL: + case BUF_SCRATCH_2: + case BUF_VPSS: + return IRIS_PIXEL_REGION; + case BUF_ARP: + case BUF_COMV: + case BUF_LINE: + case BUF_NON_COMV: + case BUF_PERSIST: + return IRIS_NON_PIXEL_REGION; + default: + dev_err(inst->core->dev, "unknown buffer type: %d\n", buffer_type); + return IRIS_UNKNOWN_REGION; + } +} + +struct device *iris_get_cb_dev(struct iris_core *core, enum iris_buffer_re= gion region) +{ + if (core->cb_devs[region]) + return core->cb_devs[region]; + + return core->dev; +} diff --git a/drivers/media/platform/qcom/iris/iris_resources.h b/drivers/me= dia/platform/qcom/iris/iris_resources.h index c573016535b87d4fd140cad967d926cc1de63382..2d0447309ca4e7833db2fa57ef8= fc3758e9802a9 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.h +++ b/drivers/media/platform/qcom/iris/iris_resources.h @@ -16,5 +16,7 @@ int iris_set_icc_bw(struct iris_core *core, unsigned long= icc_bw); int iris_disable_unprepare_clock(struct iris_core *core, enum platform_clk= _type clk_type); int iris_prepare_enable_clock(struct iris_core *core, enum platform_clk_ty= pe clk_type); int iris_create_child_device_and_map(struct iris_core *core, const struct = iris_context_bank *cb); +enum iris_buffer_region iris_get_region(struct iris_inst *inst, enum iris_= buffer_type buffer_type); +struct device *iris_get_cb_dev(struct iris_core *core, enum iris_buffer_re= gion buffer_type); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_vidc.c b/drivers/media/p= latform/qcom/iris/iris_vidc.c index bd38d84c9cc79d15585ed5dd5f905a37521cb6dc..40744d487fbf1520c5e359d536c= ddb1c5ab0a706 100644 --- a/drivers/media/platform/qcom/iris/iris_vidc.c +++ b/drivers/media/platform/qcom/iris/iris_vidc.c @@ -107,7 +107,7 @@ iris_m2m_queue_init(void *priv, struct vb2_queue *src_v= q, struct vb2_queue *dst_ src_vq->drv_priv =3D inst; src_vq->buf_struct_size =3D sizeof(struct iris_buffer); src_vq->min_reqbufs_allocation =3D MIN_BUFFERS; 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While this works for most resolutions, certain configurations require a larger buffer size on iris4, causing firmware errors during decode. This resolves firmware failures seen with specific test vectors on kaanapali (iris4), and fixes the following failing fluster tests - PICSIZE_C_Bossen_1 - WPP_E_ericsson_MAIN_2 Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 51 ++++++++++++++++++= +++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index 9270422c16019ba658ee8813940cb9110ad030a1..a4d599c49ce9052b609b9cedf65= f669ba78b5407 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -1755,6 +1755,55 @@ static u32 hfi_vpu4x_buffer_line_vp9d(u32 frame_widt= h, u32 frame_height, u32 _yu return lb_size + dpb_obp_size; } =20 +static u32 hfi_vpu4x_buffer_line_h265d(u32 frame_width, u32 frame_height, = bool is_opb, + u32 num_vpp_pipes) +{ + u32 num_lcu_per_pipe, fe_left_lb, se_left_lb, vsp_left_lb, top_lb, qp_siz= e, + dpb_obp =3D 0, lcu_size =3D 16; + + num_lcu_per_pipe =3D (DIV_ROUND_UP(frame_height, lcu_size) / num_vpp_pipe= s) + + (DIV_ROUND_UP(frame_height, lcu_size) % num_vpp_pipes); + + fe_left_lb =3D ALIGN((DMA_ALIGNMENT * num_lcu_per_pipe), DMA_ALIGNMENT) * + FE_LFT_CTRL_LINE_NUMBERS; + fe_left_lb +=3D ALIGN((DMA_ALIGNMENT * 2 * num_lcu_per_pipe), DMA_ALIGNME= NT) * + FE_LFT_DB_DATA_LINE_NUMBERS; + fe_left_lb +=3D ALIGN((DMA_ALIGNMENT * num_lcu_per_pipe), DMA_ALIGNMENT); + fe_left_lb +=3D ALIGN((DMA_ALIGNMENT * 2 * num_lcu_per_pipe), DMA_ALIGNME= NT); + fe_left_lb +=3D ALIGN((DMA_ALIGNMENT * 8 * num_lcu_per_pipe), DMA_ALIGNME= NT) * + FE_LFT_LR_DATA_LINE_NUMBERS; + + if (is_opb) + dpb_obp =3D size_dpb_opb(frame_height, lcu_size) * num_vpp_pipes; + + se_left_lb =3D max_t(u32, (ALIGN(frame_height, BUFFER_ALIGNMENT_16_BYTES)= >> 3) * + MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE, + max_t(u32, (ALIGN(frame_height, BUFFER_ALIGNMENT_32_BYTES) >> 3) * + MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE, + (ALIGN(frame_height, BUFFER_ALIGNMENT_64_BYTES) >> 3) * + MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE)); + + vsp_left_lb =3D ALIGN(DIV_ROUND_UP(frame_height, BUFFER_ALIGNMENT_64_BYTE= S) * + H265_NUM_TILE_ROW, DMA_ALIGNMENT); + + top_lb =3D ALIGN((DMA_ALIGNMENT * DIV_ROUND_UP(frame_width, lcu_size)), D= MA_ALIGNMENT) * + FE_TOP_CTRL_LINE_NUMBERS; + top_lb +=3D ALIGN(DMA_ALIGNMENT * 2 * DIV_ROUND_UP(frame_width, lcu_size)= , DMA_ALIGNMENT) * + FE_TOP_DATA_LUMA_LINE_NUMBERS; + top_lb +=3D ALIGN(DMA_ALIGNMENT * 2 * (DIV_ROUND_UP(frame_width, lcu_size= ) + 1), + DMA_ALIGNMENT) * FE_TOP_DATA_CHROMA_LINE_NUMBERS; + top_lb +=3D ALIGN(ALIGN(frame_width, BUFFER_ALIGNMENT_64_BYTES) * 2, DMA_= ALIGNMENT); + top_lb +=3D ALIGN(ALIGN(frame_width, BUFFER_ALIGNMENT_64_BYTES) * 6, DMA_= ALIGNMENT); + top_lb +=3D size_h265d_lb_vsp_top(frame_width, frame_height); + + qp_size =3D size_h265d_qp(frame_width, frame_height); + + return ((ALIGN(dpb_obp, DMA_ALIGNMENT) + ALIGN(se_left_lb, DMA_ALIGNMENT)= + + ALIGN(vsp_left_lb, DMA_ALIGNMENT)) * num_vpp_pipes) + + ALIGN(fe_left_lb, DMA_ALIGNMENT) + ALIGN(top_lb, DMA_ALIGNMENT) + + ALIGN(qp_size, DMA_ALIGNMENT); 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Move the configurations that differs in a per-SoC platform header, that will contain SoC specific data. Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia --- .../platform/qcom/iris/iris_platform_common.h | 1 + .../media/platform/qcom/iris/iris_platform_gen2.c | 90 ++++++++++++++++++= ++++ .../platform/qcom/iris/iris_platform_kaanapali.h | 83 ++++++++++++++++++= ++ drivers/media/platform/qcom/iris/iris_probe.c | 4 + 4 files changed, 178 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index df63a06b8401cd367c69ab8909af227f04bf69bf..d97e3fb18c3636abbbca3c2086c= 5263efeca3db5 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -41,6 +41,7 @@ enum pipe_type { PIPE_4 =3D 4, }; =20 +extern const struct iris_platform_data kaanapali_data; extern const struct iris_platform_data qcs8300_data; extern const struct iris_platform_data sc7280_data; extern const struct iris_platform_data sm8250_data; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 5da90d47f9c6eab4a7e6b17841fdc0e599397bf7..df906f6b9fcd80100872a128150= 36a3aad9e925b 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -12,6 +12,7 @@ #include "iris_vpu_buffer.h" #include "iris_vpu_common.h" =20 +#include "iris_platform_kaanapali.h" #include "iris_platform_qcs8300.h" #include "iris_platform_sm8650.h" #include "iris_platform_sm8750.h" @@ -921,6 +922,95 @@ static const u32 sm8550_enc_op_int_buf_tbl[] =3D { BUF_SCRATCH_2, }; =20 +const struct iris_platform_data kaanapali_data =3D { + .get_instance =3D iris_hfi_gen2_get_instance, + .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, + .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, + .get_vpu_buffer_size =3D iris_vpu4x_buf_size, + .vpu_ops =3D &iris_vpu4x_ops, + .set_preset_registers =3D iris_set_sm8550_preset_registers, + .icc_tbl =3D sm8550_icc_table, + .icc_tbl_size =3D ARRAY_SIZE(sm8550_icc_table), + .clk_rst_tbl =3D kaanapali_clk_reset_table, + .clk_rst_tbl_size =3D ARRAY_SIZE(kaanapali_clk_reset_table), + .bw_tbl_dec =3D sm8550_bw_table_dec, + .bw_tbl_dec_size =3D ARRAY_SIZE(sm8550_bw_table_dec), + .pmdomain_tbl =3D kaanapali_pmdomain_table, + .pmdomain_tbl_size =3D ARRAY_SIZE(kaanapali_pmdomain_table), + .opp_pd_tbl =3D sm8550_opp_pd_table, + .opp_pd_tbl_size =3D ARRAY_SIZE(sm8550_opp_pd_table), + .clk_tbl =3D kaanapali_clk_table, + .clk_tbl_size =3D ARRAY_SIZE(kaanapali_clk_table), + .opp_clk_tbl =3D kaanapali_opp_clk_table, + /* Upper bound of DMA address range */ + .dma_mask =3D 0xffc00000 - 1, + .fwname =3D "qcom/vpu/vpu40_p2_s7.mbn", + .pas_id =3D IRIS_PAS_ID, + .inst_iris_fmts =3D platform_fmts_sm8550_dec, + .inst_iris_fmts_size =3D ARRAY_SIZE(platform_fmts_sm8550_dec), + .inst_caps =3D &platform_inst_cap_sm8550, + .inst_fw_caps_dec =3D inst_fw_cap_sm8550_dec, + .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), + .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, + .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), + .tz_cp_config_data =3D tz_cp_config_kaanapali, + .tz_cp_config_data_size =3D ARRAY_SIZE(tz_cp_config_kaanapali), + .cb_data =3D kaanapali_cb_data, + .cb_data_size =3D ARRAY_SIZE(kaanapali_cb_data), + .core_arch =3D VIDEO_ARCH_LX, + .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, + .ubwc_config =3D &ubwc_config_sm8550, + .num_vpp_pipe =3D 2, + .max_session_count =3D 16, + .max_core_mbpf =3D NUM_MBS_8K * 2, + .max_core_mbps =3D ((8192 * 4320) / 256) * 60, + .dec_input_config_params_default =3D + sm8550_vdec_input_config_params_default, + .dec_input_config_params_default_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_params_default), + .dec_input_config_params_hevc =3D + sm8550_vdec_input_config_param_hevc, + .dec_input_config_params_hevc_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_param_hevc), + .dec_input_config_params_vp9 =3D + sm8550_vdec_input_config_param_vp9, + .dec_input_config_params_vp9_size =3D + ARRAY_SIZE(sm8550_vdec_input_config_param_vp9), + .dec_output_config_params =3D + sm8550_vdec_output_config_params, + .dec_output_config_params_size =3D + ARRAY_SIZE(sm8550_vdec_output_config_params), + + .enc_input_config_params =3D + sm8550_venc_input_config_params, + .enc_input_config_params_size =3D + ARRAY_SIZE(sm8550_venc_input_config_params), + .enc_output_config_params =3D + sm8550_venc_output_config_params, + .enc_output_config_params_size =3D + ARRAY_SIZE(sm8550_venc_output_config_params), + + .dec_input_prop =3D sm8550_vdec_subscribe_input_properties, + .dec_input_prop_size =3D ARRAY_SIZE(sm8550_vdec_subscribe_input_propertie= s), + .dec_output_prop_avc =3D sm8550_vdec_subscribe_output_properties_avc, + .dec_output_prop_avc_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_avc), + .dec_output_prop_hevc =3D sm8550_vdec_subscribe_output_properties_hevc, + .dec_output_prop_hevc_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_hevc), + .dec_output_prop_vp9 =3D sm8550_vdec_subscribe_output_properties_vp9, + .dec_output_prop_vp9_size =3D + ARRAY_SIZE(sm8550_vdec_subscribe_output_properties_vp9), + + .dec_ip_int_buf_tbl =3D sm8550_dec_ip_int_buf_tbl, + .dec_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_ip_int_buf_tbl), + .dec_op_int_buf_tbl =3D sm8550_dec_op_int_buf_tbl, + .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), + + .enc_op_int_buf_tbl =3D sm8550_enc_op_int_buf_tbl, + .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), +}; + const struct iris_platform_data sm8550_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, diff --git a/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h b/d= rivers/media/platform/qcom/iris/iris_platform_kaanapali.h new file mode 100644 index 0000000000000000000000000000000000000000..bdca1e5bf673353862c1554fb04= 20f73b3f519cb --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __IRIS_PLATFORM_KAANAPALI_H__ +#define __IRIS_PLATFORM_KAANAPALI_H__ + +#include + +#define VIDEO_REGION_VM0_SECURE_NP_ID 1 +#define VIDEO_REGION_VM0_NONSECURE_NP_ID 5 + +static const char *const kaanapali_clk_reset_table[] =3D { + "bus0", + "bus1", + "core", + "vcodec0_core", +}; + +static const char *const kaanapali_pmdomain_table[] =3D { + "venus", + "vcodec0", + "vpp0", + "vpp1", + "apv", +}; + +static const struct platform_clk_data kaanapali_clk_table[] =3D { + { IRIS_AXI_CLK, "iface" }, + { IRIS_CTRL_CLK, "core" }, + { IRIS_HW_CLK, "vcodec0_core" }, + { IRIS_AXI1_CLK, "iface1" }, + { IRIS_CTRL_FREERUN_CLK, "core_freerun" }, + { IRIS_HW_FREERUN_CLK, "vcodec0_core_freerun" }, + { IRIS_BSE_HW_CLK, "vcodec_bse" }, + { IRIS_VPP0_HW_CLK, "vcodec_vpp0" }, + { IRIS_VPP1_HW_CLK, "vcodec_vpp1" }, + { IRIS_APV_HW_CLK, "vcodec_apv" }, +}; + +static const char *const kaanapali_opp_clk_table[] =3D { + "vcodec0_core", + "vcodec_apv", + "vcodec_bse", + "core", + NULL, +}; + +static struct tz_cp_config tz_cp_config_kaanapali[] =3D { + { + .cp_start =3D VIDEO_REGION_VM0_SECURE_NP_ID, + .cp_size =3D 0, + .cp_nonpixel_start =3D 0x01000000, + .cp_nonpixel_size =3D 0x24800000, + }, + { + .cp_start =3D VIDEO_REGION_VM0_NONSECURE_NP_ID, + .cp_size =3D 0, + .cp_nonpixel_start =3D 0x25800000, + .cp_nonpixel_size =3D 0xda400000, + }, +}; + +static struct iris_context_bank kaanapali_cb_data[] =3D { + { + .name =3D "iris_bitstream", + .f_id =3D IRIS_BITSTREAM, + .region_mask =3D BIT(IRIS_BITSTREAM_REGION), + }, + { + .name =3D "iris_non_pixel", + .f_id =3D IRIS_NON_PIXEL, + .region_mask =3D BIT(IRIS_NON_PIXEL_REGION), + }, + { + .name =3D "iris_pixel", + .f_id =3D IRIS_PIXEL, + .region_mask =3D BIT(IRIS_PIXEL_REGION), + }, +}; + +#endif /* __IRIS_PLATFORM_KAANAPALI_H__ */ diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index 439e6e0fe8adf8287f81d26257ef2a7e9f21e53d..f6d8761daf0471d3aabec21c708= 445ee7698487b 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -406,6 +406,10 @@ static const struct dev_pm_ops iris_pm_ops =3D { }; =20 static const struct of_device_id iris_dt_match[] =3D { + { + .compatible =3D "qcom,kaanapali-iris", + .data =3D &kaanapali_data, + }, { .compatible =3D "qcom,qcs8300-iris", .data =3D &qcs8300_data, --=20 2.34.1