From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 02A3E358375; Thu, 12 Mar 2026 06:28:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296916; cv=none; b=tsttCHWh3NYo1kW03S9yXQnSUAJ/18Jf/Zwn4nQkrUqFBTf/cUDnyufE5Qo8NcRgux9PFGAEUjUTyuoOKog7BPe5TEz/Ar4YwdSh5tORGv6/KtAQka5iSXxwQOz+zWeH1CFYQBRqJUPBeW5tmfpnC+74msIQdgrBrTj42xm1FpQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296916; c=relaxed/simple; bh=VulyuWgkoLsxmBOeLgDF0beLPvgQfeLav/LDt2v0t0Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pzbsXPpJfBymQrgLDNvuCtnzkhjl/45pSVId0mUMABC2AejeK3GWTkBuEc1ukJ8jPmhcqqHk0yyGSKboTdi6sV7ydjCPGbNjztuPhcQQDOpQ4BRbsiJjX5AXQizanQGIb14eaV9hlqQDERfL7LwXRugFNpLrqpoV4cVpVc2Yvo0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FZaCBrDU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FZaCBrDU" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3E3F4C4CEF7; Thu, 12 Mar 2026 06:28:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773296915; bh=VulyuWgkoLsxmBOeLgDF0beLPvgQfeLav/LDt2v0t0Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FZaCBrDUioAwyME7r48tn+qHn7INOC7j3WbKdoI3EDLxsowXzlMTILTJpx4kFfj3B ulkHMQGITHraGXQU4j+Z0MmnAoG8JizZM7sccdxv7MckAx2WHkdZmLrxFTHdj4H9U7 h3xYBBJUsjUAnEfOuMsbjMkK8uqH4gdGUJmTMx/LbPhzdJNtYTPKsqdP4/EZurfMnG 5vQcPm8/1rG3ef78G52IMBIL4od0RgqfeAhJy0M4lGw6ibQ0Ua/GPSdF/0CXMwdIkl AM6QtGggCKe99MJCqXDhsjjFFWQb8/YVz6D4SatFNB8w2b+ZpaMAg7C6w8cM7oYM7P JtM8TDHT9anPA== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 01/15] arm64: dts: qcom: kodiak: Add EL2 overlay Date: Thu, 12 Mar 2026 11:57:42 +0530 Message-ID: <20260312062756.694390-2-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mukesh Ojha All the existing variants Kodiak boards are using Gunyah hypervisor which means that, so far, Linux-based OS could only boot in EL1 on those devices. However, it is possible for us to boot Linux at EL2 on these devices [1]. When running under Gunyah, the remote processor firmware IOMMU streams are controlled by Gunyah. However, without Gunyah, the IOMMU is managed by the consumer of this DeviceTree. Therefore, describe the firmware streams for each remote processor. Add a EL2-specific DT overlay and apply it to Kodiak IOT variant devices to create -el2.dtb for each of them alongside "normal" dtb. [1] https://docs.qualcomm.com/bundle/publicresource/topics/80-70020-4/boot-deve= loper-touchpoints.html#uefi Signed-off-by: Mukesh Ojha [SG: watchdog fixup] Signed-off-by: Sumit Garg --- arch/arm64/boot/dts/qcom/Makefile | 2 ++ arch/arm64/boot/dts/qcom/kodiak-el2.dtso | 35 ++++++++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/kodiak-el2.dtso diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index f80b5d9cf1e8..09a7f943190e 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -139,6 +139,8 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs615-ride.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-radxa-dragon-q6a.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2.dtb +qcs6490-rb3gen2-el2-dtbs :=3D qcs6490-rb3gen2.dtb kodiak-el2.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D qcs6490-rb3gen2-el2.dtb =20 qcs6490-rb3gen2-vision-mezzanine-dtbs :=3D qcs6490-rb3gen2.dtb qcs6490-rb3= gen2-vision-mezzanine.dtbo qcs6490-rb3gen2-industrial-mezzanine-dtbs :=3D qcs6490-rb3gen2.dtb qcs6490= -rb3gen2-industrial-mezzanine.dtbo diff --git a/arch/arm64/boot/dts/qcom/kodiak-el2.dtso b/arch/arm64/boot/dts= /qcom/kodiak-el2.dtso new file mode 100644 index 000000000000..0b3a69a0d765 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/kodiak-el2.dtso @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + * + * Kodiak specific modifications required to boot in EL2. + */ + + +/dts-v1/; +/plugin/; + +&gpu_zap_shader { + status =3D "disabled"; +}; + +&remoteproc_adsp { + iommus =3D <&apps_smmu 0x1800 0x0>; +}; + +&remoteproc_cdsp { + iommus =3D <&apps_smmu 0x11a0 0x0400>; +}; + +&remoteproc_wpss { + iommus =3D <&apps_smmu 0x1c03 0x1>, + <&apps_smmu 0x1c83 0x1>; +}; + +&venus { + status =3D "disabled"; +}; + +&watchdog { + status =3D "okay"; +}; --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C539F317170; Thu, 12 Mar 2026 06:28:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296932; cv=none; b=fKb29TWtTXQpfozJxtA5+ToIloZlYnXCig4TzAzYfT0snQEpBgC3AxGrQTAGPAJnAgbScSI3bdxxa+3LHZemEgnZREWBR09hwM3uKYMcygEIIgt/euPYS4GRBEQrW92wCtvOfXYcomsxSBDFGX+a5GXs3BJTV2yjdNebVeZJ3uE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296932; c=relaxed/simple; bh=3KEoOVG76eAU86T1OlKTBlOP2+juKXkWft8EkAGw4Vc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mq0+tjg9XrLX5BVuijNEt7tXt614S0Bw5YzW7/OdZ6xd0qktu68Ri9t4acD5YURjUGrS5tOPBJFSbswUo06ELO894YabUx8kr461Nt2OFTrXyqsQxerrwnXSzOQ3pnbPtkx6ImSip7t8bP9x4P6jNTNGTU4qgtCFLtd/3psyYyA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Tq9rVoeP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Tq9rVoeP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9308AC4CEF7; Thu, 12 Mar 2026 06:28:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773296932; bh=3KEoOVG76eAU86T1OlKTBlOP2+juKXkWft8EkAGw4Vc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Tq9rVoePVwddpg6WPDNCfFHyAgzsMLHRtcxOaobNhyQRYTnxYChH7McuATKc6Ckzj RVWpb4cMpJDBZ0bZj1AMpU/4/hPtB/gP+cEfcs9OFtPfU5HYRpzvvOSUyEE0Vfnv/X uo45YL90GqAxZJbSDclCaWutgRde/HyqDMMa0HhS9Q2F2Ea2gAP2+rUfXXYlHYGOEB Rirn8MnyNkMMUEtf6vX/ahjkjv6F1nnMJBhtKCOOx0EIHmu7vmQA7YkvO0kO8iwYrn qKHWruhLNzRRO4ukAzvI72pE1luvAehtRXsSRppqx5Zh3VHJuP/b0D4rzk+lccW3xg 8PKHSNYeEP1zQ== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 02/15] firmware: qcom: Add a generic PAS service Date: Thu, 12 Mar 2026 11:57:43 +0530 Message-ID: <20260312062756.694390-3-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Qcom platforms has the legacy of using non-standard SCM calls splintered over the various kernel drivers. These SCM calls aren't compliant with the standard SMC calling conventions which is a prerequisite to enable migration to the FF-A specifications from Arm. OP-TEE as an alternative trusted OS to Qualcomm TEE (QTEE) can't support these non-standard SCM calls. And even for newer architectures with S-EL2 and Hafnium support, QTEE won't be able to support SCM calls either with FF-A requirements coming in. And with both OP-TEE and QTEE drivers well integrated in the TEE subsystem, it makes further sense to reuse the TEE bus client drivers infrastructure. The added benefit of TEE bus infrastructure is that there is support for discoverable/enumerable services. With that client drivers don't have to manually invoke a special SCM call to know the service status. So enable the generic Peripheral Authentication Service (PAS) provided by the firmware. It acts as the common layer with different TZ backends plugged in whether it's an SCM implementation or a proper TEE bus based PAS service implementation. Signed-off-by: Sumit Garg --- drivers/firmware/qcom/Kconfig | 8 + drivers/firmware/qcom/Makefile | 1 + drivers/firmware/qcom/qcom_pas.c | 298 +++++++++++++++++++++++++ drivers/firmware/qcom/qcom_pas.h | 53 +++++ include/linux/firmware/qcom/qcom_pas.h | 41 ++++ 5 files changed, 401 insertions(+) create mode 100644 drivers/firmware/qcom/qcom_pas.c create mode 100644 drivers/firmware/qcom/qcom_pas.h create mode 100644 include/linux/firmware/qcom/qcom_pas.h diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index b477d54b495a..8653639d06db 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -6,6 +6,14 @@ =20 menu "Qualcomm firmware drivers" =20 +config QCOM_PAS + tristate + help + Enable the generic Peripheral Authentication Service (PAS) provided + by the firmware. It acts as the common layer with different TZ + backends plugged in whether it's an SCM implementation or a proper + TEE bus based PAS service implementation. + config QCOM_SCM select QCOM_TZMEM tristate diff --git a/drivers/firmware/qcom/Makefile b/drivers/firmware/qcom/Makefile index 0be40a1abc13..dc5ab45f906a 100644 --- a/drivers/firmware/qcom/Makefile +++ b/drivers/firmware/qcom/Makefile @@ -8,3 +8,4 @@ qcom-scm-objs +=3D qcom_scm.o qcom_scm-smc.o qcom_scm-legac= y.o obj-$(CONFIG_QCOM_TZMEM) +=3D qcom_tzmem.o obj-$(CONFIG_QCOM_QSEECOM) +=3D qcom_qseecom.o obj-$(CONFIG_QCOM_QSEECOM_UEFISECAPP) +=3D qcom_qseecom_uefisecapp.o +obj-$(CONFIG_QCOM_PAS) +=3D qcom_pas.o diff --git a/drivers/firmware/qcom/qcom_pas.c b/drivers/firmware/qcom/qcom_= pas.c new file mode 100644 index 000000000000..beb1bae55546 --- /dev/null +++ b/drivers/firmware/qcom/qcom_pas.c @@ -0,0 +1,298 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include + +#include "qcom_pas.h" + +struct qcom_pas_ops *ops_ptr; + +/** + * devm_qcom_pas_context_alloc() - Allocate peripheral authentication serv= ice + * context for a given peripheral + * + * PAS context is device-resource managed, so the caller does not need + * to worry about freeing the context memory. + * + * @dev: PAS firmware device + * @pas_id: peripheral authentication service id + * @mem_phys: Subsystem reserve memory start address + * @mem_size: Subsystem reserve memory size + * + * Return: The new PAS context, or ERR_PTR() on failure. + */ +struct qcom_pas_context *devm_qcom_pas_context_alloc(struct device *dev, + u32 pas_id, + phys_addr_t mem_phys, + size_t mem_size) +{ + struct qcom_pas_context *ctx; + + ctx =3D devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return ERR_PTR(-ENOMEM); + + ctx->dev =3D dev; + ctx->pas_id =3D pas_id; + ctx->mem_phys =3D mem_phys; + ctx->mem_size =3D mem_size; + + return ctx; +} +EXPORT_SYMBOL_GPL(devm_qcom_pas_context_alloc); + +/** + * qcom_pas_init_image() - Initialize peripheral authentication service st= ate + * machine for a given peripheral, using the metadata + * @pas_id: peripheral authentication service id + * @metadata: pointer to memory containing ELF header, program header table + * and optional blob of data used for authenticating the metadata + * and the rest of the firmware + * @size: size of the metadata + * @ctx: optional pas context + * + * Return: 0 on success. + * + * Upon successful return, the PAS metadata context (@ctx) will be used to + * track the metadata allocation, this needs to be released by invoking + * qcom_pas_metadata_release() by the caller. + */ +int qcom_pas_init_image(u32 pas_id, const void *metadata, size_t size, + struct qcom_pas_context *ctx) +{ + if (ops_ptr) + return ops_ptr->init_image(ops_ptr->dev, pas_id, + metadata, size, ctx); + + return -ENODEV; +} +EXPORT_SYMBOL_GPL(qcom_pas_init_image); + +/** + * qcom_pas_metadata_release() - release metadata context + * @ctx: pas context + */ +void qcom_pas_metadata_release(struct qcom_pas_context *ctx) +{ + if (!ctx || !ctx->ptr) + return; + + if (ops_ptr) + ops_ptr->metadata_release(ops_ptr->dev, ctx); +} +EXPORT_SYMBOL_GPL(qcom_pas_metadata_release); + +/** + * qcom_pas_mem_setup() - Prepare the memory related to a given peripheral + * for firmware loading + * @pas_id: peripheral authentication service id + * @addr: start address of memory area to prepare + * @size: size of the memory area to prepare + * + * Return: 0 on success. + */ +int qcom_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size) +{ + if (ops_ptr) + return ops_ptr->mem_setup(ops_ptr->dev, pas_id, addr, size); + + return -ENODEV; +} +EXPORT_SYMBOL_GPL(qcom_pas_mem_setup); + +/** + * qcom_pas_get_rsc_table() - Retrieve the resource table in passed output= buffer + * for a given peripheral. + * + * Qualcomm remote processor may rely on both static and dynamic resources= for + * its functionality. Static resources typically refer to memory-mapped + * addresses required by the subsystem and are often embedded within the + * firmware binary and dynamic resources, such as shared memory in DDR etc= ., + * are determined at runtime during the boot process. + * + * On Qualcomm Technologies devices, it's possible that static resources a= re + * not embedded in the firmware binary and instead are provided by TrustZo= ne. + * However, dynamic resources are always expected to come from TrustZone. = This + * indicates that for Qualcomm devices, all resources (static and dynamic)= will + * be provided by TrustZone PAS service. + * + * If the remote processor firmware binary does contain static resources, = they + * should be passed in input_rt. These will be forwarded to TrustZone for + * authentication. TrustZone will then append the dynamic resources and re= turn + * the complete resource table in output_rt_tzm. + * + * If the remote processor firmware binary does not include a resource tab= le, + * the caller of this function should set input_rt as NULL and input_rt_si= ze + * as zero respectively. + * + * More about documentation on resource table data structures can be found= in + * include/linux/remoteproc.h + * + * @ctx: PAS context + * @pas_id: peripheral authentication service id + * @input_rt: resource table buffer which is present in firmware bin= ary + * @input_rt_size: size of the resource table present in firmware binary + * @output_rt_size: TrustZone expects caller should pass worst case size f= or + * the output_rt_tzm. + * + * Return: + * On success, returns a pointer to the allocated buffer containing the f= inal + * resource table and output_rt_size will have actual resource table size= from + * TrustZone. The caller is responsible for freeing the buffer. On failur= e, + * returns ERR_PTR(-errno). + */ +struct resource_table *qcom_pas_get_rsc_table(struct qcom_pas_context *ctx, + void *input_rt, + size_t input_rt_size, + size_t *output_rt_size) +{ + if (ops_ptr) + return ops_ptr->get_rsc_table(ops_ptr->dev, ctx, input_rt, + input_rt_size, output_rt_size); + + return ERR_PTR(-ENODEV); +} +EXPORT_SYMBOL_GPL(qcom_pas_get_rsc_table); + +/** + * qcom_pas_auth_and_reset() - Authenticate the given peripheral firmware + * and reset the remote processor + * @pas_id: peripheral authentication service id + * + * Return: 0 on success. + */ +int qcom_pas_auth_and_reset(u32 pas_id) +{ + if (ops_ptr) + return ops_ptr->auth_and_reset(ops_ptr->dev, pas_id); + + return -ENODEV; +} +EXPORT_SYMBOL_GPL(qcom_pas_auth_and_reset); + +/** + * qcom_pas_prepare_and_auth_reset() - Prepare, authenticate, and reset the + * remote processor + * + * @ctx: Context saved during call to qcom_scm_pas_context_init() + * + * This function performs the necessary steps to prepare a PAS subsystem, + * authenticate it using the provided metadata, and initiate a reset seque= nce. + * + * It should be used when Linux is in control setting up the IOMMU hardware + * for remote subsystem during secure firmware loading processes. The + * preparation step sets up a shmbridge over the firmware memory before + * TrustZone accesses the firmware memory region for authentication. The + * authentication step verifies the integrity and authenticity of the firm= ware + * or configuration using secure metadata. Finally, the reset step ensures= the + * subsystem starts in a clean and sane state. + * + * Return: 0 on success, negative errno on failure. + */ +int qcom_pas_prepare_and_auth_reset(struct qcom_pas_context *ctx) +{ + if (ops_ptr) + return ops_ptr->prepare_and_auth_reset(ops_ptr->dev, ctx); + + return -ENODEV; +} +EXPORT_SYMBOL_GPL(qcom_pas_prepare_and_auth_reset); + +/** + * qcom_pas_set_remote_state() - Set the remote processor state + * @state: peripheral state + * @pas_id: peripheral authentication service id + * + * Return: 0 on success. + */ +int qcom_pas_set_remote_state(u32 state, u32 pas_id) +{ + if (ops_ptr) + return ops_ptr->set_remote_state(ops_ptr->dev, state, pas_id); + + return -ENODEV; +} +EXPORT_SYMBOL_GPL(qcom_pas_set_remote_state); + +/** + * qcom_pas_shutdown() - Shut down the remote processor + * @pas_id: peripheral authentication service id + * + * Return: 0 on success. + */ +int qcom_pas_shutdown(u32 pas_id) +{ + if (ops_ptr) + return ops_ptr->shutdown(ops_ptr->dev, pas_id); + + return -ENODEV; +} +EXPORT_SYMBOL_GPL(qcom_pas_shutdown); + +/** + * qcom_pas_supported() - Check if the peripheral authentication service is + * available for the given peripheral + * @pas_id: peripheral authentication service id + * + * Return: true if PAS is supported for this peripheral, otherwise false. + */ +bool qcom_pas_supported(u32 pas_id) +{ + if (ops_ptr) + return ops_ptr->supported(ops_ptr->dev, pas_id); + + return false; +} +EXPORT_SYMBOL_GPL(qcom_pas_supported); + +/** + * qcom_pas_is_available() - Check for PAS service + * + * Return: true on success. + */ +bool qcom_pas_is_available(void) +{ + /* + * The barrier for ops_ptr is intended to synchronize the data stores + * for the ops data structure when client drivers are in parallel + * checking for PAS service availability. + * + * Once the PAS backend becomes available, it is allowed for multiple + * threads to enter TZ for parallel bringup of co-processors during + * boot. + */ + return !!smp_load_acquire(&ops_ptr); +} +EXPORT_SYMBOL_GPL(qcom_pas_is_available); + +/** + * qcom_pas_ops_register() - Register PAS service ops + * @ops: PAS service ops pointer + */ +void qcom_pas_ops_register(struct qcom_pas_ops *ops) +{ + if (!qcom_pas_is_available()) + /* Paired with smp_load_acquire() in qcom_pas_is_available() */ + smp_store_release(&ops_ptr, ops); + else + pr_err("qcom_pas: ops already registered\n"); +} +EXPORT_SYMBOL_GPL(qcom_pas_ops_register); + +/** + * qcom_pas_ops_unregister() - Unregister PAS service ops + */ +void qcom_pas_ops_unregister(void) +{ + /* Paired with smp_load_acquire() in qcom_pas_is_available() */ + smp_store_release(&ops_ptr, NULL); +} +EXPORT_SYMBOL_GPL(qcom_pas_ops_unregister); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Qualcomm common TZ PAS driver"); diff --git a/drivers/firmware/qcom/qcom_pas.h b/drivers/firmware/qcom/qcom_= pas.h new file mode 100644 index 000000000000..4ebed22178f8 --- /dev/null +++ b/drivers/firmware/qcom/qcom_pas.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef __QCOM_PAS_INT_H +#define __QCOM_PAS_INT_H + +struct device; + +/** + * struct qcom_pas_ops - Qcom Peripheral Authentication Service (PAS) ops + * @drv_name: PAS driver name. + * @dev: PAS device pointer. + * @supported: Peripheral supported callback. + * @init_image: Peripheral image initialization callback. + * @mem_setup: Peripheral memory setup callback. + * @get_rsc_table: Peripheral get resource table callback. + * @prepare_and_auth_reset: Peripheral prepare firmware authentication and + * reset callback. + * @auth_and_reset: Peripheral firmware authentication and reset + * callback. + * @set_remote_state: Peripheral set remote state callback. + * @shutdown: Peripheral shutdown callback. + * @metadata_release: Image metadata release callback. + */ +struct qcom_pas_ops { + const char *drv_name; + struct device *dev; + bool (*supported)(struct device *dev, u32 pas_id); + int (*init_image)(struct device *dev, u32 pas_id, + const void *metadata, size_t size, + struct qcom_pas_context *ctx); + int (*mem_setup)(struct device *dev, u32 pas_id, + phys_addr_t addr, phys_addr_t size); + void *(*get_rsc_table)(struct device *dev, + struct qcom_pas_context *ctx, + void *input_rt, + size_t input_rt_size, + size_t *output_rt_size); + int (*prepare_and_auth_reset)(struct device *dev, + struct qcom_pas_context *ctx); + int (*auth_and_reset)(struct device *dev, u32 pas_id); + int (*set_remote_state)(struct device *dev, u32 state, u32 pas_id); + int (*shutdown)(struct device *dev, u32 pas_id); + void (*metadata_release)(struct device *dev, + struct qcom_pas_context *ctx); +}; + +void qcom_pas_ops_register(struct qcom_pas_ops *ops); +void qcom_pas_ops_unregister(void); + +#endif /* __QCOM_PAS_INT_H */ diff --git a/include/linux/firmware/qcom/qcom_pas.h b/include/linux/firmwar= e/qcom/qcom_pas.h new file mode 100644 index 000000000000..ef7328ecfa47 --- /dev/null +++ b/include/linux/firmware/qcom/qcom_pas.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef __QCOM_PAS_H +#define __QCOM_PAS_H + +#include +#include + +struct qcom_pas_context { + struct device *dev; + u32 pas_id; + phys_addr_t mem_phys; + size_t mem_size; + void *ptr; + dma_addr_t phys; + ssize_t size; + bool use_tzmem; +}; + +bool qcom_pas_is_available(void); +struct qcom_pas_context *devm_qcom_pas_context_alloc(struct device *dev, + u32 pas_id, + phys_addr_t mem_phys, + size_t mem_size); +int qcom_pas_init_image(u32 pas_id, const void *metadata, size_t size, + struct qcom_pas_context *ctx); +struct resource_table *qcom_pas_get_rsc_table(struct qcom_pas_context *ctx, + void *input_rt, size_t input_rt_size, + size_t *output_rt_size); +int qcom_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size); +int qcom_pas_auth_and_reset(u32 pas_id); +int qcom_pas_prepare_and_auth_reset(struct qcom_pas_context *ctx); +int qcom_pas_set_remote_state(u32 state, u32 pas_id); +int qcom_pas_shutdown(u32 pas_id); +bool qcom_pas_supported(u32 pas_id); +void qcom_pas_metadata_release(struct qcom_pas_context *ctx); + +#endif /* __QCOM_PAS_H */ --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AFCCC2550AF; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tp4tmN2l" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 23551C4AF0E; Thu, 12 Mar 2026 06:28:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773296950; bh=TprJHVQUk78N2ZO3Ieo2ufCYgJHKDfjV2VWmAhwPRec=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tp4tmN2lX07uuVtn2vgxilcKttz6XDQCphUGCHT7E4gHptyw7UI6zriIXzVU3i01k rttPttKZfJU3vzyLa1TWWK2gyuxZZ5VD02LIWAL/0rE65aXkY1XGuyS/z+OQ14Z5FA B41y2pwbpEmy/96ivrIEB9pBX0Ls1otgNy7+bfvngonoVA8E24rQRJC4mjdFuqynAm OVKKv9mpkTlKkDDnCVRYQa22qWmfQpCMG5BUKYl3Ea3Ha2/5t3T+e+sOK0ySrhNG7D xFKYNwvr+XQAWTQFfjNoupZb6p6ko88PK2oGsYah+dD/TJsbNzniW3+WEMKmj0MiHX NOzI4pq6UNTiw== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 03/15] firmware: qcom_scm: Migrate to generic PAS service Date: Thu, 12 Mar 2026 11:57:44 +0530 Message-ID: <20260312062756.694390-4-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg With the availability of generic PAS service, let's add SCM calls as a backend to keep supporting legacy QTEE interfaces. The exported qcom_scm* wrappers will get dropped once all the client drivers get migrated as part of future patches. Signed-off-by: Sumit Garg --- drivers/firmware/qcom/Kconfig | 1 + drivers/firmware/qcom/qcom_scm.c | 336 ++++++++++++++----------------- 2 files changed, 156 insertions(+), 181 deletions(-) diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 8653639d06db..9a12ae2b639d 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -15,6 +15,7 @@ config QCOM_PAS TEE bus based PAS service implementation. =20 config QCOM_SCM + select QCOM_PAS select QCOM_TZMEM tristate =20 diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 8fbc96693a55..2d7937ae7c8f 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,7 @@ =20 #include =20 +#include "qcom_pas.h" #include "qcom_scm.h" #include "qcom_tzmem.h" =20 @@ -480,25 +482,6 @@ void qcom_scm_cpu_power_down(u32 flags) } EXPORT_SYMBOL_GPL(qcom_scm_cpu_power_down); =20 -int qcom_scm_set_remote_state(u32 state, u32 id) -{ - struct qcom_scm_desc desc =3D { - .svc =3D QCOM_SCM_SVC_BOOT, - .cmd =3D QCOM_SCM_BOOT_SET_REMOTE_STATE, - .arginfo =3D QCOM_SCM_ARGS(2), - .args[0] =3D state, - .args[1] =3D id, - .owner =3D ARM_SMCCC_OWNER_SIP, - }; - struct qcom_scm_res res; - int ret; - - ret =3D qcom_scm_call(__scm->dev, &desc, &res); - - return ret ? : res.result[0]; -} -EXPORT_SYMBOL_GPL(qcom_scm_set_remote_state); - static int qcom_scm_disable_sdi(void) { int ret; @@ -571,26 +554,12 @@ static void qcom_scm_set_download_mode(u32 dload_mode) dev_err(__scm->dev, "failed to set download mode: %d\n", ret); } =20 -/** - * devm_qcom_scm_pas_context_alloc() - Allocate peripheral authentication = service - * context for a given peripheral - * - * PAS context is device-resource managed, so the caller does not need - * to worry about freeing the context memory. - * - * @dev: PAS firmware device - * @pas_id: peripheral authentication service id - * @mem_phys: Subsystem reserve memory start address - * @mem_size: Subsystem reserve memory size - * - * Returns: The new PAS context, or ERR_PTR() on failure. - */ struct qcom_scm_pas_context *devm_qcom_scm_pas_context_alloc(struct device= *dev, u32 pas_id, phys_addr_t mem_phys, size_t mem_size) { - struct qcom_scm_pas_context *ctx; + struct qcom_pas_context *ctx; =20 ctx =3D devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -601,11 +570,12 @@ struct qcom_scm_pas_context *devm_qcom_scm_pas_contex= t_alloc(struct device *dev, ctx->mem_phys =3D mem_phys; ctx->mem_size =3D mem_size; =20 - return ctx; + return (struct qcom_scm_pas_context *)ctx; } EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc); =20 -static int __qcom_scm_pas_init_image(u32 pas_id, dma_addr_t mdata_phys, +static int __qcom_scm_pas_init_image(struct device *dev, u32 pas_id, + dma_addr_t mdata_phys, struct qcom_scm_res *res) { struct qcom_scm_desc desc =3D { @@ -627,7 +597,7 @@ static int __qcom_scm_pas_init_image(u32 pas_id, dma_ad= dr_t mdata_phys, =20 desc.args[1] =3D mdata_phys; =20 - ret =3D qcom_scm_call(__scm->dev, &desc, res); + ret =3D qcom_scm_call(dev, &desc, res); qcom_scm_bw_disable(); =20 disable_clk: @@ -636,7 +606,8 @@ static int __qcom_scm_pas_init_image(u32 pas_id, dma_ad= dr_t mdata_phys, return ret; } =20 -static int qcom_scm_pas_prep_and_init_image(struct qcom_scm_pas_context *c= tx, +static int qcom_scm_pas_prep_and_init_image(struct device *dev, + struct qcom_pas_context *ctx, const void *metadata, size_t size) { struct qcom_scm_res res; @@ -651,7 +622,7 @@ static int qcom_scm_pas_prep_and_init_image(struct qcom= _scm_pas_context *ctx, memcpy(mdata_buf, metadata, size); mdata_phys =3D qcom_tzmem_to_phys(mdata_buf); =20 - ret =3D __qcom_scm_pas_init_image(ctx->pas_id, mdata_phys, &res); + ret =3D __qcom_scm_pas_init_image(dev, ctx->pas_id, mdata_phys, &res); if (ret < 0) qcom_tzmem_free(mdata_buf); else @@ -660,25 +631,9 @@ static int qcom_scm_pas_prep_and_init_image(struct qco= m_scm_pas_context *ctx, return ret ? : res.result[0]; } =20 -/** - * qcom_scm_pas_init_image() - Initialize peripheral authentication service - * state machine for a given peripheral, using the - * metadata - * @pas_id: peripheral authentication service id - * @metadata: pointer to memory containing ELF header, program header table - * and optional blob of data used for authenticating the metadata - * and the rest of the firmware - * @size: size of the metadata - * @ctx: optional pas context - * - * Return: 0 on success. - * - * Upon successful return, the PAS metadata context (@ctx) will be used to - * track the metadata allocation, this needs to be released by invoking - * qcom_scm_pas_metadata_release() by the caller. - */ -int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size, - struct qcom_scm_pas_context *ctx) +static int __qcom_scm_pas_init_image2(struct device *dev, u32 pas_id, + const void *metadata, size_t size, + struct qcom_pas_context *ctx) { struct qcom_scm_res res; dma_addr_t mdata_phys; @@ -686,7 +641,8 @@ int qcom_scm_pas_init_image(u32 pas_id, const void *met= adata, size_t size, int ret; =20 if (ctx && ctx->use_tzmem) - return qcom_scm_pas_prep_and_init_image(ctx, metadata, size); + return qcom_scm_pas_prep_and_init_image(dev, ctx, metadata, + size); =20 /* * During the scm call memory protection will be enabled for the meta @@ -700,16 +656,15 @@ int qcom_scm_pas_init_image(u32 pas_id, const void *m= etadata, size_t size, * If we pass a buffer that is already part of an SHM Bridge to this * call, it will fail. */ - mdata_buf =3D dma_alloc_coherent(__scm->dev, size, &mdata_phys, - GFP_KERNEL); + mdata_buf =3D dma_alloc_coherent(dev, size, &mdata_phys, GFP_KERNEL); if (!mdata_buf) return -ENOMEM; =20 memcpy(mdata_buf, metadata, size); =20 - ret =3D __qcom_scm_pas_init_image(pas_id, mdata_phys, &res); + ret =3D __qcom_scm_pas_init_image(dev, pas_id, mdata_phys, &res); if (ret < 0 || !ctx) { - dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys); + dma_free_coherent(dev, size, mdata_buf, mdata_phys); } else if (ctx) { ctx->ptr =3D mdata_buf; ctx->phys =3D mdata_phys; @@ -718,36 +673,35 @@ int qcom_scm_pas_init_image(u32 pas_id, const void *m= etadata, size_t size, =20 return ret ? : res.result[0]; } -EXPORT_SYMBOL_GPL(qcom_scm_pas_init_image); =20 -/** - * qcom_scm_pas_metadata_release() - release metadata context - * @ctx: pas context - */ -void qcom_scm_pas_metadata_release(struct qcom_scm_pas_context *ctx) +int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size, + struct qcom_scm_pas_context *ctx) { - if (!ctx->ptr) - return; + return __qcom_scm_pas_init_image2(__scm->dev, pas_id, metadata, size, + (struct qcom_pas_context *)ctx); +} +EXPORT_SYMBOL_GPL(qcom_scm_pas_init_image); =20 +static void __qcom_scm_pas_metadata_release(struct device *dev, + struct qcom_pas_context *ctx) +{ if (ctx->use_tzmem) qcom_tzmem_free(ctx->ptr); else - dma_free_coherent(__scm->dev, ctx->size, ctx->ptr, ctx->phys); + dma_free_coherent(dev, ctx->size, ctx->ptr, ctx->phys); =20 ctx->ptr =3D NULL; } + +void qcom_scm_pas_metadata_release(struct qcom_scm_pas_context *ctx) +{ + __qcom_scm_pas_metadata_release(__scm->dev, + (struct qcom_pas_context *)ctx); +} EXPORT_SYMBOL_GPL(qcom_scm_pas_metadata_release); =20 -/** - * qcom_scm_pas_mem_setup() - Prepare the memory related to a given periph= eral - * for firmware loading - * @pas_id: peripheral authentication service id - * @addr: start address of memory area to prepare - * @size: size of the memory area to prepare - * - * Returns 0 on success. - */ -int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size) +static int __qcom_scm_pas_mem_setup(struct device *dev, u32 pas_id, + phys_addr_t addr, phys_addr_t size) { int ret; struct qcom_scm_desc desc =3D { @@ -769,7 +723,7 @@ int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr= , phys_addr_t size) if (ret) goto disable_clk; =20 - ret =3D qcom_scm_call(__scm->dev, &desc, &res); + ret =3D qcom_scm_call(dev, &desc, &res); qcom_scm_bw_disable(); =20 disable_clk: @@ -777,9 +731,15 @@ int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t add= r, phys_addr_t size) =20 return ret ? : res.result[0]; } + +int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size) +{ + return __qcom_scm_pas_mem_setup(__scm->dev, pas_id, addr, size); +} EXPORT_SYMBOL_GPL(qcom_scm_pas_mem_setup); =20 -static void *__qcom_scm_pas_get_rsc_table(u32 pas_id, void *input_rt_tzm, +static void *__qcom_scm_pas_get_rsc_table(struct device *dev, u32 pas_id, + void *input_rt_tzm, size_t input_rt_size, size_t *output_rt_size) { @@ -814,7 +774,7 @@ static void *__qcom_scm_pas_get_rsc_table(u32 pas_id, v= oid *input_rt_tzm, * with output_rt_tzm buffer with res.result[2] size however, It should n= ot * be of unresonable size. */ - ret =3D qcom_scm_call(__scm->dev, &desc, &res); + ret =3D qcom_scm_call(dev, &desc, &res); if (!ret && res.result[2] > SZ_1G) { ret =3D -E2BIG; goto free_output_rt; @@ -831,51 +791,11 @@ static void *__qcom_scm_pas_get_rsc_table(u32 pas_id,= void *input_rt_tzm, return ret ? ERR_PTR(ret) : output_rt_tzm; } =20 -/** - * qcom_scm_pas_get_rsc_table() - Retrieve the resource table in passed ou= tput buffer - * for a given peripheral. - * - * Qualcomm remote processor may rely on both static and dynamic resources= for - * its functionality. Static resources typically refer to memory-mapped ad= dresses - * required by the subsystem and are often embedded within the firmware bi= nary - * and dynamic resources, such as shared memory in DDR etc., are determine= d at - * runtime during the boot process. - * - * On Qualcomm Technologies devices, it's possible that static resources a= re not - * embedded in the firmware binary and instead are provided by TrustZone H= owever, - * dynamic resources are always expected to come from TrustZone. This indi= cates - * that for Qualcomm devices, all resources (static and dynamic) will be p= rovided - * by TrustZone via the SMC call. - * - * If the remote processor firmware binary does contain static resources, = they - * should be passed in input_rt. These will be forwarded to TrustZone for - * authentication. TrustZone will then append the dynamic resources and re= turn - * the complete resource table in output_rt_tzm. - * - * If the remote processor firmware binary does not include a resource tab= le, - * the caller of this function should set input_rt as NULL and input_rt_si= ze - * as zero respectively. - * - * More about documentation on resource table data structures can be found= in - * include/linux/remoteproc.h - * - * @ctx: PAS context - * @pas_id: peripheral authentication service id - * @input_rt: resource table buffer which is present in firmware bin= ary - * @input_rt_size: size of the resource table present in firmware binary - * @output_rt_size: TrustZone expects caller should pass worst case size f= or - * the output_rt_tzm. - * - * Return: - * On success, returns a pointer to the allocated buffer containing the f= inal - * resource table and output_rt_size will have actual resource table size= from - * TrustZone. The caller is responsible for freeing the buffer. On failur= e, - * returns ERR_PTR(-errno). - */ -struct resource_table *qcom_scm_pas_get_rsc_table(struct qcom_scm_pas_cont= ext *ctx, - void *input_rt, - size_t input_rt_size, - size_t *output_rt_size) +static void *__qcom_scm_pas_get_rsc_table2(struct device *dev, + struct qcom_pas_context *ctx, + void *input_rt, + size_t input_rt_size, + size_t *output_rt_size) { struct resource_table empty_rsc =3D {}; size_t size =3D SZ_16K; @@ -910,11 +830,12 @@ struct resource_table *qcom_scm_pas_get_rsc_table(str= uct qcom_scm_pas_context *c =20 memcpy(input_rt_tzm, input_rt, input_rt_size); =20 - output_rt_tzm =3D __qcom_scm_pas_get_rsc_table(ctx->pas_id, input_rt_tzm, + output_rt_tzm =3D __qcom_scm_pas_get_rsc_table(dev, ctx->pas_id, + input_rt_tzm, input_rt_size, &size); if (PTR_ERR(output_rt_tzm) =3D=3D -EOVERFLOW) /* Try again with the size requested by the TZ */ - output_rt_tzm =3D __qcom_scm_pas_get_rsc_table(ctx->pas_id, + output_rt_tzm =3D __qcom_scm_pas_get_rsc_table(dev, ctx->pas_id, input_rt_tzm, input_rt_size, &size); @@ -945,16 +866,20 @@ struct resource_table *qcom_scm_pas_get_rsc_table(str= uct qcom_scm_pas_context *c =20 return ret ? ERR_PTR(ret) : tbl_ptr; } + +struct resource_table *qcom_scm_pas_get_rsc_table(struct qcom_scm_pas_cont= ext *ctx, + void *input_rt, + size_t input_rt_size, + size_t *output_rt_size) +{ + return __qcom_scm_pas_get_rsc_table2(__scm->dev, + (struct qcom_pas_context *)ctx, + input_rt, input_rt_size, + output_rt_size); +} EXPORT_SYMBOL_GPL(qcom_scm_pas_get_rsc_table); =20 -/** - * qcom_scm_pas_auth_and_reset() - Authenticate the given peripheral firmw= are - * and reset the remote processor - * @pas_id: peripheral authentication service id - * - * Return 0 on success. - */ -int qcom_scm_pas_auth_and_reset(u32 pas_id) +static int __qcom_scm_pas_auth_and_reset(struct device *dev, u32 pas_id) { int ret; struct qcom_scm_desc desc =3D { @@ -974,7 +899,7 @@ int qcom_scm_pas_auth_and_reset(u32 pas_id) if (ret) goto disable_clk; =20 - ret =3D qcom_scm_call(__scm->dev, &desc, &res); + ret =3D qcom_scm_call(dev, &desc, &res); qcom_scm_bw_disable(); =20 disable_clk: @@ -982,28 +907,15 @@ int qcom_scm_pas_auth_and_reset(u32 pas_id) =20 return ret ? : res.result[0]; } + +int qcom_scm_pas_auth_and_reset(u32 pas_id) +{ + return __qcom_scm_pas_auth_and_reset(__scm->dev, pas_id); +} EXPORT_SYMBOL_GPL(qcom_scm_pas_auth_and_reset); =20 -/** - * qcom_scm_pas_prepare_and_auth_reset() - Prepare, authenticate, and rese= t the - * remote processor - * - * @ctx: Context saved during call to qcom_scm_pas_context_init() - * - * This function performs the necessary steps to prepare a PAS subsystem, - * authenticate it using the provided metadata, and initiate a reset seque= nce. - * - * It should be used when Linux is in control setting up the IOMMU hardware - * for remote subsystem during secure firmware loading processes. The prep= aration - * step sets up a shmbridge over the firmware memory before TrustZone acce= sses the - * firmware memory region for authentication. The authentication step veri= fies - * the integrity and authenticity of the firmware or configuration using s= ecure - * metadata. Finally, the reset step ensures the subsystem starts in a cle= an and - * sane state. - * - * Return: 0 on success, negative errno on failure. - */ -int qcom_scm_pas_prepare_and_auth_reset(struct qcom_scm_pas_context *ctx) +static int __qcom_scm_pas_prepare_and_auth_reset(struct device *dev, + struct qcom_pas_context *ctx) { u64 handle; int ret; @@ -1014,7 +926,7 @@ int qcom_scm_pas_prepare_and_auth_reset(struct qcom_sc= m_pas_context *ctx) * memory region and then invokes a call to TrustZone to authenticate. */ if (!ctx->use_tzmem) - return qcom_scm_pas_auth_and_reset(ctx->pas_id); + return __qcom_scm_pas_auth_and_reset(dev, ctx->pas_id); =20 /* * When Linux runs @ EL2 Linux must create the shmbridge itself and then @@ -1024,20 +936,45 @@ int qcom_scm_pas_prepare_and_auth_reset(struct qcom_= scm_pas_context *ctx) if (ret) return ret; =20 - ret =3D qcom_scm_pas_auth_and_reset(ctx->pas_id); + ret =3D __qcom_scm_pas_auth_and_reset(dev, ctx->pas_id); qcom_tzmem_shm_bridge_delete(handle); =20 return ret; } + +int qcom_scm_pas_prepare_and_auth_reset(struct qcom_scm_pas_context *ctx) +{ + return __qcom_scm_pas_prepare_and_auth_reset(__scm->dev, + (struct qcom_pas_context *)ctx); +} EXPORT_SYMBOL_GPL(qcom_scm_pas_prepare_and_auth_reset); =20 -/** - * qcom_scm_pas_shutdown() - Shut down the remote processor - * @pas_id: peripheral authentication service id - * - * Returns 0 on success. - */ -int qcom_scm_pas_shutdown(u32 pas_id) +static int __qcom_scm_pas_set_remote_state(struct device *dev, u32 state, + u32 pas_id) +{ + struct qcom_scm_desc desc =3D { + .svc =3D QCOM_SCM_SVC_BOOT, + .cmd =3D QCOM_SCM_BOOT_SET_REMOTE_STATE, + .arginfo =3D QCOM_SCM_ARGS(2), + .args[0] =3D state, + .args[1] =3D pas_id, + .owner =3D ARM_SMCCC_OWNER_SIP, + }; + struct qcom_scm_res res; + int ret; + + ret =3D qcom_scm_call(dev, &desc, &res); + + return ret ? : res.result[0]; +} + +int qcom_scm_set_remote_state(u32 state, u32 id) +{ + return __qcom_scm_pas_set_remote_state(__scm->dev, state, id); +} +EXPORT_SYMBOL_GPL(qcom_scm_set_remote_state); + +static int __qcom_scm_pas_shutdown(struct device *dev, u32 pas_id) { int ret; struct qcom_scm_desc desc =3D { @@ -1057,7 +994,7 @@ int qcom_scm_pas_shutdown(u32 pas_id) if (ret) goto disable_clk; =20 - ret =3D qcom_scm_call(__scm->dev, &desc, &res); + ret =3D qcom_scm_call(dev, &desc, &res); qcom_scm_bw_disable(); =20 disable_clk: @@ -1065,16 +1002,14 @@ int qcom_scm_pas_shutdown(u32 pas_id) =20 return ret ? : res.result[0]; } + +int qcom_scm_pas_shutdown(u32 pas_id) +{ + return __qcom_scm_pas_shutdown(__scm->dev, pas_id); +} EXPORT_SYMBOL_GPL(qcom_scm_pas_shutdown); =20 -/** - * qcom_scm_pas_supported() - Check if the peripheral authentication servi= ce is - * available for the given peripherial - * @pas_id: peripheral authentication service id - * - * Returns true if PAS is supported for this peripheral, otherwise false. - */ -bool qcom_scm_pas_supported(u32 pas_id) +static bool __qcom_scm_pas_supported(struct device *dev, u32 pas_id) { int ret; struct qcom_scm_desc desc =3D { @@ -1086,16 +1021,49 @@ bool qcom_scm_pas_supported(u32 pas_id) }; struct qcom_scm_res res; =20 - if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, + if (!__qcom_scm_is_call_available(dev, QCOM_SCM_SVC_PIL, QCOM_SCM_PIL_PAS_IS_SUPPORTED)) return false; =20 - ret =3D qcom_scm_call(__scm->dev, &desc, &res); + ret =3D qcom_scm_call(dev, &desc, &res); =20 return ret ? false : !!res.result[0]; } + +bool qcom_scm_pas_supported(u32 pas_id) +{ + return __qcom_scm_pas_supported(__scm->dev, pas_id); +} EXPORT_SYMBOL_GPL(qcom_scm_pas_supported); =20 +static struct qcom_pas_ops qcom_pas_ops_scm =3D { + .drv_name =3D "qcom_scm", + .supported =3D __qcom_scm_pas_supported, + .init_image =3D __qcom_scm_pas_init_image2, + .mem_setup =3D __qcom_scm_pas_mem_setup, + .get_rsc_table =3D __qcom_scm_pas_get_rsc_table2, + .auth_and_reset =3D __qcom_scm_pas_auth_and_reset, + .prepare_and_auth_reset =3D __qcom_scm_pas_prepare_and_auth_reset, + .set_remote_state =3D __qcom_scm_pas_set_remote_state, + .shutdown =3D __qcom_scm_pas_shutdown, + .metadata_release =3D __qcom_scm_pas_metadata_release, +}; + +/** + * qcom_scm_is_pas_available() - Check if the peripheral authentication se= rvice + * is available via SCM or not + * + * Returns true if PAS is available, otherwise false. + */ +static bool qcom_scm_is_pas_available(void) +{ + if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, + QCOM_SCM_PIL_PAS_AUTH_AND_RESET)) + return false; + + return true; +} + static int __qcom_scm_pas_mss_reset(struct device *dev, bool reset) { struct qcom_scm_desc desc =3D { @@ -2782,6 +2750,11 @@ static int qcom_scm_probe(struct platform_device *pd= ev) =20 __get_convention(); =20 + if (qcom_scm_is_pas_available()) { + qcom_pas_ops_scm.dev =3D scm->dev; + qcom_pas_ops_register(&qcom_pas_ops_scm); + } + /* * If "download mode" is requested, from this point on warmboot * will cause the boot stages to enter download mode, unless @@ -2818,6 +2791,7 @@ static void qcom_scm_shutdown(struct platform_device = *pdev) { /* Clean shutdown, disable download mode to allow normal restart */ qcom_scm_set_download_mode(QCOM_DLOAD_NODUMP); + qcom_pas_ops_unregister(); } =20 static const struct of_device_id qcom_scm_dt_match[] =3D { --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE038347522; Thu, 12 Mar 2026 06:29:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296967; cv=none; b=Dian92RHMSRIg+t7OuDZrSNxBA3gp6SgpA7WW2HgpTYEvQtJWzXWaf6RDLtb4HIQMzMrpMX5ZAQjo/mzn14/6R9Vt4Sig9j0wfzA2lDVPr8fel5rT4604TzC0Qb7Ugq33rSr00gk23mivBhLpAdy9VcS/HDCHo0Js8RhKto5Uto= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296967; c=relaxed/simple; bh=20CdrcbdyGSAza6/TbCfRCZke3TDaoxzuGdhBEGM0RI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ENPt+lut9lNUE3ac+4vD0Jk2TUmuATMT/LZSsGwmb7y+8S+FRxm+R1edQNijAnVevmAYWhNysXAofgzjIMpDTi3szjVt7obra038KC5tlo1Aymrn23zae80k+//kre1vw38S6z5CRgVoPOwessdASUrPCvQ7eQ8UwIl9l6ri/y8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N9ziGsHH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N9ziGsHH" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 13B7DC2BCB0; Thu, 12 Mar 2026 06:29:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773296966; bh=20CdrcbdyGSAza6/TbCfRCZke3TDaoxzuGdhBEGM0RI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N9ziGsHHsDHwtntOgqywSmH0dPl/Ruw56VA8ZcPRlC9RauUruISTOEOJCGpEPQZRJ U1kZHrc1fIsHUHkd0LhAwUjzNBvL2qB7G6vHJ4xGhPfY5aHaX0HYbQm/WQeWn51NQY Z5qMSoYwQTDQ8Aj4iNbdO5fDuX8Zwi+UdfXcL4YKTuIO2ANxWPE8qM98Ptjfygi2jG 3yExNAOP0xORkg2xokdnjY/eO36d5qUikj7zufkWrnNyYmbElNRZup+LrR5GhCEC1K EBc6Ak7+FiNIrnOQObIivWfVZftkVzi/0HKInbJjBQ6OnfN3lY23FhdJvx2XfJub5m 3cMG+L7cVSo1Q== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 04/15] firmware: qcom: Add a PAS TEE service Date: Thu, 12 Mar 2026 11:57:45 +0530 Message-ID: <20260312062756.694390-5-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Add support for Peripheral Authentication Service (PAS) driver based on TEE bus with OP-TEE providing the backend PAS service implementation. The TEE PAS service ABI is designed to be extensible with additional API as PTA_QCOM_PAS_CAPABILITIES. This allows to accommodate any future extensions of the PAS service needed while still maintaining backwards compatibility. Signed-off-by: Sumit Garg --- drivers/firmware/qcom/Kconfig | 9 + drivers/firmware/qcom/Makefile | 1 + drivers/firmware/qcom/qcom_pas_tee.c | 477 +++++++++++++++++++++++++++ 3 files changed, 487 insertions(+) create mode 100644 drivers/firmware/qcom/qcom_pas_tee.c diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 9a12ae2b639d..fff47abdaafd 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -14,6 +14,15 @@ config QCOM_PAS backends plugged in whether it's an SCM implementation or a proper TEE bus based PAS service implementation. =20 +config QCOM_PAS_TEE + tristate + select QCOM_PAS + depends on TEE + depends on !CPU_BIG_ENDIAN + help + Enable the generic Peripheral Authentication Service (PAS) provided + by the firmware TEE implementation as the backend. + config QCOM_SCM select QCOM_PAS select QCOM_TZMEM diff --git a/drivers/firmware/qcom/Makefile b/drivers/firmware/qcom/Makefile index dc5ab45f906a..48801d18f37b 100644 --- a/drivers/firmware/qcom/Makefile +++ b/drivers/firmware/qcom/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_QCOM_TZMEM) +=3D qcom_tzmem.o obj-$(CONFIG_QCOM_QSEECOM) +=3D qcom_qseecom.o obj-$(CONFIG_QCOM_QSEECOM_UEFISECAPP) +=3D qcom_qseecom_uefisecapp.o obj-$(CONFIG_QCOM_PAS) +=3D qcom_pas.o +obj-$(CONFIG_QCOM_PAS_TEE) +=3D qcom_pas_tee.o diff --git a/drivers/firmware/qcom/qcom_pas_tee.c b/drivers/firmware/qcom/q= com_pas_tee.c new file mode 100644 index 000000000000..7db9fd736369 --- /dev/null +++ b/drivers/firmware/qcom/qcom_pas_tee.c @@ -0,0 +1,477 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "qcom_pas.h" + +/* + * Peripheral Authentication Service (PAS) supported. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + */ +#define PTA_QCOM_PAS_IS_SUPPORTED 1 + +/* + * PAS capabilities. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + * [out] params[1].value.a: PAS capability flags + */ +#define PTA_QCOM_PAS_CAPABILITIES 2 + +/* + * PAS image initialization. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + * [in] params[1].memref: Loadable firmware metadata + */ +#define PTA_QCOM_PAS_INIT_IMAGE 3 + +/* + * PAS memory setup. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + * [in] params[0].value.b: Relocatable firmware size + * [in] params[1].value.a: 32bit LSB relocatable firmware memory address + * [in] params[1].value.b: 32bit MSB relocatable firmware memory address + */ +#define PTA_QCOM_PAS_MEM_SETUP 4 + +/* + * PAS get resource table. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + * [inout] params[1].memref: Resource table config + */ +#define PTA_QCOM_PAS_GET_RESOURCE_TABLE 5 + +/* + * PAS image authentication and co-processor reset. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + * [in] params[0].value.b: Firmware size + * [in] params[1].value.a: 32bit LSB firmware memory address + * [in] params[1].value.b: 32bit MSB firmware memory address + * [in] params[2].memref: Optional fw memory space shared/lent + */ +#define PTA_QCOM_PAS_AUTH_AND_RESET 6 + +/* + * PAS co-processor set suspend/resume state. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + * [in] params[0].value.b: Co-processor state identifier + */ +#define PTA_QCOM_PAS_SET_REMOTE_STATE 7 + +/* + * PAS co-processor shutdown. + * + * [in] params[0].value.a: Unique 32bit remote processor identifier + */ +#define PTA_QCOM_PAS_SHUTDOWN 8 + +#define TEE_NUM_PARAMS 4 + +/** + * struct qcom_pas_tee_private - PAS service private data + * @dev: PAS service device. + * @ctx: TEE context handler. + * @session_id: PAS TA session identifier. + */ +struct qcom_pas_tee_private { + struct device *dev; + struct tee_context *ctx; + u32 session_id; +}; + +static bool qcom_pas_tee_supported(struct device *dev, u32 pas_id) +{ + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + struct tee_ioctl_invoke_arg inv_arg =3D { + .func =3D PTA_QCOM_PAS_IS_SUPPORTED, + .session =3D data->session_id, + .num_params =3D TEE_NUM_PARAMS + }; + struct tee_param param[4] =3D { + [0] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D pas_id + } + }; + int ret; + + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS not supported, pas_id: %d, err: %x\n", + pas_id, inv_arg.ret); + return false; + } + + return true; +} + +static int qcom_pas_tee_init_image(struct device *dev, u32 pas_id, + const void *metadata, size_t size, + struct qcom_pas_context *ctx) +{ + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + struct tee_ioctl_invoke_arg inv_arg =3D { + .func =3D PTA_QCOM_PAS_INIT_IMAGE, + .session =3D data->session_id, + .num_params =3D TEE_NUM_PARAMS + }; + struct tee_param param[4] =3D { + [0] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D pas_id + }, + [1] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT, + } + }; + struct tee_shm *mdata_shm; + u8 *mdata_buf =3D NULL; + int ret; + + mdata_shm =3D tee_shm_alloc_kernel_buf(data->ctx, size); + if (IS_ERR(mdata_shm)) { + dev_err(dev, "mdata_shm allocation failed\n"); + return PTR_ERR(mdata_shm); + } + + mdata_buf =3D tee_shm_get_va(mdata_shm, 0); + if (IS_ERR(mdata_buf)) { + dev_err(dev, "mdata_buf get VA failed\n"); + tee_shm_free(mdata_shm); + return PTR_ERR(mdata_buf); + } + memcpy(mdata_buf, metadata, size); + + param[1].u.memref.shm =3D mdata_shm; + param[1].u.memref.size =3D size; + + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS init image failed, pas_id: %d, err: %x\n", + pas_id, inv_arg.ret); + tee_shm_free(mdata_shm); + return -EINVAL; + } + ctx->ptr =3D (void *)mdata_shm; + + return 0; +} + +static int qcom_pas_tee_mem_setup(struct device *dev, u32 pas_id, + phys_addr_t addr, phys_addr_t size) +{ + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + struct tee_ioctl_invoke_arg inv_arg =3D { + .func =3D PTA_QCOM_PAS_MEM_SETUP, + .session =3D data->session_id, + .num_params =3D TEE_NUM_PARAMS + }; + struct tee_param param[4] =3D { + [0] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D pas_id, + .u.value.b =3D size, + }, + [1] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D lower_32_bits(addr), + .u.value.b =3D upper_32_bits(addr), + } + }; + int ret; + + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS mem setup failed, pas_id: %d, err: %x\n", + pas_id, inv_arg.ret); + return -EINVAL; + } + + return 0; +} + +DEFINE_FREE(shm_free, struct tee_shm *, tee_shm_free(_T)) + +static void *qcom_pas_tee_get_rsc_table(struct device *dev, + struct qcom_pas_context *ctx, + void *input_rt, size_t input_rt_size, + size_t *output_rt_size) +{ + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + struct tee_ioctl_invoke_arg inv_arg =3D { + .func =3D PTA_QCOM_PAS_GET_RESOURCE_TABLE, + .session =3D data->session_id, + .num_params =3D TEE_NUM_PARAMS + }; + struct tee_param param[4] =3D { + [0] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D ctx->pas_id, + }, + [1] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT, + .u.memref.size =3D input_rt_size, + } + }; + void *rt_buf =3D NULL; + int ret; + + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS get RT failed, pas_id: %d, err: %x\n", + ctx->pas_id, inv_arg.ret); + return ERR_PTR(-EINVAL); + } + + if (param[1].u.memref.size) { + struct tee_shm *rt_shm __free(shm_free) =3D + tee_shm_alloc_kernel_buf(data->ctx, + param[1].u.memref.size); + void *rt_shm_va; + + if (IS_ERR(rt_shm)) { + dev_err(dev, "rt_shm allocation failed\n"); + return rt_shm; + } + + rt_shm_va =3D tee_shm_get_va(rt_shm, 0); + if (IS_ERR_OR_NULL(rt_shm_va)) { + dev_err(dev, "rt_shm get VA failed\n"); + return ERR_PTR(-EINVAL); + } + memcpy(rt_shm_va, input_rt, input_rt_size); + + param[1].u.memref.shm =3D rt_shm; + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS get RT failed, pas_id: %d, err: %x\n", + ctx->pas_id, inv_arg.ret); + return ERR_PTR(-EINVAL); + } + + if (param[1].u.memref.size) { + *output_rt_size =3D param[1].u.memref.size; + rt_buf =3D kmalloc(param[1].u.memref.size, GFP_KERNEL); + if (!rt_buf) + return ERR_PTR(-ENOMEM); + + memcpy(rt_buf, rt_shm_va, *output_rt_size); + } + } + + return rt_buf; +} + +static int __qcom_pas_tee_auth_and_reset(struct device *dev, u32 pas_id, + phys_addr_t mem_phys, size_t mem_size) +{ + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + struct tee_ioctl_invoke_arg inv_arg =3D { + .func =3D PTA_QCOM_PAS_AUTH_AND_RESET, + .session =3D data->session_id, + .num_params =3D TEE_NUM_PARAMS + }; + struct tee_param param[4] =3D { + [0] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D pas_id, + .u.value.b =3D mem_size, + }, + [1] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D lower_32_bits(mem_phys), + .u.value.b =3D upper_32_bits(mem_phys), + }, + /* Reserved for fw memory space to be shared or lent */ + [2] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT, + } + }; + int ret; + + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS auth reset failed, pas_id: %d, err: %x\n", + pas_id, inv_arg.ret); + return -EINVAL; + } + + return 0; +} + +static int qcom_pas_tee_auth_and_reset(struct device *dev, u32 pas_id) +{ + return __qcom_pas_tee_auth_and_reset(dev, pas_id, 0, 0); +} + +static int qcom_pas_tee_prepare_and_auth_reset(struct device *dev, + struct qcom_pas_context *ctx) +{ + return __qcom_pas_tee_auth_and_reset(dev, ctx->pas_id, ctx->mem_phys, + ctx->mem_size); +} + +static int qcom_pas_tee_set_remote_state(struct device *dev, u32 state, + u32 pas_id) +{ + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + struct tee_ioctl_invoke_arg inv_arg =3D { + .func =3D PTA_QCOM_PAS_SET_REMOTE_STATE, + .session =3D data->session_id, + .num_params =3D TEE_NUM_PARAMS + }; + struct tee_param param[4] =3D { + [0] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D pas_id, + .u.value.b =3D state, + } + }; + int ret; + + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS shutdown failed, pas_id: %d, err: %x\n", + pas_id, inv_arg.ret); + return -EINVAL; + } + + return 0; +} + +static int qcom_pas_tee_shutdown(struct device *dev, u32 pas_id) +{ + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + struct tee_ioctl_invoke_arg inv_arg =3D { + .func =3D PTA_QCOM_PAS_SHUTDOWN, + .session =3D data->session_id, + .num_params =3D TEE_NUM_PARAMS + }; + struct tee_param param[4] =3D { + [0] =3D { + .attr =3D TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT, + .u.value.a =3D pas_id + } + }; + int ret =3D 0; + + ret =3D tee_client_invoke_func(data->ctx, &inv_arg, param); + if (ret < 0 || inv_arg.ret !=3D 0) { + dev_err(dev, "PAS shutdown failed, pas_id: %d, err: %x\n", + pas_id, inv_arg.ret); + return -EINVAL; + } + + return 0; +} + +static void qcom_pas_tee_metadata_release(struct device *dev, + struct qcom_pas_context *ctx) +{ + struct tee_shm *mdata_shm =3D ctx->ptr; + + tee_shm_free(mdata_shm); +} + +static struct qcom_pas_ops qcom_pas_ops_tee =3D { + .drv_name =3D "qcom-pas-tee", + .supported =3D qcom_pas_tee_supported, + .init_image =3D qcom_pas_tee_init_image, + .mem_setup =3D qcom_pas_tee_mem_setup, + .get_rsc_table =3D qcom_pas_tee_get_rsc_table, + .auth_and_reset =3D qcom_pas_tee_auth_and_reset, + .prepare_and_auth_reset =3D qcom_pas_tee_prepare_and_auth_reset, + .set_remote_state =3D qcom_pas_tee_set_remote_state, + .shutdown =3D qcom_pas_tee_shutdown, + .metadata_release =3D qcom_pas_tee_metadata_release, +}; + +static int optee_ctx_match(struct tee_ioctl_version_data *ver, const void = *data) +{ + return ver->impl_id =3D=3D TEE_IMPL_ID_OPTEE; +} + +static int qcom_pas_tee_probe(struct tee_client_device *pas_dev) +{ + struct device *dev =3D &pas_dev->dev; + struct qcom_pas_tee_private *data; + struct tee_ioctl_open_session_arg sess_arg =3D { + .clnt_login =3D TEE_IOCTL_LOGIN_REE_KERNEL + }; + int ret, err =3D -ENODEV; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->ctx =3D tee_client_open_context(NULL, optee_ctx_match, NULL, NULL); + if (IS_ERR(data->ctx)) + return -ENODEV; + + export_uuid(sess_arg.uuid, &pas_dev->id.uuid); + ret =3D tee_client_open_session(data->ctx, &sess_arg, NULL); + if (ret < 0 || sess_arg.ret !=3D 0) { + dev_err(dev, "tee_client_open_session failed, err: %x\n", + sess_arg.ret); + err =3D -EINVAL; + goto out_ctx; + } + + data->session_id =3D sess_arg.session; + dev_set_drvdata(dev, data); + qcom_pas_ops_tee.dev =3D dev; + qcom_pas_ops_register(&qcom_pas_ops_tee); + + return 0; +out_ctx: + tee_client_close_context(data->ctx); + + return err; +} + +static void qcom_pas_tee_remove(struct tee_client_device *pas_dev) +{ + struct device *dev =3D &pas_dev->dev; + struct qcom_pas_tee_private *data =3D dev_get_drvdata(dev); + + qcom_pas_ops_unregister(); + tee_client_close_session(data->ctx, data->session_id); + tee_client_close_context(data->ctx); +} + +static const struct tee_client_device_id qcom_pas_tee_id_table[] =3D { + {UUID_INIT(0xcff7d191, 0x7ca0, 0x4784, + 0xaf, 0x13, 0x48, 0x22, 0x3b, 0x9a, 0x4f, 0xbe)}, + {} +}; +MODULE_DEVICE_TABLE(tee, qcom_pas_tee_id_table); + +static struct tee_client_driver optee_pas_tee_driver =3D { + .probe =3D qcom_pas_tee_probe, + .remove =3D qcom_pas_tee_remove, + .id_table =3D qcom_pas_tee_id_table, + .driver =3D { + .name =3D "qcom-pas-tee", + }, +}; + +module_tee_client_driver(optee_pas_tee_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("TEE bus based Qualcomm PAS driver"); --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17855337688; Thu, 12 Mar 2026 06:29:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296983; cv=none; b=RdTtw0s460/Se/nKKkgzPhZoT+TiZl27pkzQxNq/MOvyzI8wCkfoI3BTV/DxyNyavYJs7oNWvI+6AknxLnKnKeQcThYJR+dpKL1bUhdzRp3c0uiXu2fO3vcqG06JQePRxz77aipSutqM0fWLn+JD/qIrXTchOg3I4IufnL39n2s= ARC-Message-Signature: i=1; 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b=Rp04dBmVwUL7mnpuaXdnJiVDfX8aA9/3vYU1JvC4xg7AtDryfablQ1Cj1PdMtZkP4 2usA13KdObn5HaFoCu4Ro30DYd5GilYKDFuk29y2ojIJqnYlnHve3RNzVtypR3eL0u ZOnFbC+1zw6vves+dP83BNJt5SIFE2mLMwJU7JaQ8P0rnhsD6hIOTB36LgHasq0ZsG cPH8bQEPM035GlLpMPk8eK798M5o75rj43bt6mMlkrhb88FIgE25asyHxhT15MiJS3 9Hy67/eA7/X/BbeYpXxKDf09dTxSOkXdAnodRzQtlF/S7ItCurBeViH41LGIC4m0UN lI0NdRRMWGBmA== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 05/15] remoteproc: qcom_q6v5_pas: Switch over to generic PAS TZ APIs Date: Thu, 12 Mar 2026 11:57:46 +0530 Message-ID: <20260312062756.694390-6-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Switch qcom_q6v5_pas client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Signed-off-by: Sumit Garg --- drivers/remoteproc/qcom_q6v5_pas.c | 51 +++++++++++++++--------------- 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q= 6v5_pas.c index 46204da046fa..8c4313f5bbc2 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -118,8 +119,8 @@ struct qcom_pas { struct qcom_rproc_ssr ssr_subdev; struct qcom_sysmon *sysmon; =20 - struct qcom_scm_pas_context *pas_ctx; - struct qcom_scm_pas_context *dtb_pas_ctx; + struct qcom_pas_context *pas_ctx; + struct qcom_pas_context *dtb_pas_ctx; }; =20 static void qcom_pas_segment_dump(struct rproc *rproc, @@ -196,7 +197,7 @@ static int qcom_pas_shutdown_poll_decrypt(struct qcom_p= as *pas) =20 do { msleep(QCOM_PAS_DECRYPT_SHUTDOWN_DELAY_MS); - ret =3D qcom_scm_pas_shutdown(pas->pas_id); + ret =3D qcom_pas_shutdown(pas->pas_id); } while (ret =3D=3D -EINVAL && --retry_num); =20 return ret; @@ -212,9 +213,9 @@ static int qcom_pas_unprepare(struct rproc *rproc) * auth_and_reset() was successful, but in other cases clean it up * here. */ - qcom_scm_pas_metadata_release(pas->pas_ctx); + qcom_pas_metadata_release(pas->pas_ctx); if (pas->dtb_pas_id) - qcom_scm_pas_metadata_release(pas->dtb_pas_ctx); + qcom_pas_metadata_release(pas->dtb_pas_ctx); =20 return 0; } @@ -228,9 +229,9 @@ static int qcom_pas_load(struct rproc *rproc, const str= uct firmware *fw) pas->firmware =3D fw; =20 if (pas->lite_pas_id) - qcom_scm_pas_shutdown(pas->lite_pas_id); + qcom_pas_shutdown(pas->lite_pas_id); if (pas->lite_dtb_pas_id) - qcom_scm_pas_shutdown(pas->lite_dtb_pas_id); + qcom_pas_shutdown(pas->lite_dtb_pas_id); =20 if (pas->dtb_pas_id) { ret =3D request_firmware(&pas->dtb_firmware, pas->dtb_firmware_name, pas= ->dev); @@ -250,7 +251,7 @@ static int qcom_pas_load(struct rproc *rproc, const str= uct firmware *fw) return 0; =20 release_dtb_metadata: - qcom_scm_pas_metadata_release(pas->dtb_pas_ctx); + qcom_pas_metadata_release(pas->dtb_pas_ctx); release_firmware(pas->dtb_firmware); =20 return ret; @@ -310,7 +311,7 @@ static int qcom_pas_start(struct rproc *rproc) if (ret) goto disable_px_supply; =20 - ret =3D qcom_scm_pas_prepare_and_auth_reset(pas->dtb_pas_ctx); + ret =3D qcom_pas_prepare_and_auth_reset(pas->dtb_pas_ctx); if (ret) { dev_err(pas->dev, "failed to authenticate dtb image and release reset\n"); @@ -329,7 +330,7 @@ static int qcom_pas_start(struct rproc *rproc) if (ret) goto release_pas_metadata; =20 - ret =3D qcom_scm_pas_prepare_and_auth_reset(pas->pas_ctx); + ret =3D qcom_pas_prepare_and_auth_reset(pas->pas_ctx); if (ret) { dev_err(pas->dev, "failed to authenticate image and release reset\n"); @@ -339,13 +340,13 @@ static int qcom_pas_start(struct rproc *rproc) ret =3D qcom_q6v5_wait_for_start(&pas->q6v5, msecs_to_jiffies(5000)); if (ret =3D=3D -ETIMEDOUT) { dev_err(pas->dev, "start timed out\n"); - qcom_scm_pas_shutdown(pas->pas_id); + qcom_pas_shutdown(pas->pas_id); goto unmap_carveout; } =20 - qcom_scm_pas_metadata_release(pas->pas_ctx); + qcom_pas_metadata_release(pas->pas_ctx); if (pas->dtb_pas_id) - qcom_scm_pas_metadata_release(pas->dtb_pas_ctx); + qcom_pas_metadata_release(pas->dtb_pas_ctx); =20 /* firmware is used to pass reference from qcom_pas_start(), drop it now = */ pas->firmware =3D NULL; @@ -355,9 +356,9 @@ static int qcom_pas_start(struct rproc *rproc) unmap_carveout: qcom_pas_unmap_carveout(rproc, pas->mem_phys, pas->mem_size); release_pas_metadata: - qcom_scm_pas_metadata_release(pas->pas_ctx); + qcom_pas_metadata_release(pas->pas_ctx); if (pas->dtb_pas_id) - qcom_scm_pas_metadata_release(pas->dtb_pas_ctx); + qcom_pas_metadata_release(pas->dtb_pas_ctx); =20 unmap_dtb_carveout: if (pas->dtb_pas_id) @@ -406,7 +407,7 @@ static int qcom_pas_stop(struct rproc *rproc) if (ret =3D=3D -ETIMEDOUT) dev_err(pas->dev, "timed out on wait\n"); =20 - ret =3D qcom_scm_pas_shutdown(pas->pas_id); + ret =3D qcom_pas_shutdown(pas->pas_id); if (ret && pas->decrypt_shutdown) ret =3D qcom_pas_shutdown_poll_decrypt(pas); =20 @@ -414,7 +415,7 @@ static int qcom_pas_stop(struct rproc *rproc) dev_err(pas->dev, "failed to shutdown: %d\n", ret); =20 if (pas->dtb_pas_id) { - ret =3D qcom_scm_pas_shutdown(pas->dtb_pas_id); + ret =3D qcom_pas_shutdown(pas->dtb_pas_id); if (ret) dev_err(pas->dev, "failed to shutdown dtb: %d\n", ret); =20 @@ -484,11 +485,11 @@ static int qcom_pas_parse_firmware(struct rproc *rpro= c, const struct firmware *f * * Here, we call rproc_elf_load_rsc_table() to check firmware binary has = resources * or not and if it is not having then we pass NULL and zero as input res= ource - * table pointer and size respectively to the argument of qcom_scm_pas_ge= t_rsc_table() + * table pointer and size respectively to the argument of qcom_pas_get_rs= c_table() * and this is even true for Qualcomm remote processor who does follow re= moteproc * framework. */ - output_rt =3D qcom_scm_pas_get_rsc_table(pas->pas_ctx, table, table_sz, &= output_rt_size); + output_rt =3D qcom_pas_get_rsc_table(pas->pas_ctx, table, table_sz, &outp= ut_rt_size); ret =3D IS_ERR(output_rt) ? PTR_ERR(output_rt) : 0; if (ret) { dev_err(pas->dev, "Error in getting resource table: %d\n", ret); @@ -746,7 +747,7 @@ static int qcom_pas_probe(struct platform_device *pdev) if (!desc) return -EINVAL; =20 - if (!qcom_scm_is_available()) + if (!qcom_pas_is_available()) return -EPROBE_DEFER; =20 fw_name =3D desc->firmware_name; @@ -838,16 +839,16 @@ static int qcom_pas_probe(struct platform_device *pde= v) =20 qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name); =20 - pas->pas_ctx =3D devm_qcom_scm_pas_context_alloc(pas->dev, pas->pas_id, - pas->mem_phys, pas->mem_size); + pas->pas_ctx =3D devm_qcom_pas_context_alloc(pas->dev, pas->pas_id, + pas->mem_phys, pas->mem_size); if (IS_ERR(pas->pas_ctx)) { ret =3D PTR_ERR(pas->pas_ctx); goto remove_ssr_sysmon; } =20 - pas->dtb_pas_ctx =3D devm_qcom_scm_pas_context_alloc(pas->dev, pas->dtb_p= as_id, - pas->dtb_mem_phys, - pas->dtb_mem_size); + pas->dtb_pas_ctx =3D devm_qcom_pas_context_alloc(pas->dev, pas->dtb_pas_i= d, + pas->dtb_mem_phys, + pas->dtb_mem_size); if (IS_ERR(pas->dtb_pas_ctx)) { ret =3D PTR_ERR(pas->dtb_pas_ctx); goto remove_ssr_sysmon; --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56F24317170; Thu, 12 Mar 2026 06:29:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296999; cv=none; b=XTiYH6dJm9ODmMLE/09fVAHcbQfjuzG2S7gEkJ+Uki+vQC1D3ci+UVbG51Sno1+kzve6IeqbOiA591Z5J3zvDTP+G3LZFxELSA8tZawNwKJk35ji96vVtfg+sqaOMYjDLQaZD4Tl8yrGWWEiK0680SCBhY8fIgDW6oxmKNTDojk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773296999; c=relaxed/simple; bh=O/qqg75bvo/5OO7i3M1MAcQa5DhYCAeNyUlzMs2EbZQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ct0/QKF5vKJ+PEYEHQ7FJ03skMZEkkBspvGeZBiJB//tAK8ZnDQSC/wv7gI1bWuIp14yybrfQtmydfbwafWcRfsf7kz9kfSZcQCuzcB8bYzlb+g2KcPu0BXYYoOZum7EDAa2nIgkocDDwuknJYfypJxGswY38zsjpQF9p3NiyKI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=uVkNOxL0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="uVkNOxL0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E4F7C4CEF7; Thu, 12 Mar 2026 06:29:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773296999; bh=O/qqg75bvo/5OO7i3M1MAcQa5DhYCAeNyUlzMs2EbZQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uVkNOxL0edNHz+Fjjf9MhLUKcvA8FzaFxyABDNgvLBRHe9cqaU8h/1WNYhfF0KhDt IOe3Yxr/3NYH3y78VHLYU4PfwAyXodwsGfiktT8yeQi1KDQ49Wtou1Ygk1hBB2Hl7b dtGeJYCPCl90+91jWKrdGiyMs0A4qtDGevOWbh0DD6YVK5sGa8kFICkUQfPTzF2Mxj kM4qHujUZdVbEnqTrXyrp9oSGDNwWvwTsMz09M2MwQAZOhbzlfoXyojmULEiLTghQg ZHrlsqqnXIPTrTnpbLkOt4DzpwQ1tQqRb7eqqg+gRdt8aj6qfqwBFUYKWGDIiDxTC5 qHc4W+4+k6sLw== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 06/15] remoteproc: qcom_q6v5_mss: Switch to generic PAS TZ APIs Date: Thu, 12 Mar 2026 11:57:47 +0530 Message-ID: <20260312062756.694390-7-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Switch qcom_q6v5_mss client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Signed-off-by: Sumit Garg --- drivers/remoteproc/qcom_q6v5_mss.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q= 6v5_mss.c index 91940977ca89..4d81b4af097f 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -34,6 +34,7 @@ #include "qcom_pil_info.h" #include "qcom_q6v5.h" =20 +#include #include =20 #define MPSS_CRASH_REASON_SMEM 421 @@ -1442,7 +1443,7 @@ static int q6v5_mpss_load(struct q6v5 *qproc) } =20 if (qproc->version =3D=3D MSS_MSM8953) { - ret =3D qcom_scm_pas_mem_setup(MPSS_PAS_ID, qproc->mpss_phys, qproc->mps= s_size); + ret =3D qcom_pas_mem_setup(MPSS_PAS_ID, qproc->mpss_phys, qproc->mpss_si= ze); if (ret) { dev_err(qproc->dev, "setting up mpss memory failed: %d\n", ret); @@ -2039,7 +2040,7 @@ static int q6v5_probe(struct platform_device *pdev) if (!desc) return -EINVAL; =20 - if (desc->need_mem_protection && !qcom_scm_is_available()) + if (desc->need_mem_protection && !qcom_pas_is_available()) return -EPROBE_DEFER; =20 mba_image =3D desc->hexagon_mba_image; --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 986EF2550AF; Thu, 12 Mar 2026 06:30:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297015; cv=none; b=VC+02fRZoCerT8QGLSL1thjAr+AYhKiHDt37B/J9swIZAKNlB2dh7Gpzk6vtk9YEuRQME/AFFNhysECD40QIdDJTB8R4k8d3ngzuFjBMroVlDNE/DlwYSElW04h2hrPGpV9VSKedoyMg5lw6co8XstIadYWe9ZXzNJAeoj4/QhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297015; c=relaxed/simple; bh=VzhDqsiFiUXfxZd81NSur10DXXCFIN3cES5W3dbPI8k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XKo8esOfcBwG/SWZ1A4UTJ9U1kUXXeA4KlxKyOqnLWA1Ibye597+kGn3vnfPLeJVJ0Lhx9n/Sm1QFwUde+RcBqUC59xba6a1Fh8MzN084jgoFs0CQb45wnSnT81iKvi/Yg7XG1NZPQ6Qe6QvDdiJajGofoAaoWw1V6HJZy50aaU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nFbdc94L; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nFbdc94L" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AF2E9C116C6; Thu, 12 Mar 2026 06:29:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297015; bh=VzhDqsiFiUXfxZd81NSur10DXXCFIN3cES5W3dbPI8k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nFbdc94LElODkhTEzWXaKKcVooaypiUSvYkU/0yzY2xJQY0ARN90lcW8zsQWqKPHV sFyPXdHNFjceMPPiReeGHhKD4OHjkk2yIO3dgAj0bInN3r3ALi7ZDNY7kqLm3ZLv/v g9QmqCv/p4Mq58KHh4uqls1px9aW1LwxModvgnttwDnz54TgP6gtGovgKvSVmEAUxa LVj+HMawsuNm4w3E+bTy34vX+WJdAfH/rOwPFmEbloFpltAS6IoRN2uXMihIA6iNI8 rugUR9nIEMF3U2DpZFh/B/9p47Wbmm4P16b1BgwdjV+xXwL56m8XUExj1icH+LLOhQ BbhAkTPxABflw== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 07/15] soc: qcom: mdtloader: Switch to generic PAS TZ APIs Date: Thu, 12 Mar 2026 11:57:48 +0530 Message-ID: <20260312062756.694390-8-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Switch mdtloader client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Signed-off-by: Sumit Garg --- drivers/soc/qcom/mdt_loader.c | 12 ++++++------ include/linux/soc/qcom/mdt_loader.h | 6 +++--- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c index c004d444d698..fdde7eda538a 100644 --- a/drivers/soc/qcom/mdt_loader.c +++ b/drivers/soc/qcom/mdt_loader.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include @@ -229,7 +229,7 @@ EXPORT_SYMBOL_GPL(qcom_mdt_read_metadata); =20 static int __qcom_mdt_pas_init(struct device *dev, const struct firmware *= fw, const char *fw_name, int pas_id, phys_addr_t mem_phys, - struct qcom_scm_pas_context *ctx) + struct qcom_pas_context *ctx) { const struct elf32_phdr *phdrs; const struct elf32_phdr *phdr; @@ -271,7 +271,7 @@ static int __qcom_mdt_pas_init(struct device *dev, cons= t struct firmware *fw, goto out; } =20 - ret =3D qcom_scm_pas_init_image(pas_id, metadata, metadata_len, ctx); + ret =3D qcom_pas_init_image(pas_id, metadata, metadata_len, ctx); kfree(metadata); if (ret) { /* Invalid firmware metadata */ @@ -280,7 +280,7 @@ static int __qcom_mdt_pas_init(struct device *dev, cons= t struct firmware *fw, } =20 if (relocate) { - ret =3D qcom_scm_pas_mem_setup(pas_id, mem_phys, max_addr - min_addr); + ret =3D qcom_pas_mem_setup(pas_id, mem_phys, max_addr - min_addr); if (ret) { /* Unable to set up relocation */ dev_err(dev, "error %d setting up firmware %s\n", ret, fw_name); @@ -472,7 +472,7 @@ EXPORT_SYMBOL_GPL(qcom_mdt_load); * firmware segments (e.g., .bXX files). Authentication of the segments do= ne * by a separate call. * - * The PAS context must be initialized using qcom_scm_pas_context_init() + * The PAS context must be initialized using qcom_pas_context_init() * prior to invoking this function. * * @ctx: Pointer to the PAS (Peripheral Authentication Service) con= text @@ -483,7 +483,7 @@ EXPORT_SYMBOL_GPL(qcom_mdt_load); * * Return: 0 on success or a negative error code on failure. */ -int qcom_mdt_pas_load(struct qcom_scm_pas_context *ctx, const struct firmw= are *fw, +int qcom_mdt_pas_load(struct qcom_pas_context *ctx, const struct firmware = *fw, const char *firmware, void *mem_region, phys_addr_t *reloc_base) { int ret; diff --git a/include/linux/soc/qcom/mdt_loader.h b/include/linux/soc/qcom/m= dt_loader.h index 82372e0db0a1..142409555425 100644 --- a/include/linux/soc/qcom/mdt_loader.h +++ b/include/linux/soc/qcom/mdt_loader.h @@ -10,7 +10,7 @@ =20 struct device; struct firmware; -struct qcom_scm_pas_context; +struct qcom_pas_context; =20 #if IS_ENABLED(CONFIG_QCOM_MDT_LOADER) =20 @@ -20,7 +20,7 @@ int qcom_mdt_load(struct device *dev, const struct firmwa= re *fw, phys_addr_t mem_phys, size_t mem_size, phys_addr_t *reloc_base); =20 -int qcom_mdt_pas_load(struct qcom_scm_pas_context *ctx, const struct firmw= are *fw, +int qcom_mdt_pas_load(struct qcom_pas_context *ctx, const struct firmware = *fw, const char *firmware, void *mem_region, phys_addr_t *reloc_base); =20 int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw, @@ -45,7 +45,7 @@ static inline int qcom_mdt_load(struct device *dev, const= struct firmware *fw, return -ENODEV; } =20 -static inline int qcom_mdt_pas_load(struct qcom_scm_pas_context *ctx, +static inline int qcom_mdt_pas_load(struct qcom_pas_context *ctx, const struct firmware *fw, const char *firmware, void *mem_region, phys_addr_t *reloc_base) { --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A6B8212CD8B; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IZP4LWQy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E90D8C2BC87; Thu, 12 Mar 2026 06:30:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297031; bh=VWcRQoEk7f6OfUuHnyK0rLk3wW40uR7aczrF6CG478U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IZP4LWQy56pQmh/TUGs+MVUOXsGOmAi5r27Ix4ACApzofY2pQJXy9OmX7bARCuds8 bob7bOon7i4mif9h59YPVbaO3Yjk6xSijxSw3IX79HkUHIZhAenaBQqSOs4acWtG08 FHcpN6u6mKxNy/CWQOMuVDAI3Nrxrjt4NmXNz7fdzS56orYyzDrhacRhbgHhG3zfxB fnSsG6a0BTv6lKkGzi7m1Lr4ylv83o/xZQdJp7Fv27x9I4Uy/z+RqSZzQoqSYyT+LD EKFpOfb3eJjJGD+p9U/7XqQNnT5xUnwAQN9mqdMHv2y2OB49qG/jhZ8BcuKtXf2TyV q+PamlTB5Ilrw== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 08/15] remoteproc: qcom_wcnss: Switch to generic PAS TZ APIs Date: Thu, 12 Mar 2026 11:57:49 +0530 Message-ID: <20260312062756.694390-9-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Switch qcom_wcnss client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Signed-off-by: Sumit Garg --- drivers/remoteproc/qcom_wcnss.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/qcom_wcnss.c b/drivers/remoteproc/qcom_wcns= s.c index ee18bf2e8054..1fd9344b0956 100644 --- a/drivers/remoteproc/qcom_wcnss.c +++ b/drivers/remoteproc/qcom_wcnss.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include @@ -257,7 +257,7 @@ static int wcnss_start(struct rproc *rproc) wcnss_indicate_nv_download(wcnss); wcnss_configure_iris(wcnss); =20 - ret =3D qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID); + ret =3D qcom_pas_auth_and_reset(WCNSS_PAS_ID); if (ret) { dev_err(wcnss->dev, "failed to authenticate image and release reset\n"); @@ -269,7 +269,7 @@ static int wcnss_start(struct rproc *rproc) if (wcnss->ready_irq > 0 && ret =3D=3D 0) { /* We have a ready_irq, but it didn't fire in time. */ dev_err(wcnss->dev, "start timed out\n"); - qcom_scm_pas_shutdown(WCNSS_PAS_ID); + qcom_pas_shutdown(WCNSS_PAS_ID); ret =3D -ETIMEDOUT; goto disable_iris; } @@ -311,7 +311,7 @@ static int wcnss_stop(struct rproc *rproc) 0); } =20 - ret =3D qcom_scm_pas_shutdown(WCNSS_PAS_ID); + ret =3D qcom_pas_shutdown(WCNSS_PAS_ID); if (ret) dev_err(wcnss->dev, "failed to shutdown: %d\n", ret); =20 @@ -557,10 +557,10 @@ static int wcnss_probe(struct platform_device *pdev) =20 data =3D of_device_get_match_data(&pdev->dev); =20 - if (!qcom_scm_is_available()) + if (!qcom_pas_is_available()) return -EPROBE_DEFER; =20 - if (!qcom_scm_pas_supported(WCNSS_PAS_ID)) { + if (!qcom_pas_supported(WCNSS_PAS_ID)) { dev_err(&pdev->dev, "PAS is not available for WCNSS\n"); return -ENXIO; } --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6AF1282F38; Thu, 12 Mar 2026 06:30:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 12 Mar 2026 06:30:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297047; bh=+WPauxWCOutLzKrZffBXMMITweY/oTZZzgDQTHSVJK0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F2PZMDy1DnDnL/cFxTNim4OOAk8ACgOblXvZM0g5M9szw/8ayW73FfUnEUo2UQYKW s5Dq1lAm7nPY1OpQHbb7+yTzr2hlkTaIyw03YQfgekSTDfXQlM6vS8Cfc0tH4mIx5o 1ka+BQ+B0+qMU3an4ZCsVtqC9Kd22D6I+QxpZmSyXyGP14siteCguaa01Y5TUbgb5D 2jrBdFpZ/AWwvCx1Cji0DY0q1KKhkr9YSRkqDdiUoBl4ZLEWCeeOhuIv4TetsspBZm 4kdgfbiE7rQLLabzwB7suAodPKcIOFVSZ5Et/RAEkBPXa2XGKALC+0OvHdAAdJOueZ yOLmefPL7PoNg== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 09/15] remoteproc: qcom: Select QCOM_PAS_TEE service backend Date: Thu, 12 Mar 2026 11:57:50 +0530 Message-ID: <20260312062756.694390-10-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Select PAS TEE service backend driver for the generic PAS service to enable support for OP-TEE based PAS service. Signed-off-by: Sumit Garg --- drivers/remoteproc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index ee54436fea5a..0411a38530d8 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig @@ -230,6 +230,7 @@ config QCOM_Q6V5_PAS select QCOM_Q6V5_COMMON select QCOM_RPROC_COMMON select QCOM_SCM + select QCOM_PAS_TEE help Say y here to support the TrustZone based Peripheral Image Loader for the Qualcomm remote processors. This is commonly used to control --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5023E37C93A; Thu, 12 Mar 2026 06:31:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297064; cv=none; b=O6DLWTtN0jen+F9x6tKbqw7pE5CV68jueQbVyS6jvAuYJE55IH3yLKprf2vB36Ymrc8aIlo7S7K54iMsGRXjHQGXKfEFckE2LKQF0bRc6GxjGbBbiuKt8PloGDbj8jg+034BxvvhBsWS2gLkE2PA6k+ltt6/ZRgL+cGJrAA2uIU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297064; c=relaxed/simple; bh=YzEIsUudUMGVxG7bLgWo6VW7f07ZvXO72FLtTM7Ydj8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FqJbmaAVeuiOO26CY/r2CWDMMxK8yBwDRwA0wC7Gu+cNdA8Wog8HX9IoqxPQL6EiY7geZu0Xl/bsoKVC4lHTQ+bZm+8mbtWgK0+8SjCWb3AVXw+lU8yLlpHtL8NFUMDkdTu38XtD2+O+BKSMdfKPKWhuoZMFHvANk2uZo261ipw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rzolqbT3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rzolqbT3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4B6D3C2BC86; Thu, 12 Mar 2026 06:30:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297063; bh=YzEIsUudUMGVxG7bLgWo6VW7f07ZvXO72FLtTM7Ydj8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rzolqbT3ybuwPh/L1ByzCBPCYqJQV9tPS3RBMCS1yHZW4rSbTpd96cnomqeyhqgLg Q+OhAPeZMpBJ9se9Gsnqc2EblKvWq1j5GXgc06WzC4A0zGLfP+ooKX64xXO6s96YiO 6ZHmME37vvT1uKn1nS1TohQEvOAAIsVLoEL/BUY9/efu2CjPa0jIAqYw2pTR73hKtW a18eiJxZwPX8J+59YIgPIDCuQlacZlP+aIVo12gQ0lLWFKhZHmGXe18e8jeOt2fsnc A1qanidk3sRWzBZL6RXfxxY2zUImwPcphqBqgeD+R520G0yyIfRiY4qQRgGBeF74dS I4mf+sZ/c0ikA== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 10/15] drm/msm: Switch to generic PAS TZ APIs Date: Thu, 12 Mar 2026 11:57:51 +0530 Message-ID: <20260312062756.694390-11-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Switch drm/msm client drivers over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Signed-off-by: Sumit Garg --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 ++-- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 11 ++++++----- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/ad= reno/a5xx_gpu.c index ef9fd6171af7..3283852f9a14 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -5,7 +5,7 @@ #include #include #include -#include +#include #include #include #include @@ -653,7 +653,7 @@ static int a5xx_zap_shader_resume(struct msm_gpu *gpu) if (adreno_is_a506(adreno_gpu)) return 0; =20 - ret =3D qcom_scm_set_remote_state(SCM_GPU_ZAP_SHADER_RESUME, GPU_PAS_ID); + ret =3D qcom_pas_set_remote_state(SCM_GPU_ZAP_SHADER_RESUME, GPU_PAS_ID); if (ret) DRM_ERROR("%s: zap-shader resume failed: %d\n", gpu->name, ret); diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/= adreno/adreno_gpu.c index d5fe6f6f0dec..047df0393128 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -8,6 +8,7 @@ =20 #include #include +#include #include #include #include @@ -146,10 +147,10 @@ static int zap_shader_load_mdt(struct msm_gpu *gpu, c= onst char *fwname, goto out; =20 /* Send the image to the secure world */ - ret =3D qcom_scm_pas_auth_and_reset(pasid); + ret =3D qcom_pas_auth_and_reset(pasid); =20 /* - * If the scm call returns -EOPNOTSUPP we assume that this target + * If the pas call returns -EOPNOTSUPP we assume that this target * doesn't need/support the zap shader so quietly fail */ if (ret =3D=3D -EOPNOTSUPP) @@ -175,9 +176,9 @@ int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pas= id) if (!zap_available) return -ENODEV; =20 - /* We need SCM to be able to load the firmware */ - if (!qcom_scm_is_available()) { - DRM_DEV_ERROR(&pdev->dev, "SCM is not available\n"); + /* We need PAS to be able to load the firmware */ + if (!qcom_pas_is_available()) { + DRM_DEV_ERROR(&pdev->dev, "Qcom PAS is not available\n"); return -EPROBE_DEFER; } =20 --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F32B38644F; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Wtyi/+kj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6FA66C4CEF7; Thu, 12 Mar 2026 06:31:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297079; bh=D/Vhw6leBBqAFpkgVNj90UXMmK8u4Tind9kuebFv7yY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wtyi/+kjypF2TTn6+FB0hU2PCBr+u+59PsgP65OEtzu0Tw2zcVV9J/dDjgFR0YJ3O VXQdkf0pP17JcZ/e93DShfgy9vyiZCyt0pm1CwCmSPLRFRaLFzsOxRKX8SSIJvwAKb OmY1ieFCLTHPW2KuruU/lEtE4Cxn56I3CwwBKh0a2G2IBmA0GJh/FhTxu/KYCp7Mvn Rs4vSgT7wXB27Mlqv4NCfj9Lhf3+ZChhLN4i2NWNJLhqjbDmnKt7vBR0IapclcpV8t AR2GnmWsAcMRxonOXcsSSNOo8bRazpM0JKpLCR4Q4xZVOXpXOTiYnR27lgZDHrREZF TGhDLcpzLuo0w== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 11/15] media: qcom: Switch to generic PAS TZ APIs Date: Thu, 12 Mar 2026 11:57:52 +0530 Message-ID: <20260312062756.694390-12-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Switch qcom media client drivers over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Along with that pass proper PAS ID to set_remote_state API. As per testing the SCM backend just ignores it while OP-TEE makes use of it to for proper book keeping purpose. Signed-off-by: Sumit Garg --- drivers/media/platform/qcom/iris/iris_firmware.c | 9 +++++---- drivers/media/platform/qcom/venus/firmware.c | 11 ++++++----- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_firmware.c b/drivers/med= ia/platform/qcom/iris/iris_firmware.c index 5f408024e967..856fa6a79064 100644 --- a/drivers/media/platform/qcom/iris/iris_firmware.c +++ b/drivers/media/platform/qcom/iris/iris_firmware.c @@ -4,6 +4,7 @@ */ =20 #include +#include #include #include #include @@ -79,7 +80,7 @@ int iris_fw_load(struct iris_core *core) return -ENOMEM; } =20 - ret =3D qcom_scm_pas_auth_and_reset(core->iris_platform_data->pas_id); + ret =3D qcom_pas_auth_and_reset(core->iris_platform_data->pas_id); if (ret) { dev_err(core->dev, "auth and reset failed: %d\n", ret); return ret; @@ -93,7 +94,7 @@ int iris_fw_load(struct iris_core *core) cp_config->cp_nonpixel_size); if (ret) { dev_err(core->dev, "qcom_scm_mem_protect_video_var failed: %d\n", ret); - qcom_scm_pas_shutdown(core->iris_platform_data->pas_id); + qcom_pas_shutdown(core->iris_platform_data->pas_id); return ret; } } @@ -103,10 +104,10 @@ int iris_fw_load(struct iris_core *core) =20 int iris_fw_unload(struct iris_core *core) { - return qcom_scm_pas_shutdown(core->iris_platform_data->pas_id); + return qcom_pas_shutdown(core->iris_platform_data->pas_id); } =20 int iris_set_hw_state(struct iris_core *core, bool resume) { - return qcom_scm_set_remote_state(resume, 0); + return qcom_pas_set_remote_state(resume, core->iris_platform_data->pas_id= ); } diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/p= latform/qcom/venus/firmware.c index 1de7436713ed..3c0727ea137d 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -58,7 +59,7 @@ int venus_set_hw_state(struct venus_core *core, bool resu= me) int ret; =20 if (core->use_tz) { - ret =3D qcom_scm_set_remote_state(resume, 0); + ret =3D qcom_pas_set_remote_state(resume, VENUS_PAS_ID); if (resume && ret =3D=3D -EINVAL) ret =3D 0; return ret; @@ -218,7 +219,7 @@ int venus_boot(struct venus_core *core) int ret; =20 if (!IS_ENABLED(CONFIG_QCOM_MDT_LOADER) || - (core->use_tz && !qcom_scm_is_available())) + (core->use_tz && !qcom_pas_is_available())) return -EPROBE_DEFER; =20 ret =3D of_property_read_string_index(dev->of_node, "firmware-name", 0, @@ -236,7 +237,7 @@ int venus_boot(struct venus_core *core) core->fw.mem_phys =3D mem_phys; =20 if (core->use_tz) - ret =3D qcom_scm_pas_auth_and_reset(VENUS_PAS_ID); + ret =3D qcom_pas_auth_and_reset(VENUS_PAS_ID); else ret =3D venus_boot_no_tz(core, mem_phys, mem_size); =20 @@ -259,7 +260,7 @@ int venus_boot(struct venus_core *core) res->cp_nonpixel_start, res->cp_nonpixel_size); if (ret) { - qcom_scm_pas_shutdown(VENUS_PAS_ID); + qcom_pas_shutdown(VENUS_PAS_ID); dev_err(dev, "set virtual address ranges fail (%d)\n", ret); return ret; @@ -274,7 +275,7 @@ int venus_shutdown(struct venus_core *core) int ret; =20 if (core->use_tz) - ret =3D qcom_scm_pas_shutdown(VENUS_PAS_ID); + ret =3D qcom_pas_shutdown(VENUS_PAS_ID); else ret =3D venus_shutdown_no_tz(core); =20 --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B28D12CD8B; Thu, 12 Mar 2026 06:31:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297096; cv=none; b=rNWnVIs8HBTIMu0lRmBOXJuH7IBE1mXHMI6oWRttFqyWscHcP5+5ka8NR34Z1UxZl9/+nryvx6nkvSSI2heJmqEdV5OExLeANhcHCYBPzPf2CbPT/yZaUN9jbAfUL++7NvaDRI/4Bp9E9oKJh9chFrL712VjaevLMjnZBQ//dd4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297096; c=relaxed/simple; bh=s2IOV+u9Fv1ukmnfMTkmiLINskXtpIQh7wh1yO+m91M=; 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charset="utf-8" From: Sumit Garg Switch ipa client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Signed-off-by: Sumit Garg --- drivers/net/ipa/ipa_main.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index edead9c48d1f..8feb8493d5b5 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -14,7 +14,7 @@ #include #include =20 -#include +#include #include =20 #include "ipa.h" @@ -624,10 +624,13 @@ static int ipa_firmware_load(struct device *dev) } =20 ret =3D qcom_mdt_load(dev, fw, path, IPA_PAS_ID, virt, phys, size, NULL); - if (ret) + if (ret) { dev_err(dev, "error %d loading \"%s\"\n", ret, path); - else if ((ret =3D qcom_scm_pas_auth_and_reset(IPA_PAS_ID))) - dev_err(dev, "error %d authenticating \"%s\"\n", ret, path); + } else { + ret =3D qcom_pas_auth_and_reset(IPA_PAS_ID); + if (ret) + dev_err(dev, "error %d authenticating \"%s\"\n", ret, path); + } =20 memunmap(virt); out_release_firmware: @@ -754,7 +757,7 @@ static enum ipa_firmware_loader ipa_firmware_loader(str= uct device *dev) return IPA_LOADER_INVALID; out_self: /* We need Trust Zone to load firmware; make sure it's available */ - if (qcom_scm_is_available()) + if (qcom_pas_is_available()) return IPA_LOADER_SELF; =20 return IPA_LOADER_DEFER; --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C71139656A; Thu, 12 Mar 2026 06:31:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297112; cv=none; b=QhaJ/X+vZ2lnmEygbc30SrTnAmdklQ97aXjb1LmgXWT0oJ4oqBoVmdM7yDI+APnFHwC+vkMMEvEHUjwQNDG9GWAsUI30Iav3Ih/nLHlYxOTW/4NYfFAdC4GFxWy13UT3USk7SD7/defiTpAdqBrFPopV/4hEGBitgknU2Xu95Wc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297112; c=relaxed/simple; bh=hHZsC9eIhJPkoiZ2eezD+mzHYHoZx4LReMWFxmuE+OU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IkKLw+/OFUZCS/AzveBiE2uhPIMdIIb8CoepdC/Bb8smtXeUpbRV7gdI7e+8s0D/NNrDF8PM5/VVKJpIaWTTylYy4o3BN1W2JjssyDBqEhhOCpVAcEzLRNzZ4KDWYRoeWV1Jxi83nAYpAOFuon7hagqtKuDdGL23c+XmSE1cktk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Us2d/m5s; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Us2d/m5s" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BB6EAC2BCB1; Thu, 12 Mar 2026 06:31:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297112; bh=hHZsC9eIhJPkoiZ2eezD+mzHYHoZx4LReMWFxmuE+OU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Us2d/m5smIigXUAlQogN1VWUx716b3+6WBLQckR5pZY9k06aZp7O4rT+jTzJlKTq8 zdPrNtO5wKm1qlNZfvjzknMPmkWF9sU2+MO6Hpw5RHmWxNNu50tVwaKe+R/F5W2ya6 8JJB8ZBUvoaGeiEbfTNBP85oxInFh7ohv6ZbE/m1sDfg5pHlYt/SWmJ0aw0vN9UJU8 W+F0nRL6iqr+rHM+0yNZytBGbbbX0/8854hjz0EpNZsLH3PR0ttJecGwencVPwehwB BMlFMG5iwW6uPzclszNPPX3vkPX9BFqqZsb7f9uOSFJGoCS1UzTypj9oHHt17d2/Q+ N/t5KJM9Phkcw== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 13/15] wifi: ath12k: Switch to generic PAS TZ APIs Date: Thu, 12 Mar 2026 11:57:54 +0530 Message-ID: <20260312062756.694390-14-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Switch ath12k client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Acked-by: Jeff Johnson Signed-off-by: Sumit Garg --- drivers/net/wireless/ath/ath12k/ahb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/a= th/ath12k/ahb.c index 9a4d34e49104..935f893d04ef 100644 --- a/drivers/net/wireless/ath/ath12k/ahb.c +++ b/drivers/net/wireless/ath/ath12k/ahb.c @@ -5,7 +5,7 @@ */ =20 #include -#include +#include #include #include #include @@ -415,7 +415,7 @@ static int ath12k_ahb_power_up(struct ath12k_base *ab) } =20 /* Authenticate FW image using peripheral ID */ - ret =3D qcom_scm_pas_auth_and_reset(pasid); + ret =3D qcom_pas_auth_and_reset(pasid); if (ret) { ath12k_err(ab, "failed to boot the remote processor %d\n", ret); goto err_fw2; @@ -478,9 +478,9 @@ static void ath12k_ahb_power_down(struct ath12k_base *a= b, bool is_suspend) pasid =3D (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) | ATH12K_AHB_UPD_SWID; /* Release the firmware */ - ret =3D qcom_scm_pas_shutdown(pasid); + ret =3D qcom_pas_shutdown(pasid); if (ret) - ath12k_err(ab, "scm pas shutdown failed for userPD%d: %d\n", + ath12k_err(ab, "pas shutdown failed for userPD%d: %d\n", ab_ahb->userpd_id, ret); } =20 --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DEA037C93A; Thu, 12 Mar 2026 06:32:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297128; cv=none; b=XW4YGsM9u+qnVu/nuUi7SgrzD+2L7kVbq3hs1obY7pX1m2vzfUIWWpOwfvEqcvOK7US9N+JlvCrbokEj4T4F93oSIC1lSrjJJsaFakR68VDwmQZkgfe/SyxZn3OUUFQs2MxGVz3YQ4JmJ9MDcdtdYgHOmo7DFO++/hReiPT2p8I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773297128; c=relaxed/simple; bh=ph2CnyWrkdsg4Xijfgxsxm+iahK50TtAU8/Tx//bQqY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FRL8UIAnve3GZGK32GuRTRSWqoq/JsTcYBfbkYfVqxOG8gGc/KnWk96Zu9F7H1USfGmsS52/phbjiaa7XgnSwdHetZufKSxRVuA/L58X95TroZ7SL6ykYzECKwcW2yoS/FhKLJfKbhUj4qPkDcvXAUhMJ5KZSBm23vx6cjPSCPQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SGvW+5Fc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SGvW+5Fc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D3D9DC116C6; Thu, 12 Mar 2026 06:31:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297128; bh=ph2CnyWrkdsg4Xijfgxsxm+iahK50TtAU8/Tx//bQqY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SGvW+5FcXGpx1NzGR+7acP61YSEmu93UjNUUCjVHg4HjCCnSYYtfPerCG/JmqQuHs zaaadXjw50U8ZYlMY+P4UGOxlEKuDoCBPOB2Oxz+4OERmgqrlssOzaXmDN1XG4QzRs ahaMfX3w8SWLxsWQgw9QKHwbEI5KGeeRy/+1qx+NIKeH8TfOTTmrdpWtJB8iZfz3aO NGSECktV8vBRT48E+BZVIhj5DBso+JGDHAOggI/99bC1ZSh+3FfWmtpwx8vp60/GvS 5AjaeTpv6/uXQEbjwzI6uJZbXgoM+TFji5txKxPqAwD2RJGAfwlVh0SVfTsi3PzjWO cZFcKsEwe3ekQ== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 14/15] firmware: qcom_scm: Remove SCM PAS wrappers Date: Thu, 12 Mar 2026 11:57:55 +0530 Message-ID: <20260312062756.694390-15-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Now since all the Qcom SCM client drivers have been migrated over to generic PAS TZ service, let's drop the exported SCM PAS wrappers. Signed-off-by: Sumit Garg --- drivers/firmware/qcom/qcom_scm.c | 84 -------------------------- include/linux/firmware/qcom/qcom_scm.h | 29 --------- 2 files changed, 113 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 2d7937ae7c8f..ce68ed294d78 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -554,26 +554,6 @@ static void qcom_scm_set_download_mode(u32 dload_mode) dev_err(__scm->dev, "failed to set download mode: %d\n", ret); } =20 -struct qcom_scm_pas_context *devm_qcom_scm_pas_context_alloc(struct device= *dev, - u32 pas_id, - phys_addr_t mem_phys, - size_t mem_size) -{ - struct qcom_pas_context *ctx; - - ctx =3D devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); - if (!ctx) - return ERR_PTR(-ENOMEM); - - ctx->dev =3D dev; - ctx->pas_id =3D pas_id; - ctx->mem_phys =3D mem_phys; - ctx->mem_size =3D mem_size; - - return (struct qcom_scm_pas_context *)ctx; -} -EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc); - static int __qcom_scm_pas_init_image(struct device *dev, u32 pas_id, dma_addr_t mdata_phys, struct qcom_scm_res *res) @@ -674,14 +654,6 @@ static int __qcom_scm_pas_init_image2(struct device *d= ev, u32 pas_id, return ret ? : res.result[0]; } =20 -int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size, - struct qcom_scm_pas_context *ctx) -{ - return __qcom_scm_pas_init_image2(__scm->dev, pas_id, metadata, size, - (struct qcom_pas_context *)ctx); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_init_image); - static void __qcom_scm_pas_metadata_release(struct device *dev, struct qcom_pas_context *ctx) { @@ -693,13 +665,6 @@ static void __qcom_scm_pas_metadata_release(struct dev= ice *dev, ctx->ptr =3D NULL; } =20 -void qcom_scm_pas_metadata_release(struct qcom_scm_pas_context *ctx) -{ - __qcom_scm_pas_metadata_release(__scm->dev, - (struct qcom_pas_context *)ctx); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_metadata_release); - static int __qcom_scm_pas_mem_setup(struct device *dev, u32 pas_id, phys_addr_t addr, phys_addr_t size) { @@ -732,12 +697,6 @@ static int __qcom_scm_pas_mem_setup(struct device *dev= , u32 pas_id, return ret ? : res.result[0]; } =20 -int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size) -{ - return __qcom_scm_pas_mem_setup(__scm->dev, pas_id, addr, size); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_mem_setup); - static void *__qcom_scm_pas_get_rsc_table(struct device *dev, u32 pas_id, void *input_rt_tzm, size_t input_rt_size, @@ -867,18 +826,6 @@ static void *__qcom_scm_pas_get_rsc_table2(struct devi= ce *dev, return ret ? ERR_PTR(ret) : tbl_ptr; } =20 -struct resource_table *qcom_scm_pas_get_rsc_table(struct qcom_scm_pas_cont= ext *ctx, - void *input_rt, - size_t input_rt_size, - size_t *output_rt_size) -{ - return __qcom_scm_pas_get_rsc_table2(__scm->dev, - (struct qcom_pas_context *)ctx, - input_rt, input_rt_size, - output_rt_size); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_get_rsc_table); - static int __qcom_scm_pas_auth_and_reset(struct device *dev, u32 pas_id) { int ret; @@ -908,12 +855,6 @@ static int __qcom_scm_pas_auth_and_reset(struct device= *dev, u32 pas_id) return ret ? : res.result[0]; } =20 -int qcom_scm_pas_auth_and_reset(u32 pas_id) -{ - return __qcom_scm_pas_auth_and_reset(__scm->dev, pas_id); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_auth_and_reset); - static int __qcom_scm_pas_prepare_and_auth_reset(struct device *dev, struct qcom_pas_context *ctx) { @@ -942,13 +883,6 @@ static int __qcom_scm_pas_prepare_and_auth_reset(struc= t device *dev, return ret; } =20 -int qcom_scm_pas_prepare_and_auth_reset(struct qcom_scm_pas_context *ctx) -{ - return __qcom_scm_pas_prepare_and_auth_reset(__scm->dev, - (struct qcom_pas_context *)ctx); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_prepare_and_auth_reset); - static int __qcom_scm_pas_set_remote_state(struct device *dev, u32 state, u32 pas_id) { @@ -968,12 +902,6 @@ static int __qcom_scm_pas_set_remote_state(struct devi= ce *dev, u32 state, return ret ? : res.result[0]; } =20 -int qcom_scm_set_remote_state(u32 state, u32 id) -{ - return __qcom_scm_pas_set_remote_state(__scm->dev, state, id); -} -EXPORT_SYMBOL_GPL(qcom_scm_set_remote_state); - static int __qcom_scm_pas_shutdown(struct device *dev, u32 pas_id) { int ret; @@ -1003,12 +931,6 @@ static int __qcom_scm_pas_shutdown(struct device *dev= , u32 pas_id) return ret ? : res.result[0]; } =20 -int qcom_scm_pas_shutdown(u32 pas_id) -{ - return __qcom_scm_pas_shutdown(__scm->dev, pas_id); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_shutdown); - static bool __qcom_scm_pas_supported(struct device *dev, u32 pas_id) { int ret; @@ -1030,12 +952,6 @@ static bool __qcom_scm_pas_supported(struct device *d= ev, u32 pas_id) return ret ? false : !!res.result[0]; } =20 -bool qcom_scm_pas_supported(u32 pas_id) -{ - return __qcom_scm_pas_supported(__scm->dev, pas_id); -} -EXPORT_SYMBOL_GPL(qcom_scm_pas_supported); - static struct qcom_pas_ops qcom_pas_ops_scm =3D { .drv_name =3D "qcom_scm", .supported =3D __qcom_scm_pas_supported, diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmwar= e/qcom/qcom_scm.h index 5747bd191bf1..a0a6bc0229c4 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -64,35 +64,6 @@ bool qcom_scm_is_available(void); int qcom_scm_set_cold_boot_addr(void *entry); int qcom_scm_set_warm_boot_addr(void *entry); void qcom_scm_cpu_power_down(u32 flags); -int qcom_scm_set_remote_state(u32 state, u32 id); - -struct qcom_scm_pas_context { - struct device *dev; - u32 pas_id; - phys_addr_t mem_phys; - size_t mem_size; - void *ptr; - dma_addr_t phys; - ssize_t size; - bool use_tzmem; -}; - -struct qcom_scm_pas_context *devm_qcom_scm_pas_context_alloc(struct device= *dev, - u32 pas_id, - phys_addr_t mem_phys, - size_t mem_size); -int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size, - struct qcom_scm_pas_context *ctx); -void qcom_scm_pas_metadata_release(struct qcom_scm_pas_context *ctx); -int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size); -int qcom_scm_pas_auth_and_reset(u32 pas_id); -int qcom_scm_pas_shutdown(u32 pas_id); -bool qcom_scm_pas_supported(u32 pas_id); -struct resource_table *qcom_scm_pas_get_rsc_table(struct qcom_scm_pas_cont= ext *ctx, - void *input_rt, size_t input_rt_size, - size_t *output_rt_size); - -int qcom_scm_pas_prepare_and_auth_reset(struct qcom_scm_pas_context *ctx); =20 int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); --=20 2.51.0 From nobody Tue Apr 7 17:51:52 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBFD228B7DA; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GrEHxRTG" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2BABC2BCB1; Thu, 12 Mar 2026 06:32:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773297144; bh=KkrCQPuk5NSp3xHqruunZhn3/8ssDm+UZVNEv0P3bms=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GrEHxRTGyhnx0bDmrlk/KRyum1eqD0B3AOjSqC4q8LRFqLV++KI2PjmyW37gdFB/W 91Wg9NVU9sQ1p/iX1X1hRQrjqizeUh+c2mEnGMPuatawW/O+mD1j6QuYQTTmDpgBeK 6CTcmtlrxOh4lZ8xQ6gd9qQoWEFGnFOs5EqclVWR/Crd597GQrcHQnisTWNY+MZzNh EheRdomGAYyE3ZA2rASVMP3r0J4FcE471VjfF0qQSJRqY3f8drzeRwUl3pEPS9Ea7I xhQxui745utU9Ylv+It5WSG+rjl6MVLDnjZJbHnrKC0eSYWONPTak4CdKzcHQatrlJ PuyDGX5/W3AmQ== From: Sumit Garg To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-media@vger.kernel.org, netdev@vger.kernel.org, linux-wireless@vger.kernel.org, ath12k@lists.infradead.org, linux-remoteproc@vger.kernel.org Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.clark@oss.qualcomm.com, sean@poorly.run, akhilpo@oss.qualcomm.com, lumag@kernel.org, abhinav.kumar@linux.dev, jesszhan0024@gmail.com, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, vikash.garodia@oss.qualcomm.com, dikshita.agarwal@oss.qualcomm.com, bod@kernel.org, mchehab@kernel.org, elder@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, jjohnson@kernel.org, mathieu.poirier@linaro.org, trilokkumar.soni@oss.qualcomm.com, mukesh.ojha@oss.qualcomm.com, pavan.kondeti@oss.qualcomm.com, jorge.ramirez@oss.qualcomm.com, tonyh@qti.qualcomm.com, vignesh.viswanathan@oss.qualcomm.com, srinivas.kandagatla@oss.qualcomm.com, amirreza.zarrabi@oss.qualcomm.com, jens.wiklander@linaro.org, op-tee@lists.trustedfirmware.org, apurupa@qti.qualcomm.com, skare@qti.qualcomm.com, linux-kernel@vger.kernel.org, Sumit Garg Subject: [PATCH v2 15/15] MAINTAINERS: Add maintainer entry for Qualcomm PAS TZ service Date: Thu, 12 Mar 2026 11:57:56 +0530 Message-ID: <20260312062756.694390-16-sumit.garg@kernel.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260312062756.694390-1-sumit.garg@kernel.org> References: <20260312062756.694390-1-sumit.garg@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg Add Sumit Garg as the maintainer for the Qualcomm generic Peripheral Authentication Service (PAS) as well as the PAS TEE backend driver. Signed-off-by: Sumit Garg --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 61bf550fd37c..88763b3b2a4a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21822,6 +21822,15 @@ F: Documentation/devicetree/bindings/media/*qcom* F: drivers/media/platform/qcom F: include/dt-bindings/media/*qcom* =20 +QUALCOMM PAS TZ SERVICE +M: Sumit Garg +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: drivers/firmware/qcom/qcom_pas.c +F: drivers/firmware/qcom/qcom_pas.h +F: drivers/firmware/qcom/qcom_pas_tee.c +F: include/linux/firmware/qcom/qcom_pas.h + QUALCOMM SMB CHARGER DRIVER M: Casey Connolly L: linux-arm-msm@vger.kernel.org --=20 2.51.0