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charset="utf-8" Replace manual usize-to-u64 conversions of SZ_* constants with the DeviceSize trait's associated constants on u64. With the DeviceSize trait in scope, u64::SZ_1M replaces usize_as_u64(SZ_1M) and similar. Also switch Alignment::new::() calls to Alignment::from_u64(), which accepts u64 DeviceSize constants directly. This removes several now-unused imports: usize_as_u64 and the SZ_* type-level constants. Signed-off-by: John Hubbard --- drivers/gpu/nova-core/fb.rs | 31 ++++++++++++++----------------- drivers/gpu/nova-core/gsp/fw.rs | 18 +++++++----------- drivers/gpu/nova-core/regs.rs | 6 +++--- 3 files changed, 24 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs index 6536d0035cb1..aa80fffc4a30 100644 --- a/drivers/gpu/nova-core/fb.rs +++ b/drivers/gpu/nova-core/fb.rs @@ -13,7 +13,7 @@ Alignable, Alignment, // }, - sizes::*, + sizes::DeviceSize, sync::aref::ARef, // }; =20 @@ -23,10 +23,7 @@ firmware::gsp::GspFirmware, gpu::Chipset, gsp, - num::{ - usize_as_u64, - FromSafeCast, // - }, + num::FromSafeCast, regs, }; =20 @@ -126,8 +123,8 @@ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Resul= t { if f.alternate() { let size =3D self.len(); =20 - if size < usize_as_u64(SZ_1M) { - let size_kib =3D size / usize_as_u64(SZ_1K); + if size < u64::SZ_1M { + let size_kib =3D size / u64::SZ_1K; f.write_fmt(fmt!( "{:#x}..{:#x} ({} KiB)", self.0.start, @@ -135,7 +132,7 @@ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Resul= t { size_kib )) } else { - let size_mib =3D size / usize_as_u64(SZ_1M); + let size_mib =3D size / u64::SZ_1M; f.write_fmt(fmt!( "{:#x}..{:#x} ({} MiB)", self.0.start, @@ -185,14 +182,14 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_f= w: &GspFirmware) -> Result< =20 let vga_workspace =3D { let vga_base =3D { - const NV_PRAMIN_SIZE: u64 =3D usize_as_u64(SZ_1M); + const NV_PRAMIN_SIZE: u64 =3D u64::SZ_1M; let base =3D fb.end - NV_PRAMIN_SIZE; =20 if hal.supports_display(bar) { match regs::NV_PDISP_VGA_WORKSPACE_BASE::read(bar).vga= _workspace_addr() { Some(addr) =3D> { if addr < base { - const VBIOS_WORKSPACE_SIZE: u64 =3D usize_= as_u64(SZ_128K); + const VBIOS_WORKSPACE_SIZE: u64 =3D u64::S= Z_128K; =20 // Point workspace address to end of frame= buffer. fb.end - VBIOS_WORKSPACE_SIZE @@ -211,15 +208,15 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_f= w: &GspFirmware) -> Result< }; =20 let frts =3D { - const FRTS_DOWN_ALIGN: Alignment =3D Alignment::new::= (); - const FRTS_SIZE: u64 =3D usize_as_u64(SZ_1M); + const FRTS_DOWN_ALIGN: Alignment =3D Alignment::from_u64(u64::= SZ_128K); + const FRTS_SIZE: u64 =3D u64::SZ_1M; let frts_base =3D vga_workspace.start.align_down(FRTS_DOWN_ALI= GN) - FRTS_SIZE; =20 FbRange(frts_base..frts_base + FRTS_SIZE) }; =20 let boot =3D { - const BOOTLOADER_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const BOOTLOADER_DOWN_ALIGN: Alignment =3D Alignment::from_u64= (u64::SZ_4K); let bootloader_size =3D u64::from_safe_cast(gsp_fw.bootloader.= ucode.size()); let bootloader_base =3D (frts.start - bootloader_size).align_d= own(BOOTLOADER_DOWN_ALIGN); =20 @@ -227,7 +224,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let elf =3D { - const ELF_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const ELF_DOWN_ALIGN: Alignment =3D Alignment::from_u64(u64::S= Z_64K); let elf_size =3D u64::from_safe_cast(gsp_fw.size); let elf_addr =3D (boot.start - elf_size).align_down(ELF_DOWN_A= LIGN); =20 @@ -235,7 +232,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let wpr2_heap =3D { - const WPR2_HEAP_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const WPR2_HEAP_DOWN_ALIGN: Alignment =3D Alignment::from_u64(= u64::SZ_1M); let wpr2_heap_size =3D gsp::LibosParams::from_chipset(chipset).wpr_heap_size(chip= set, fb.end); let wpr2_heap_addr =3D (elf.start - wpr2_heap_size).align_down= (WPR2_HEAP_DOWN_ALIGN); @@ -244,7 +241,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let wpr2 =3D { - const WPR2_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const WPR2_DOWN_ALIGN: Alignment =3D Alignment::from_u64(u64::= SZ_1M); let wpr2_addr =3D (wpr2_heap.start - u64::from_safe_cast(size_= of::())) .align_down(WPR2_DOWN_ALIGN); =20 @@ -252,7 +249,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let heap =3D { - const HEAP_SIZE: u64 =3D usize_as_u64(SZ_1M); + const HEAP_SIZE: u64 =3D u64::SZ_1M; =20 FbRange(wpr2.start - HEAP_SIZE..wpr2.start) }; diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw= .rs index 25fca1f6db2c..454a4a92105a 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -15,10 +15,7 @@ Alignable, Alignment, // }, - sizes::{ - SZ_128K, - SZ_1M, // - }, + sizes::DeviceSize, transmute::{ AsBytes, FromBytes, // @@ -69,7 +66,7 @@ fn client_alloc_size() -> u64 { /// Returns the amount of memory to reserve for management purposes fo= r a framebuffer of size /// `fb_size`. fn management_overhead(fb_size: u64) -> u64 { - let fb_size_gb =3D fb_size.div_ceil(u64::from_safe_cast(kernel::si= zes::SZ_1G)); + let fb_size_gb =3D fb_size.div_ceil(u64::SZ_1G); =20 u64::from(bindings::GSP_FW_HEAP_PARAM_SIZE_PER_GB_FB) .saturating_mul(fb_size_gb) @@ -91,9 +88,8 @@ impl LibosParams { const LIBOS2: LibosParams =3D LibosParams { carveout_size: num::u32_as_u64(bindings::GSP_FW_HEAP_PARAM_OS_SIZE= _LIBOS2), allowed_heap_size: num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVER= RIDE_LIBOS2_MIN_MB) - * num::usize_as_u64(SZ_1M) - ..num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_M= AX_MB) - * num::usize_as_u64(SZ_1M), + * u64::SZ_1M + ..num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_M= AX_MB) * u64::SZ_1M, }; =20 /// Version 3 of the GSP LIBOS (GA102+) @@ -101,9 +97,9 @@ impl LibosParams { carveout_size: num::u32_as_u64(bindings::GSP_FW_HEAP_PARAM_OS_SIZE= _LIBOS3_BAREMETAL), allowed_heap_size: num::u32_as_u64( bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS3_BAREMETAL_MIN_MB, - ) * num::usize_as_u64(SZ_1M) + ) * u64::SZ_1M ..num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS3_B= AREMETAL_MAX_MB) - * num::usize_as_u64(SZ_1M), + * u64::SZ_1M, }; =20 /// Returns the libos parameters corresponding to `chipset`. @@ -181,7 +177,7 @@ pub(crate) fn new(gsp_firmware: &GspFirmware, fb_layout= : &FbLayout) -> Self { gspFwWprEnd: fb_layout .vga_workspace .start - .align_down(Alignment::new::()), + .align_down(Alignment::from_u64(u64::SZ_128K)), gspFwHeapVfPartitionCount: fb_layout.vf_partition_count, fbSize: fb_layout.fb.end - fb_layout.fb.start, vgaWorkspaceOffset: fb_layout.vga_workspace.start, diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 53f412f0ca32..8514b4bd7279 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -9,6 +9,7 @@ =20 use kernel::{ prelude::*, + sizes::DeviceSize, time, // }; =20 @@ -32,7 +33,6 @@ Architecture, Chipset, // }, - num::FromSafeCast, }; =20 // PMC @@ -129,7 +129,7 @@ impl NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE { /// Returns the usable framebuffer size, in bytes. pub(crate) fn usable_fb_size(self) -> u64 { let size =3D (u64::from(self.lower_mag()) << u64::from(self.lower_= scale())) - * u64::from_safe_cast(kernel::sizes::SZ_1M); + * u64::SZ_1M; =20 if self.ecc_mode_enabled() { // Remove the amount of memory reserved for ECC (one per 16 un= its). @@ -218,7 +218,7 @@ pub(crate) fn completed(self) -> bool { impl NV_USABLE_FB_SIZE_IN_MB { /// Returns the usable framebuffer size, in bytes. pub(crate) fn usable_fb_size(self) -> u64 { - u64::from(self.value()) * u64::from_safe_cast(kernel::sizes::SZ_1M) + u64::from(self.value()) * u64::SZ_1M } } =20 --=20 2.53.0