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charset="utf-8" The SZ_* constants are usize, matching the CPU pointer width. But device address spaces have their own widths (32-bit MMIO windows, 64-bit GPU framebuffers, etc.), so drivers end up with repeated usize-to-u64 or usize-to-u32 conversion calls like usize_as_u64(SZ_1M). This adds boilerplate with no safety benefit. Add a DeviceSize trait with associated SZ_* constants, implemented for u32 and u64. With the trait in scope, callers write u64::SZ_1M or u32::SZ_4K to get the constant in their device's native width. All SZ_* values fit in a u32, so both implementations are lossless. The u32 impl has a const assert to catch any future constant that would overflow; the u64 cast from usize is inherently lossless. Replace the hand-written constant list with a define_sizes! macro that generates the usize constants, the trait, and both trait impls from a single list of names. Adding a new size or a new target type requires changing only one place. The trait also enables future generic APIs that accept T: DeviceSize, so shared infrastructure can work with whatever address width the driver declares. Suggested-by: Danilo Krummrich Link: https://lore.kernel.org/all/DGB9G697GSWO.3VBFGU5MKFPMR@kernel.org/ Link: https://lore.kernel.org/all/DGHI8WRKBQS9.38910L6FIIZTE@kernel.org/ Signed-off-by: John Hubbard --- rust/kernel/sizes.rs | 132 ++++++++++++++++++++++++++++--------------- 1 file changed, 88 insertions(+), 44 deletions(-) diff --git a/rust/kernel/sizes.rs b/rust/kernel/sizes.rs index 661e680d9330..6b11ec6d97b3 100644 --- a/rust/kernel/sizes.rs +++ b/rust/kernel/sizes.rs @@ -3,48 +3,92 @@ //! Commonly used sizes. //! //! C headers: [`include/linux/sizes.h`](srctree/include/linux/sizes.h). +//! +//! The top-level `SZ_*` constants are [`usize`]-typed, for use in kernel = page +//! arithmetic and similar CPU-side work. +//! +//! The [`DeviceSize`] trait provides the same constants as associated con= stants +//! on [`u32`] and [`u64`], for use in device address spaces where the add= ress +//! width depends on the hardware. Device drivers frequently need these co= nstants +//! as [`u64`] (or [`u32`]) rather than [`usize`], because device address = spaces +//! are sized independently of the CPU pointer width. +//! +//! ``` +//! use kernel::sizes::{DeviceSize, SZ_1M}; +//! +//! // usize constant (CPU-side) +//! let pages: usize =3D SZ_1M / kernel::page::PAGE_SIZE; +//! +//! // Device-side constant via the trait +//! let heap_size: u64 =3D 14 * u64::SZ_1M; +//! let small: u32 =3D u32::SZ_4K; +//! ``` + +macro_rules! define_sizes { + ($($name:ident),* $(,)?) =3D> { + // `usize` constants, from the C `SZ_*` defines in `include/linux/= sizes.h`. + $( + #[doc =3D concat!("`", stringify!($name), "` as a [`usize`].")] + pub const $name: usize =3D bindings::$name as usize; + )* + + /// Size constants for device address spaces. + /// + /// Implemented for [`u32`] and [`u64`] so drivers can choose the = width + /// that matches their hardware. All `SZ_*` values fit in a [`u32`= ], so + /// both implementations are lossless. + /// + /// ``` + /// use kernel::sizes::DeviceSize; + /// + /// let gpu_heap: u64 =3D 14 * u64::SZ_1M; + /// let mmio_window: u32 =3D u32::SZ_16M; + /// ``` + pub trait DeviceSize { + $( + #[doc =3D concat!("`", stringify!($name), "` for this type= .")] + const $name: Self; + )* + } + + impl DeviceSize for u32 { + $( + const $name: Self =3D { + assert!(self::$name <=3D u32::MAX as usize); + self::$name as u32 + }; + )* + } + + impl DeviceSize for u64 { + $( + const $name: Self =3D self::$name as u64; + )* + } + }; +} =20 -/// 0x00000400 -pub const SZ_1K: usize =3D bindings::SZ_1K as usize; -/// 0x00000800 -pub const SZ_2K: usize =3D bindings::SZ_2K as usize; -/// 0x00001000 -pub const SZ_4K: usize =3D bindings::SZ_4K as usize; -/// 0x00002000 -pub const SZ_8K: usize =3D bindings::SZ_8K as usize; -/// 0x00004000 -pub const SZ_16K: usize =3D bindings::SZ_16K as usize; -/// 0x00008000 -pub const SZ_32K: usize =3D bindings::SZ_32K as usize; -/// 0x00010000 -pub const SZ_64K: usize =3D bindings::SZ_64K as usize; -/// 0x00020000 -pub const SZ_128K: usize =3D bindings::SZ_128K as usize; -/// 0x00040000 -pub const SZ_256K: usize =3D bindings::SZ_256K as usize; -/// 0x00080000 -pub const SZ_512K: usize =3D bindings::SZ_512K as usize; -/// 0x00100000 -pub const SZ_1M: usize =3D bindings::SZ_1M as usize; -/// 0x00200000 -pub const SZ_2M: usize =3D bindings::SZ_2M as usize; -/// 0x00400000 -pub const SZ_4M: usize =3D bindings::SZ_4M as usize; -/// 0x00800000 -pub const SZ_8M: usize =3D bindings::SZ_8M as usize; -/// 0x01000000 -pub const SZ_16M: usize =3D bindings::SZ_16M as usize; -/// 0x02000000 -pub const SZ_32M: usize =3D bindings::SZ_32M as usize; -/// 0x04000000 -pub const SZ_64M: usize =3D bindings::SZ_64M as usize; -/// 0x08000000 -pub const SZ_128M: usize =3D bindings::SZ_128M as usize; -/// 0x10000000 -pub const SZ_256M: usize =3D bindings::SZ_256M as usize; -/// 0x20000000 -pub const SZ_512M: usize =3D bindings::SZ_512M as usize; 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charset="utf-8" Alignment::new() takes a const usize, which means callers that work with DeviceSize constants still need to import the usize SZ_* variants. Add from_u64() so callers can write Alignment::from_u64(u64::SZ_128K) and stay entirely in the DeviceSize world. Both asserts evaluate at compile time in const context, so there is no runtime cost. Signed-off-by: John Hubbard --- rust/kernel/ptr.rs | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/rust/kernel/ptr.rs b/rust/kernel/ptr.rs index 5b6a382637fe..b06f6b404a46 100644 --- a/rust/kernel/ptr.rs +++ b/rust/kernel/ptr.rs @@ -76,6 +76,41 @@ pub const fn new_checked(align: usize) -> Option { } } =20 + /// Creates an [`Alignment`] from a [`u64`] value. + /// + /// This is useful when the alignment comes from a [`DeviceSize`] cons= tant + /// rather than a [`usize`] literal. + /// + /// A build error is triggered if `align` is not a power of two, or if= it + /// exceeds [`usize::MAX`]. + /// + /// [`DeviceSize`]: crate::sizes::DeviceSize + /// + /// # Examples + /// + /// ``` + /// use kernel::ptr::Alignment; + /// use kernel::sizes::DeviceSize; + /// + /// let v =3D Alignment::from_u64(u64::SZ_128K); + /// assert_eq!(v.as_usize(), 0x0002_0000); + /// ``` + #[inline(always)] + pub const fn from_u64(align: u64) -> Self { + assert!( + align.is_power_of_two(), + "Provided alignment is not a power of two." + ); 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charset="utf-8" Replace manual usize-to-u64 conversions of SZ_* constants with the DeviceSize trait's associated constants on u64. With the DeviceSize trait in scope, u64::SZ_1M replaces usize_as_u64(SZ_1M) and similar. Also switch Alignment::new::() calls to Alignment::from_u64(), which accepts u64 DeviceSize constants directly. This removes several now-unused imports: usize_as_u64 and the SZ_* type-level constants. Signed-off-by: John Hubbard --- drivers/gpu/nova-core/fb.rs | 31 ++++++++++++++----------------- drivers/gpu/nova-core/gsp/fw.rs | 18 +++++++----------- drivers/gpu/nova-core/regs.rs | 6 +++--- 3 files changed, 24 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs index 6536d0035cb1..aa80fffc4a30 100644 --- a/drivers/gpu/nova-core/fb.rs +++ b/drivers/gpu/nova-core/fb.rs @@ -13,7 +13,7 @@ Alignable, Alignment, // }, - sizes::*, + sizes::DeviceSize, sync::aref::ARef, // }; =20 @@ -23,10 +23,7 @@ firmware::gsp::GspFirmware, gpu::Chipset, gsp, - num::{ - usize_as_u64, - FromSafeCast, // - }, + num::FromSafeCast, regs, }; =20 @@ -126,8 +123,8 @@ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Resul= t { if f.alternate() { let size =3D self.len(); =20 - if size < usize_as_u64(SZ_1M) { - let size_kib =3D size / usize_as_u64(SZ_1K); + if size < u64::SZ_1M { + let size_kib =3D size / u64::SZ_1K; f.write_fmt(fmt!( "{:#x}..{:#x} ({} KiB)", self.0.start, @@ -135,7 +132,7 @@ fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Resul= t { size_kib )) } else { - let size_mib =3D size / usize_as_u64(SZ_1M); + let size_mib =3D size / u64::SZ_1M; f.write_fmt(fmt!( "{:#x}..{:#x} ({} MiB)", self.0.start, @@ -185,14 +182,14 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_f= w: &GspFirmware) -> Result< =20 let vga_workspace =3D { let vga_base =3D { - const NV_PRAMIN_SIZE: u64 =3D usize_as_u64(SZ_1M); + const NV_PRAMIN_SIZE: u64 =3D u64::SZ_1M; let base =3D fb.end - NV_PRAMIN_SIZE; =20 if hal.supports_display(bar) { match regs::NV_PDISP_VGA_WORKSPACE_BASE::read(bar).vga= _workspace_addr() { Some(addr) =3D> { if addr < base { - const VBIOS_WORKSPACE_SIZE: u64 =3D usize_= as_u64(SZ_128K); + const VBIOS_WORKSPACE_SIZE: u64 =3D u64::S= Z_128K; =20 // Point workspace address to end of frame= buffer. fb.end - VBIOS_WORKSPACE_SIZE @@ -211,15 +208,15 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_f= w: &GspFirmware) -> Result< }; =20 let frts =3D { - const FRTS_DOWN_ALIGN: Alignment =3D Alignment::new::= (); - const FRTS_SIZE: u64 =3D usize_as_u64(SZ_1M); + const FRTS_DOWN_ALIGN: Alignment =3D Alignment::from_u64(u64::= SZ_128K); + const FRTS_SIZE: u64 =3D u64::SZ_1M; let frts_base =3D vga_workspace.start.align_down(FRTS_DOWN_ALI= GN) - FRTS_SIZE; =20 FbRange(frts_base..frts_base + FRTS_SIZE) }; =20 let boot =3D { - const BOOTLOADER_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const BOOTLOADER_DOWN_ALIGN: Alignment =3D Alignment::from_u64= (u64::SZ_4K); let bootloader_size =3D u64::from_safe_cast(gsp_fw.bootloader.= ucode.size()); let bootloader_base =3D (frts.start - bootloader_size).align_d= own(BOOTLOADER_DOWN_ALIGN); =20 @@ -227,7 +224,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let elf =3D { - const ELF_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const ELF_DOWN_ALIGN: Alignment =3D Alignment::from_u64(u64::S= Z_64K); let elf_size =3D u64::from_safe_cast(gsp_fw.size); let elf_addr =3D (boot.start - elf_size).align_down(ELF_DOWN_A= LIGN); =20 @@ -235,7 +232,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let wpr2_heap =3D { - const WPR2_HEAP_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const WPR2_HEAP_DOWN_ALIGN: Alignment =3D Alignment::from_u64(= u64::SZ_1M); let wpr2_heap_size =3D gsp::LibosParams::from_chipset(chipset).wpr_heap_size(chip= set, fb.end); let wpr2_heap_addr =3D (elf.start - wpr2_heap_size).align_down= (WPR2_HEAP_DOWN_ALIGN); @@ -244,7 +241,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let wpr2 =3D { - const WPR2_DOWN_ALIGN: Alignment =3D Alignment::new::(); + const WPR2_DOWN_ALIGN: Alignment =3D Alignment::from_u64(u64::= SZ_1M); let wpr2_addr =3D (wpr2_heap.start - u64::from_safe_cast(size_= of::())) .align_down(WPR2_DOWN_ALIGN); =20 @@ -252,7 +249,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:= &GspFirmware) -> Result< }; =20 let heap =3D { - const HEAP_SIZE: u64 =3D usize_as_u64(SZ_1M); + const HEAP_SIZE: u64 =3D u64::SZ_1M; =20 FbRange(wpr2.start - HEAP_SIZE..wpr2.start) }; diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw= .rs index 25fca1f6db2c..454a4a92105a 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -15,10 +15,7 @@ Alignable, Alignment, // }, - sizes::{ - SZ_128K, - SZ_1M, // - }, + sizes::DeviceSize, transmute::{ AsBytes, FromBytes, // @@ -69,7 +66,7 @@ fn client_alloc_size() -> u64 { /// Returns the amount of memory to reserve for management purposes fo= r a framebuffer of size /// `fb_size`. fn management_overhead(fb_size: u64) -> u64 { - let fb_size_gb =3D fb_size.div_ceil(u64::from_safe_cast(kernel::si= zes::SZ_1G)); + let fb_size_gb =3D fb_size.div_ceil(u64::SZ_1G); =20 u64::from(bindings::GSP_FW_HEAP_PARAM_SIZE_PER_GB_FB) .saturating_mul(fb_size_gb) @@ -91,9 +88,8 @@ impl LibosParams { const LIBOS2: LibosParams =3D LibosParams { carveout_size: num::u32_as_u64(bindings::GSP_FW_HEAP_PARAM_OS_SIZE= _LIBOS2), allowed_heap_size: num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVER= RIDE_LIBOS2_MIN_MB) - * num::usize_as_u64(SZ_1M) - ..num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_M= AX_MB) - * num::usize_as_u64(SZ_1M), + * u64::SZ_1M + ..num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS2_M= AX_MB) * u64::SZ_1M, }; =20 /// Version 3 of the GSP LIBOS (GA102+) @@ -101,9 +97,9 @@ impl LibosParams { carveout_size: num::u32_as_u64(bindings::GSP_FW_HEAP_PARAM_OS_SIZE= _LIBOS3_BAREMETAL), allowed_heap_size: num::u32_as_u64( bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS3_BAREMETAL_MIN_MB, - ) * num::usize_as_u64(SZ_1M) + ) * u64::SZ_1M ..num::u32_as_u64(bindings::GSP_FW_HEAP_SIZE_OVERRIDE_LIBOS3_B= AREMETAL_MAX_MB) - * num::usize_as_u64(SZ_1M), + * u64::SZ_1M, }; =20 /// Returns the libos parameters corresponding to `chipset`. @@ -181,7 +177,7 @@ pub(crate) fn new(gsp_firmware: &GspFirmware, fb_layout= : &FbLayout) -> Self { gspFwWprEnd: fb_layout .vga_workspace .start - .align_down(Alignment::new::()), + .align_down(Alignment::from_u64(u64::SZ_128K)), gspFwHeapVfPartitionCount: fb_layout.vf_partition_count, fbSize: fb_layout.fb.end - fb_layout.fb.start, vgaWorkspaceOffset: fb_layout.vga_workspace.start, diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 53f412f0ca32..8514b4bd7279 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -9,6 +9,7 @@ =20 use kernel::{ prelude::*, + sizes::DeviceSize, time, // }; =20 @@ -32,7 +33,6 @@ Architecture, Chipset, // }, - num::FromSafeCast, }; =20 // PMC @@ -129,7 +129,7 @@ impl NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE { /// Returns the usable framebuffer size, in bytes. pub(crate) fn usable_fb_size(self) -> u64 { let size =3D (u64::from(self.lower_mag()) << u64::from(self.lower_= scale())) - * u64::from_safe_cast(kernel::sizes::SZ_1M); + * u64::SZ_1M; =20 if self.ecc_mode_enabled() { // Remove the amount of memory reserved for ECC (one per 16 un= its). @@ -218,7 +218,7 @@ pub(crate) fn completed(self) -> bool { impl NV_USABLE_FB_SIZE_IN_MB { /// Returns the usable framebuffer size, in bytes. pub(crate) fn usable_fb_size(self) -> u64 { - u64::from(self.value()) * u64::from_safe_cast(kernel::sizes::SZ_1M) + u64::from(self.value()) * u64::SZ_1M } } =20 --=20 2.53.0