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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi b/arch/a= rm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi index 1e0a588b2a15..a4e2fbdc0d0b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6-logicpd-baseboard.dtsi @@ -318,7 +318,7 @@ mipi_csi2_in: endpoint { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 9 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 9 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts b/arch/a= rm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts index 5ed55f74b398..7b4c16e3fd5e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts @@ -321,7 +321,7 @@ phy: ethernet-phy@1 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 20 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 20 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi b/arch/arm/boot/dts= /nxp/imx/imx6dl-qmx6.dtsi index d5baec5e7a78..de6473a0d262 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi @@ -271,7 +271,7 @@ vgen6_reg: vgen6 { }; =20 &pcie { - reset-gpio =3D <&gpio1 20 0>; + reset-gpios =3D <&gpio1 20 0>; }; =20 &pwm4 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi b/arch/arm/= boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi index 4a5736526927..d4911fad1d79 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi @@ -571,7 +571,7 @@ &ipu1_di0_disp0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio7 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio7 12 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie>; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Reviewed-by: Alexander Stein Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-icore-rqs.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-pico.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-zii-rdu2.dtsi | 2 +- 30 files changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi b/arch/arm/boot= /dts/nxp/imx/imx6qdl-apf6dev.dtsi index 9e97ef5e43f2..5e33164e5005 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-apf6dev.dtsi @@ -212,7 +212,7 @@ &ipu1_di0_disp0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio6 2 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio6 2 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi b/arch/ar= m/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi index 01d4ea20b13d..4faa7b9c50ff 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-aristainetos2.dtsi @@ -308,7 +308,7 @@ &gpmi { }; =20 &pcie { - reset-gpio =3D <&gpio2 16 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio2 16 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi b/arch/arm/b= oot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi index d7c2b30aecfd..1dc4732bd3fe 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2.dtsi @@ -270,7 +270,7 @@ &ipu1_di0_disp0 { =20 &pcie { pinctrl-0 =3D <&pinctrl_pcie &pinctrl_dhcom_j>; - reset-gpio =3D <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */ + reset-gpios =3D <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */ status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi b/arch/arm/boot/d= ts/nxp/imx/imx6qdl-emcon.dtsi index 9f4e746beb2d..511b3b6dc5e3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi @@ -732,7 +732,7 @@ &ipu1_di0_disp0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie_ctrl>; - reset-gpio =3D <&gpio7 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio7 12 GPIO_ACTIVE_LOW>; disable-gpio =3D <&gpio2 22 GPIO_ACTIVE_LOW>; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw51xx.dtsi index beff5a0f58ab..1d4899f8aec4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi @@ -400,7 +400,7 @@ &ipu1_csi0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw52xx.dtsi index 9d3ba4083216..46e3b2b18aee 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi @@ -504,7 +504,7 @@ timing0: timing-hsd100pxn1 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw53xx.dtsi index 7e84e0a52ef3..dd1201b628f5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi @@ -501,7 +501,7 @@ timing0: timing-hsd100pxn1 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw54xx.dtsi index 81394d47dd68..b8a1e47d1d3b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi @@ -547,7 +547,7 @@ timing0: timing-hsd100pxn1 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw551x.dtsi index 6136a95b9259..57b0d635bdab 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi @@ -456,7 +456,7 @@ &ipu1_csi0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw552x.dtsi index 9c822ca23130..b29c26b729fa 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw552x.dtsi @@ -359,7 +359,7 @@ &i2c3 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw553x.dtsi index 552114a69f5b..198af79b5490 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi @@ -413,7 +413,7 @@ &ipu1_csi0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw560x.dtsi index e9d5bbb43145..4dafd225a34e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi @@ -560,7 +560,7 @@ timing0: timing-hsd100pxn1 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 31 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 31 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw5904.dtsi index 3df4d345da98..a03f422d9a8d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi @@ -528,7 +528,7 @@ timing0: timing-hsd100pxn1 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw5907.dtsi index 87fdc9e2a727..862f44967c71 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5907.dtsi @@ -326,7 +326,7 @@ channel@6 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw5910.dtsi index 099ed2f94d61..8564eb8e7cc0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi @@ -333,7 +333,7 @@ accel@19 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio3 20 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 20 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw5912.dtsi index cbca5e58e812..0a2a9b9db1fa 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi @@ -313,7 +313,7 @@ accel@19 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi b/arch/arm/boot/= dts/nxp/imx/imx6qdl-gw5913.dtsi index 4e4dce5adc15..37f7e15d65ae 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5913.dtsi @@ -292,7 +292,7 @@ &i2c3 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi b/arch/arm= /boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi index 6b737360a532..4755bf2bc65e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi @@ -321,7 +321,7 @@ MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_hummingboard_pcie_reset>; - reset-gpio =3D <&gpio3 4 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 4 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi b/arch/ar= m/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi index 3069e1738ba2..d113130c1770 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi @@ -517,7 +517,7 @@ MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000 &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_hummingboard2_pcie_reset>; - reset-gpio =3D <&gpio2 11 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio2 11 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-icore-rqs.dtsi b/arch/arm/bo= ot/dts/nxp/imx/imx6qdl-icore-rqs.dtsi index dff184a119f3..396b621487ce 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-icore-rqs.dtsi @@ -220,7 +220,7 @@ sgtl5000: codec@a { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio3 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/a= rm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index c771f87b10df..bdc8dc6731e0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -743,7 +743,7 @@ &mipi_csi { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio3 13 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 13 GPIO_ACTIVE_LOW>; }; =20 /* LCD_BKLT_PWM */ diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dt= s/nxp/imx/imx6qdl-mba6.dtsi index ee2c6bec92e8..a492bf4f49d9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi @@ -240,7 +240,7 @@ &i2c2 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio6 7 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio6 7 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi b/arch/ar= m/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi index ef0c26688446..bbdb77e6fec8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi @@ -731,7 +731,7 @@ lvds1_out: endpoint { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio6 31 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio6 31 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi b/arch/a= rm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi index 03fe053880ca..25e6cc3e9ff5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi @@ -639,7 +639,7 @@ lvds1_out: endpoint { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio3 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi b/arch/arm/= boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi index a3c2811e9c6f..661f96fa3990 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira.dtsi @@ -218,7 +218,7 @@ lvds0_out: endpoint { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio2 25 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio2 25 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie>; status =3D "disabled"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi b/arch/ar= m/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi index 6f3becd33a5b..33ebb9320395 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi @@ -399,7 +399,7 @@ MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 17 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 17 GPIO_ACTIVE_LOW>; status =3D "disabled"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-pico.dtsi b/arch/arm/boot/dt= s/nxp/imx/imx6qdl-pico.dtsi index c39a9ebdaba1..f18652b2f6ca 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-pico.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-pico.dtsi @@ -277,7 +277,7 @@ mipi_csi2_in: endpoint { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie_reset>; - reset-gpio =3D <&gpio5 21 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 21 GPIO_ACTIVE_LOW>; }; =20 &pwm1 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi b/arch/arm/boot= /dts/nxp/imx/imx6qdl-sabresd.dtsi index ba29720e3f72..5d379b98d74f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi @@ -754,7 +754,7 @@ lvds0_out: endpoint { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio7 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio7 12 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi b/arch/arm/boo= t/dts/nxp/imx/imx6qdl-var-dart.dtsi index 7749074e438d..13d092cb9961 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-var-dart.dtsi @@ -394,7 +394,7 @@ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 &pcie { fsl,tx-swing-full =3D <103>; fsl,tx-swing-low =3D <103>; - reset-gpio =3D <&gpio4 11 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 11 GPIO_ACTIVE_LOW>; status =3D "disabled"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-zii-rdu2.dtsi b/arch/arm/boo= t/dts/nxp/imx/imx6qdl-zii-rdu2.dtsi index 9ff183e4e069..1860e5a525ee 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-zii-rdu2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-zii-rdu2.dtsi @@ -651,7 +651,7 @@ &ipu1_di0_disp0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio7 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio7 12 GPIO_ACTIVE_LOW>; status =3D "okay"; =20 host@0 { --=20 2.51.0 From nobody Tue Apr 7 14:38:27 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B7BE401A09 for ; Thu, 12 Mar 2026 19:18:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Reviewed-by: Alexander Stein Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/n= xp/imx/imx7d-mba7.dts index e3ee16f1aaa9..a5fc7f80f651 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -122,7 +122,7 @@ &pcie { /* 1.5V logically from 3.3V */ /* probe deferral not supported */ /* pcie-bus-supply =3D <®_mpcie_1v5>; */ - reset-gpio =3D <&gpio5 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 12 GPIO_ACTIVE_LOW>; status =3D "disabled"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts b/arch/arm/boot/dts/nx= p/imx/imx7d-sdb.dts index a370e868cafe..ab7cabe5552d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts @@ -456,7 +456,7 @@ display_out: endpoint { }; =20 &pcie { - reset-gpio =3D <&extended_io 1 GPIO_ACTIVE_LOW>; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Reviewed-by: Alexander Stein Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi | 4 ++-- arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 4 ++-- arch/arm64/boot/dts/freescale/tqma8xxs.dtsi | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi b/arch/arm= 64/boot/dts/freescale/imx8-apalis-v1.1.dtsi index 6fc82b5eb58c..6d8a57ff56c2 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi @@ -806,7 +806,7 @@ &pciea { pinctrl-0 =3D <&pinctrl_reset_moci>; phys =3D <&hsio_phy 0 PHY_TYPE_PCIE 0>; phy-names =3D "pcie-phy"; - reset-gpio =3D <&lsio_gpio0 30 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&lsio_gpio0 30 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie_switch>; }; =20 @@ -816,7 +816,7 @@ &pcieb { pinctrl-0 =3D <&pinctrl_pcieb>, <&pinctrl_wifi>; phys =3D <&hsio_phy 1 PHY_TYPE_PCIE 1>; phy-names =3D "pcie-phy"; - reset-gpio =3D <&lsio_gpio5 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&lsio_gpio5 0 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boo= t/dts/freescale/imx8dxl-evk.dts index 5c68d33e19f2..bdd1dbc6b322 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts @@ -651,7 +651,7 @@ &pcie0 { phy-names =3D "pcie-phy"; pinctrl-0 =3D <&pinctrl_pcieb>; pinctrl-names =3D "default"; - reset-gpio =3D <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcieb>; vpcie3v3aux-supply =3D <®_pcieb>; status =3D "okay"; @@ -662,7 +662,7 @@ &pcie0_ep { phy-names =3D "pcie-phy"; pinctrl-0 =3D <&pinctrl_pcieb>; pinctrl-names =3D "default"; - reset-gpio =3D <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcieb>; status =3D "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi b/arch/arm64/boot/= dts/freescale/tqma8xxs.dtsi index bfc918f18d01..677a05b38391 100644 --- a/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi +++ b/arch/arm64/boot/dts/freescale/tqma8xxs.dtsi @@ -407,7 +407,7 @@ &pcieb { phy-names =3D "pcie-phy"; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Reviewed-by: Alexander Stein Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm-iot-gateway.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 2 +- 17 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi b/a= rch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi index ea1d5b9c6bae..5642139ebaec 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi @@ -301,7 +301,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 21 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 21 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk_gated>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts b/= arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts index 472c584fb3bd..6a874f3ec22a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts @@ -919,7 +919,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio1 5 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 5 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcieclk 0>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boo= t/dts/freescale/imx8mm-evk.dtsi index 8be44eaf4e1e..31052ca1971e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -533,7 +533,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 21 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 21 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi b/arch= /arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi index 299752aa8277..7eca9127bb9e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-innocomm-wb15.dtsi @@ -209,7 +209,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio5 21 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 21 GPIO_ACTIVE_LOW>; fsl,max-link-speed =3D <1>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, <&clk IMX8MM_CLK_PCIE1_C= TRL>; assigned-clock-rates =3D <10000000>, <250000000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-iot-gateway.dts b/arch/ar= m64/boot/dts/freescale/imx8mm-iot-gateway.dts index 370558a8ba46..e5b8415dbe0f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-iot-gateway.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-iot-gateway.dts @@ -137,7 +137,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio3 20 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 20 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/= arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts index 6043e7d16306..0165ae04c6ae 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts @@ -205,7 +205,7 @@ &pcie0 { assigned-clock-rates =3D <10000000>, <250000000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 9 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 9 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts b/arc= h/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts index 2ecc8b3c67da..a5f3dfe06a4a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts @@ -182,7 +182,7 @@ &pcie0 { assigned-clock-rates =3D <10000000>, <100000000>, <250000000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio3 22 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 22 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts index 8dcc5cbcb8f6..ce785b103a57 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts @@ -90,7 +90,7 @@ &pcie_phy { =20 /* PCIe slot on X36 */ &pcie0 { - reset-gpio =3D <&expander0 14 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&expander0 14 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcieclk 3>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi index 320806d3d073..bb441fd4aa23 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi @@ -122,7 +122,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 6 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 6 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi index 266038fbbef9..184fdfb26cd5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi @@ -147,7 +147,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 6 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 6 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi index 2aa6c1090fc7..1e84c365b2cf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi @@ -167,7 +167,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 6 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 6 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi index 53004c4a13aa..e0982b4cb663 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi @@ -152,7 +152,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 6 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 6 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/= arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts index 272c2b223d16..a31bd864c022 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts @@ -726,7 +726,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio5 2 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 2 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/= arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts index 468c7e993c52..4c839dfa3ce0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts @@ -626,7 +626,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 5 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 5 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts b/arch/= arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts index 636daa3d6ca2..ea67654c9ded 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts @@ -559,7 +559,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio5 11 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 11 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts b/arch/= arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts index 99572961d9e1..7028d028657a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts @@ -623,7 +623,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio5 11 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 11 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MM_CLK_PCIE1_AUX>; assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/= boot/dts/freescale/imx8mm-verdin.dtsi index 1594ce9182a5..3b656f8a81b6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi @@ -672,7 +672,7 @@ &pcie0 { pinctrl-names =3D "default"; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 2 +- 19 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dts= i b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi index f654d866e58c..7d7d96f0642a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi @@ -568,7 +568,7 @@ &mipi_dsi { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 20 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 20 GPIO_ACTIVE_LOW>; fsl,tx-deemph-gen1 =3D <0x1f>; fsl,max-link-speed =3D <3>; status =3D "okay"; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm= 64/boot/dts/freescale/imx8mp-beacon-kit.dts index 31c33acb560c..001430130e01 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts @@ -530,7 +530,7 @@ dsi_out: endpoint { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 21 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 21 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts b/= arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts index 7e46537a22a0..bf6c53700057 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts @@ -614,7 +614,7 @@ &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; fsl,max-link-speed =3D <3>; - reset-gpio =3D <&gpio1 5 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 5 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie0>; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts b/arch/arm= 64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts index 3d18c964a22c..68a481965cf0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts @@ -237,7 +237,7 @@ &pcie_phy { =20 &pcie { fsl,max-link-speed =3D <1>; - reset-gpio =3D <&gpio1 6 GPIO_ACTIVE_LOW>; /* GPIO J */ + reset-gpios =3D <&gpio1 6 GPIO_ACTIVE_LOW>; /* GPIO J */ status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts b/arch/arm= 64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts index ef012e8365b1..78f0ba14ea5b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts @@ -296,7 +296,7 @@ &pcie_phy { =20 &pcie { fsl,max-link-speed =3D <3>; - reset-gpio =3D <&gpio1 6 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 6 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi b/arch/arm64/b= oot/dts/freescale/imx8mp-edm-g.dtsi index 3f1e0837f349..1c8a380dc01b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi @@ -310,7 +310,7 @@ &i2c5 { &pcie { pinctrl-0 =3D <&pinctrl_pcie>; pinctrl-names =3D "default"; - reset-gpio =3D <&gpio1 1 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 1 GPIO_ACTIVE_LOW>; }; =20 &pwm1 { diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot= /dts/freescale/imx8mp-evk.dts index aedc09937716..fcfe89cb76cf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -769,7 +769,7 @@ &pcie_phy { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio2 7 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio2 7 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie0>; vpcie3v3aux-supply =3D <®_pcie0>; supports-clkreq; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts b/ar= ch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts index 36cd452f1583..a09b2dc34429 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts @@ -34,7 +34,7 @@ &iomuxc { &pcie { pinctrl-0 =3D <&m2_reset_pins>; pinctrl-names =3D "default"; - reset-gpio =3D <&gpio1 6 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 6 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts b/= arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts index d32844c3af05..8e87a9543382 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts @@ -57,7 +57,7 @@ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x0 &pcie { pinctrl-0 =3D <&pcie_eth_pins>; pinctrl-names =3D "default"; - reset-gpio =3D <&gpio4 28 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 28 GPIO_ACTIVE_LOW>; status =3D "okay"; =20 root@0,0 { diff --git a/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrie= r.dts b/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts index 2173a36ff691..393cca39a0d0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts @@ -187,7 +187,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio3 2 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 2 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts b/arch= /arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts index 86b8c5af4153..254d6930eca1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts @@ -243,7 +243,7 @@ ldb_lvds_ch0: endpoint { =20 /* Mini PCIe */ &pcie { - reset-gpio =3D <&gpio1 8 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 8 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_vdd_3v3>; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b= /arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index 0fe52c73fc8f..7a4681578b24 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -264,7 +264,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio1 8 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 8 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_vcc_3v3_sw>; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi index 9317e62304e3..1c2e5be5ed9a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi @@ -123,7 +123,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi index 76020ef89bf3..89681b21ed36 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi @@ -154,7 +154,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 29 GPIO_ACTIVE_LOW>; status =3D "okay"; =20 pcie@0,0 { diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi index 5eb114d2360a..90d15340f935 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi @@ -166,7 +166,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 29 GPIO_ACTIVE_LOW>; status =3D "okay"; =20 pcie@0,0 { diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/= arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts index 7662663ff5da..e37f580fa90e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts @@ -680,7 +680,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio2 17 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio2 17 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi index f90b293c85fc..efdd4b0231af 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi @@ -140,7 +140,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi b/arch= /arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi index 2b86cc62a41a..fb12bfaa9b77 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi @@ -237,7 +237,7 @@ &pcie_phy { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio4 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 29 GPIO_ACTIVE_LOW>; status =3D "okay"; =20 pcie@0,0 { diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/= boot/dts/freescale/imx8mp-verdin.dtsi index d31f8082394f..0f5f924b6a6d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi @@ -801,7 +801,7 @@ &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Reviewed-by: Alexander Stein Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 4 ++-- arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi | 4 ++-- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot= /dts/freescale/imx8mq-evk.dts index d48f901487d4..54826420740c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -369,7 +369,7 @@ mipi_dsi_out: endpoint { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio5 28 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 28 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MQ_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MQ_CLK_PCIE1_PHY>, @@ -392,7 +392,7 @@ &pcie0_ep { &pcie1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie1>; - reset-gpio =3D <&gpio5 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 12 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MQ_CLK_PCIE2_ROOT>, <&pcie0_refclk>, <&clk IMX8MQ_CLK_PCIE2_PHY>, diff --git a/arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts b/= arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts index d8cf1f27c3ec..2296ff065467 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts @@ -243,7 +243,7 @@ &i2c3 { &pcie0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie0>; - reset-gpio =3D <&gpio1 9 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 9 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MQ_CLK_PCIE1_ROOT>, <&pcie0_refclk>, <&clk IMX8MQ_CLK_PCIE1_PHY>, diff --git a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts b/arch/ar= m64/boot/dts/freescale/imx8mq-mnt-reform2.dts index 3ae3824be027..09f2fb1ad57b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dts @@ -195,7 +195,7 @@ mipi_dsi_out: endpoint { &pcie1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie1>; - reset-gpio =3D <&gpio3 23 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 23 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MQ_CLK_PCIE2_ROOT>, <&pcie1_refclk>, <&clk IMX8MQ_CLK_PCIE2_PHY>, diff --git a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts b/arch= /arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts index 0165f3a25985..aa54182def4f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts @@ -93,7 +93,7 @@ &led2 { =20 /* PCIe slot on X36 */ &pcie0 { - reset-gpio =3D <&expander0 14 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&expander0 14 GPIO_ACTIVE_LOW>; clocks =3D <&clk IMX8MQ_CLK_PCIE1_ROOT>, <&pcieclk 3>, <&pcieclk 2>, diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm= 64/boot/dts/freescale/imx8mq-zii-ultra.dtsi index c7bbba45f368..f3d0ebe98d5e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi @@ -547,7 +547,7 @@ &usb_dwc3_1 { &pcie0 { pinctrl-names =3D "default"; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot= /dts/freescale/imx8qm-mek.dts index dadc136aec6e..2595181504f4 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -802,7 +802,7 @@ &pciea { phy-names =3D "pcie-phy"; pinctrl-0 =3D <&pinctrl_pciea>; pinctrl-names =3D "default"; - reset-gpio =3D <&lsio_gpio4 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&lsio_gpio4 29 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pciea>; vpcie3v3aux-supply =3D <®_pciea>; supports-clkreq; @@ -814,7 +814,7 @@ &pcieb { phy-names =3D "pcie-phy"; pinctrl-0 =3D <&pinctrl_pcieb>; pinctrl-names =3D "default"; - reset-gpio =3D <&lsio_gpio5 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&lsio_gpio5 0 GPIO_ACTIVE_LOW>; status =3D "disabled"; }; =20 --=20 2.51.0 From nobody Tue Apr 7 14:38:27 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 73C914070EE for ; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 2 +- arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts | 2 +- arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 4 ++-- arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts | 4 ++-- arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts | 4 ++-- 5 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64= /boot/dts/freescale/imx95-15x15-evk.dts index d4184fb8b28c..d0f2d3beb72b 100644 --- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts @@ -554,7 +554,7 @@ &netcmix_blk_ctrl { &pcie0 { pinctrl-0 =3D <&pinctrl_pcie0>; pinctrl-names =3D "default"; - reset-gpio =3D <&gpio5 13 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 13 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_m2_pwr>; vpcie3v3aux-supply =3D <®_m2_pwr>; supports-clkreq; diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts b/arch/arm6= 4/boot/dts/freescale/imx95-15x15-frdm.dts index 0f43e3be7058..7a615b1f6199 100644 --- a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts @@ -549,7 +549,7 @@ &netcmix_blk_ctrl { &pcie0 { pinctrl-0 =3D <&pinctrl_pcie0>; pinctrl-names =3D "default"; - reset-gpio =3D <&gpio5 13 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio5 13 GPIO_ACTIVE_LOW>; supports-clkreq; vpcie-supply =3D <®_m2_mkey_pwr>; status =3D "okay"; diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64= /boot/dts/freescale/imx95-19x19-evk.dts index 041fd838fabb..4439658681f0 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -540,7 +540,7 @@ &netc_timer { &pcie0 { pinctrl-0 =3D <&pinctrl_pcie0>; pinctrl-names =3D "default"; - reset-gpio =3D <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie0>; vpcie3v3aux-supply =3D <®_pcie0>; supports-clkreq; @@ -557,7 +557,7 @@ &pcie0_ep { &pcie1 { pinctrl-0 =3D <&pinctrl_pcie1>; pinctrl-names =3D "default"; - reset-gpio =3D <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_slot_pwr>; vpcie3v3aux-supply =3D <®_slot_pwr>; status =3D "okay"; diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts b/arc= h/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts index 2b0ff232f680..1f2240bd21f8 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-verdin-evk.dts @@ -305,7 +305,7 @@ ethphy0: ethernet-phy@1 { &pcie0 { pinctrl-0 =3D <&pinctrl_pcie0>; pinctrl-names =3D "default"; - reset-gpio =3D <&i2c7_pcal6524 17 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&i2c7_pcal6524 17 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie0>; status =3D "okay"; }; @@ -313,7 +313,7 @@ &pcie0 { &pcie1 { pinctrl-0 =3D <&pinctrl_pcie1>; pinctrl-names =3D "default"; - reset-gpio =3D <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts b/arch/= arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts index 26c2df9b1b60..99ce38df4538 100644 --- a/arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts +++ b/arch/arm64/boot/dts/freescale/imx95-libra-rdk-fpsc.dts @@ -243,13 +243,13 @@ ethphy2: ethernet-phy@8 { }; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Linux kernel already properly parses GPIO active level from phandle arguments, thus we can also drop "reset-gpio-active-high". However this change will impact U-Boot, because it only parses "reset-gpio" property for imx6q amd imx6sq. Intention is to update U-Boot to work with newer DTS, but any other out of tree user of this DTS which did not implement undeprecated "reset-gpios" will be affected as well. There was plenty of time for these projects to switch to undeprecated "reset-gpios", though. Signed-off-by: Krzysztof Kozlowski --- Changes in v2: 1. Drop reset-gpio-active-high, update commit msg --- arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi | 3 +-- arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts | 3 +-- arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora.dts | 3 +-- arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6q-novena.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts | 2 +- 9 files changed, 9 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi b/arch/arm/bo= ot/dts/nxp/imx/imx6q-apalis-eval.dtsi index b6c45ad3f430..87f6c865f5c3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi @@ -55,8 +55,7 @@ &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_reset_moci>; /* active-high meaning opposite of regular PERST# active-low polarity */ - reset-gpio =3D <&gpio1 28 GPIO_ACTIVE_HIGH>; - reset-gpio-active-high; + reset-gpios =3D <&gpio1 28 GPIO_ACTIVE_HIGH>; }; =20 &pwm1 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts b/arch/a= rm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts index 3ac7a4501620..021d402e1310 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts @@ -146,8 +146,7 @@ &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_reset_moci>; /* active-high meaning opposite of regular PERST# active-low polarity */ - reset-gpio =3D <&gpio1 28 GPIO_ACTIVE_HIGH>; - reset-gpio-active-high; + reset-gpios =3D <&gpio1 28 GPIO_ACTIVE_HIGH>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora.dts b/arch/arm/bo= ot/dts/nxp/imx/imx6q-apalis-ixora.dts index f338be435277..1aea31902a34 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora.dts @@ -93,8 +93,7 @@ &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_reset_moci>; /* active-high meaning opposite of regular PERST# active-low polarity */ - reset-gpio =3D <&gpio1 28 GPIO_ACTIVE_HIGH>; - reset-gpio-active-high; + reset-gpios =3D <&gpio1 28 GPIO_ACTIVE_HIGH>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi b/arch/arm/boot/dts/= nxp/imx/imx6q-ba16.dtsi index 02d66523668d..7de8cf7804d1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi @@ -344,7 +344,7 @@ rtc@32 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio7 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio7 12 GPIO_ACTIVE_LOW>; fsl,tx-swing-full =3D <103>; fsl,tx-swing-low =3D <103>; status =3D "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts b/arch/arm/boot/dts= /nxp/imx/imx6q-cm-fx6.dts index 13245af8f74d..ff6c16b9a1dd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-cm-fx6.dts @@ -468,7 +468,7 @@ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio1 26 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 26 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie_power_on_gpio>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts b/arch/arm/boo= t/dts/nxp/imx/imx6q-dmo-edmqmx6.dts index cbe580dec182..5a3783d8f15c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-dmo-edmqmx6.dts @@ -425,7 +425,7 @@ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 8 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 8 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts b/arch/arm/boot/d= ts/nxp/imx/imx6q-gw5400-a.dts index bf8fde9cb38d..e9a4b9f8015a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-gw5400-a.dts @@ -330,7 +330,7 @@ &ldb { }; =20 &pcie { - reset-gpio =3D <&gpio1 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio1 29 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts b/arch/arm/boot/dts= /nxp/imx/imx6q-novena.dts index 24fc3ff1c70c..0cd0443b9df5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-novena.dts @@ -459,7 +459,7 @@ lvds-channel@0 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie_novena>; - reset-gpio =3D <&gpio3 29 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio3 29 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts b/arch/arm/boot/dt= s/nxp/imx/imx6q-tbs2910.dts index 3bd0e2c9e57a..fbd1dc6f6414 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-tbs2910.dts @@ -174,7 +174,7 @@ rtc: rtc@68 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio7 12 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio7 12 GPIO_ACTIVE_LOW>; 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Use the preferred form over "reset-gpio" which is deprecated since commit 42694f9f6407 ("dt-bindings: PCI: add snps,dw-pcie.yaml") in 2021. Linux kernel already properly parses GPIO active level from phandle arguments, thus we can also drop "reset-gpio-active-high". However this change will impact U-Boot, because it only parses "reset-gpio" property for imx6q amd imx6sq. Intention is to update U-Boot to work with newer DTS, but any other out of tree user of this DTS which did not implement undeprecated "reset-gpios" will be affected as well. There was plenty of time for these projects to switch to undeprecated "reset-gpios", though. Signed-off-by: Krzysztof Kozlowski --- Changes in v2: 1. Fix subject prefix 2. Drop reset-gpio-active-high, update commit msg --- arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts | 3 +-- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts b/arch/arm/bo= ot/dts/nxp/imx/imx6sx-nitrogen6sx.dts index 1c1515a854c8..6dd382cffa3d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dts @@ -224,7 +224,7 @@ &i2c3 { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 10 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio4 10 GPIO_ACTIVE_LOW>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/= nxp/imx/imx6sx-sdb.dtsi index 3e238d8118fa..11e8efcc1fce 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi @@ -282,7 +282,7 @@ codec: wm8962@1a { &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio2 0 GPIO_ACTIVE_LOW>; + reset-gpios =3D <&gpio2 0 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie_gpio>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts b/arc= h/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts index 2ffbe2df4776..9be9ee92018f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sx-softing-vining-2000.dts @@ -499,8 +499,7 @@ MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170f9 &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pcie>; - reset-gpio =3D <&gpio4 6 GPIO_ACTIVE_HIGH>; - reset-gpio-active-high; + reset-gpios =3D <&gpio4 6 GPIO_ACTIVE_HIGH>; status =3D "okay"; }; =20 --=20 2.51.0