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Shenoy" To: Mario Limonciello , "Rafael J . Wysocki" , Viresh Kumar , K Prateek Nayak CC: , , "Gautham R. Shenoy" Subject: [PATCH v2 6/9] amd-pstate: Add sysfs support for floor_freq and floor_count Date: Wed, 11 Mar 2026 19:31:13 +0530 Message-ID: <20260311140116.19604-7-gautham.shenoy@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260311140116.19604-1-gautham.shenoy@amd.com> References: <20260311140116.19604-1-gautham.shenoy@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D2:EE_|IA1PR12MB7494:EE_ X-MS-Office365-Filtering-Correlation-Id: 0abb3697-900f-4d0b-b563-08de7f76c1be X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|376014|82310400026|22082099003|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: DixFlcteZ0jSB994bKmkscYNq/664PoNqZAffT2R7EIbidAoiRwMtAWe+jT78AR6y4NyLfVo1i/lW3vAAIWIgU3HoGnRlLNpLHpJUGkzLyawhSM/ZkexR3iZV4tUXCP5N0jgGuM2sP6VcWbAYuLZfiMd/gIXcbTfVUGlSqgHNzJjyl6o0DiBxpgOhEJXy53nRoI+FSnvpwW8tqTgjzumBvJeopAU9u3cUSQqnsHwG/YFHVEHnScxtLcDsLxUx5v8XoCmyPee1hz+i7bufw7fQoQL6MwzoAKiIP6SeZd+PJLGuVDifqB0j1bKkuN90djKvW7J246pPelUXhLdHvtgc9N4gHCXQ09hs6DMhJFyclXA1/WxwOzytlJO9Fy0UNES7WnitZeunhHu1y/8rOAFCTwhm6CbnO5SOm8h7sdK7sDYc5S4YsKyznOi2JOE44X9J3WWHrZdJGVZQ+917Bgmea/UWAUA98WugpIIFOHvqNwz8urAiNPAbzks50ss07PYjjIN+TrEAtoUWSqw+A6+f4T5QbneSBY26jTAKKCU5CNeqf50mrKXAKHOI23UU2l741iNlPdt/qsYWHlmhlAuNN9QBOXeux9q925A28O7dvmyUjMuiYXxyo1jkygfJ//8Hmi/FisP9Lcslzg4sH8hCaLFELAA7N06iBy6FIhB0eSRQbAf4OkYi9VGjiX+edfiUk1QMZTiXZ+UxtJmeHToyODqQcmDMIOYAWIGn4+NqjLzeP/KhLkU9Mwa0xrzVtg3AikLAy0QcflYyF5k3nEE0g== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700016)(376014)(82310400026)(22082099003)(56012099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Xzc8jGB2AYRKzcjzVfuZdpIKTUWT5/2D+oQZgimJZ+/A+LY5tRNcf4Ec8V/RalV/RqIS9z/fjdik7dztWMic144PlF9RI/EWtww9XK0Z5PHVW2yAIQtOZRsCLTrIAfNvf2ywYFxZDhe+/qGbdP/EafMTjJHFWKGQ0DezKdXmEfrWy00aUG2CebntRxKwbGFD8KBtiZbpm4urhSn1hA4JBJiNvs8PyRqGSFKejPYJaMz84+Pas2ZJANt7RbgceCRe2GLFNLCmvZP6gWzWwXm33T7BsZholPRVRSbMk5w57liFL4JkwiIg+1mfyIZKMsJV17y9zqF9NJ3Pk4nL4adavWlrR9QBxP+4fKW9wM7dE8V9SoaJguJo809go981mCTyqnQhdwciAo7FVpiS0HduSOwNZfys0w6dU5UFbMpecKsia2oLssBIpJUsn/Mg1Roc X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Mar 2026 14:01:56.5827 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0abb3697-900f-4d0b-b563-08de7f76c1be X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7494 Content-Type: text/plain; charset="utf-8" When Floor Performance feature is supported by the platform, expose two sysfs files: * amd_pstate_floor_freq to allow userspace to request the floor frequency for each CPU. * amd_pstate_floor_count which advertises the number of distinct levels of floor frequencies supported on this platform. Signed-off-by: Gautham R. Shenoy Reviewed-by: Mario Limonciello (AMD) --- drivers/cpufreq/amd-pstate.c | 50 ++++++++++++++++++++++++++++++++++++ drivers/cpufreq/amd-pstate.h | 2 ++ 2 files changed, 52 insertions(+) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 3122ad5af6f47..54b650f3b4e78 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -383,6 +383,8 @@ static int amd_pstate_init_floor_perf(struct cpufreq_po= licy *policy) return ret; } =20 + cpudata->floor_freq =3D perf_to_freq(cpudata->perf, cpudata->nominal_freq, + floor_perf); return 0; } =20 @@ -1284,6 +1286,44 @@ static ssize_t show_energy_performance_preference( return sysfs_emit(buf, "%s\n", energy_perf_strings[preference]); } =20 +static ssize_t store_amd_pstate_floor_freq(struct cpufreq_policy *policy, + const char *buf, size_t count) +{ + struct amd_cpudata *cpudata =3D policy->driver_data; + union perf_cached perf =3D READ_ONCE(cpudata->perf); + unsigned int freq; + u8 floor_perf; + int ret; + + ret =3D kstrtouint(buf, 0, &freq); + if (ret) + return ret; + + floor_perf =3D freq_to_perf(perf, cpudata->nominal_freq, freq); + ret =3D amd_pstate_set_floor_perf(policy, floor_perf); + + if (!ret) + cpudata->floor_freq =3D freq; + + return ret ?: count; +} + +static ssize_t show_amd_pstate_floor_freq(struct cpufreq_policy *policy, c= har *buf) +{ + struct amd_cpudata *cpudata =3D policy->driver_data; + + return sysfs_emit(buf, "%u\n", cpudata->floor_freq); +} + + +static ssize_t show_amd_pstate_floor_count(struct cpufreq_policy *policy, = char *buf) +{ + struct amd_cpudata *cpudata =3D policy->driver_data; + u8 count =3D cpudata->floor_perf_cnt; + + return sysfs_emit(buf, "%u\n", count); +} + cpufreq_freq_attr_ro(amd_pstate_max_freq); cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); =20 @@ -1292,6 +1332,8 @@ cpufreq_freq_attr_ro(amd_pstate_prefcore_ranking); cpufreq_freq_attr_ro(amd_pstate_hw_prefcore); cpufreq_freq_attr_rw(energy_performance_preference); cpufreq_freq_attr_ro(energy_performance_available_preferences); +cpufreq_freq_attr_rw(amd_pstate_floor_freq); +cpufreq_freq_attr_ro(amd_pstate_floor_count); =20 struct freq_attr_visibility { struct freq_attr *attr; @@ -1316,6 +1358,12 @@ static bool epp_visibility(void) return cppc_state =3D=3D AMD_PSTATE_ACTIVE; } =20 +/* Determines whether amd_pstate_floor_freq related attributes should be v= isible */ +static bool floor_freq_visibility(void) +{ + return cpu_feature_enabled(X86_FEATURE_CPPC_PERF_PRIO); +} + static struct freq_attr_visibility amd_pstate_attr_visibility[] =3D { {&amd_pstate_max_freq, always_visible}, {&amd_pstate_lowest_nonlinear_freq, always_visible}, @@ -1324,6 +1372,8 @@ static struct freq_attr_visibility amd_pstate_attr_vi= sibility[] =3D { {&amd_pstate_hw_prefcore, prefcore_visibility}, {&energy_performance_preference, epp_visibility}, {&energy_performance_available_preferences, epp_visibility}, + {&amd_pstate_floor_freq, floor_freq_visibility}, + {&amd_pstate_floor_count, floor_freq_visibility}, }; =20 static struct freq_attr **get_freq_attrs(void) diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h index 0c587ca200199..ab4caea39f0e8 100644 --- a/drivers/cpufreq/amd-pstate.h +++ b/drivers/cpufreq/amd-pstate.h @@ -72,6 +72,7 @@ struct amd_aperf_mperf { * @max_limit_freq: Cached value of policy->max (in khz) * @nominal_freq: the frequency (in khz) that mapped to nominal_perf * @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_no= nlinear_perf + * @floor_freq: Cached value of the user requested floor_freq * @cur: Difference of Aperf/Mperf/tsc count between last and current samp= le * @prev: Last Aperf/Mperf/tsc count value read from register * @freq: current cpu frequency value (in khz) @@ -100,6 +101,7 @@ struct amd_cpudata { u32 max_limit_freq; u32 nominal_freq; u32 lowest_nonlinear_freq; + u32 floor_freq; =20 struct amd_aperf_mperf cur; struct amd_aperf_mperf prev; --=20 2.34.1