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Shenoy" To: Mario Limonciello , "Rafael J . Wysocki" , Viresh Kumar , K Prateek Nayak CC: , , "Gautham R. Shenoy" , Jonathan Corbet , "Shuah Khan" Subject: [PATCH v2 9/9] Documentation/amd-pstate: Add documentation for amd_pstate_floor_{freq,count} Date: Wed, 11 Mar 2026 19:31:16 +0530 Message-ID: <20260311140116.19604-10-gautham.shenoy@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260311140116.19604-1-gautham.shenoy@amd.com> References: <20260311140116.19604-1-gautham.shenoy@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023CE:EE_|DS7PR12MB5982:EE_ X-MS-Office365-Filtering-Correlation-Id: 89696c91-96c9-4dcc-4852-08de7f76c6a1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|82310400026|1800799024|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: OLFccsU2MjYjhSfyN2ADgN7HqLzia76FqCI4/23PxDURHWwYu+rqgxoDbTg5qmFeOyhPA8OO2/aZxYRwdYyC/vlsgy8jsCSc1kXkgrhONnjPJNTNj6Qf5aWCYuN/3G4EtQcfsEk0KVpNh3gUf90MfBKWOz4DpD0LN5TCaaLv/xuuKPw4Dev4bUPvi+9rOnTJ3gyic5ri8+zwijvHYyKpBYex3UIZ2ejRHAldoXqkfxyksNfoSrqr6LKLB/u3qLKdyRtaSmqg9//Uk4+7EyX1A4zW5SjcgAZVcy3ji9j1TgrUV0BjVMlcq4y5wgu0UyKvrrWGa9qsR9zn6WsM0ie/6eA+OuxZB3dJJWOa0Sj9iUsl2K08aNRJo4qLE/TaGSgzMrppXK/dcl9RwXV/9HovxHrYo/ss2vxi8H7er3T+YZxegM5aIlOE9MlSZ5PHno8x4nK0+nEKWXc+sw8za6s7UhqTrdReRhlkrv9iVnDSmTlCPD7+rCCb4my0NvBb/qY+YmVl81xN0pzV8VfGRtTbtzyJEA62hqHOQ/1PDmwh+2CXmHcV7mkUZJy0pK50vR4MNkCh2EjZ0rBhlJQycMz/vecE+jRqRIRxDWzclYOKkVQCv5BzMA0ln0XMJQFCJGJBgQ6U3sEVDIKg9z72UEC/tVPHuyNaJCZ+cZpsHZjXcmW7Z/K78Nf/GHBRqKfSwVfob/hBGdmmP0LJYrGHRZU8q07mY0CA7Y3TWpWnvyJWEvcLQkNjGJzYfVyMxO1bVFOYqqwarEETso8fH+IcQG/bXg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(376014)(82310400026)(1800799024)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Sw6MpI+7GQ8Vp5k1harhSY3vBlMNrw37ONynNn7015VXlduKWLD9NDxxhrdWtnWdPUpt66gUxsW18aocanjXgcX+4/RGUmaVLmGlnIqwD78NZa2QLWfp8l1jOXZ+J1fxHR8iC1OjWYsBTbm/nPQFqLwYNw2VqR0RL3y6Dbnd0h9vC04YKfYgqewWM0vvPDATle58fg9tJ44rkJFDbl81WoZA0vZYGTmFnO+YT6jieT/GFaP6wuTSay8a4crLz5id8m9I7cirjMqjdMlORrMmdpUyEQXux9OFud1WCBCG73mnnEVSY51Jq/pyVa92dwhm5pjlGExHl8T9Vr9oLYNc0ybVyEtWN4RSTVsn9S76Qe+HhLKqhGE2ruzoJnKD0h6ZB4kUt5Ri531h/3vclVXrTZXundVQvz+qpo3QoHgMg0efurUZyGbUSsnlqhwgHtJr X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Mar 2026 14:02:04.7175 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89696c91-96c9-4dcc-4852-08de7f76c6a1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023CE.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5982 Content-Type: text/plain; charset="utf-8" Add documentation for the sysfs files /sys/devices/system/cpu/cpufreq/policy*/amd_pstate_floor_freq and /sys/devices/system/cpu/cpufreq/policy*/amd_pstate_floor_count. Signed-off-by: Gautham R. Shenoy Reviewed-by: Mario Limonciello (AMD) --- Documentation/admin-guide/pm/amd-pstate.rst | 32 +++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/ad= min-guide/pm/amd-pstate.rst index f566fea6613e6..5fd2a36f8a4b8 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -242,6 +242,8 @@ control its functionality at the system level. They are= located in the /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_hw_prefcore /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_lowest_nonlinear_freq /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_max_freq + /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_floor_freq + /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_floor_count /sys/devices/system/cpu/cpufreq/policy0/amd_pstate_prefcore_ranking =20 =20 @@ -278,6 +280,36 @@ can change at runtime based on platform conditions. Th= is attribute is read-only. This file is only visible on platforms which support the preferred core feature. =20 +``amd_pstate_floor_freq`` + +The floor frequency associated with each CPU. Userspace can write any +value between ``cpuinfo_min_freq`` and ``scaling_max_freq`` into this +file. When the system is under power or thermal constraints, the +platform firmware will attempt to throttle the CPU frequency to the +value specified in ``amd_pstate_floor_freq`` before throttling it +further. This allows userspace to specify different floor frequencies +to different CPUs. For optimal results, threads of the same core +should have the same floor frequency value. This file is only visible +on platforms that support the CPPC Performance Priority feature. + + +``amd_pstate_floor_count`` + +The number of distinct Floor Performance levels supported by the +platform. For example, if this value is 2, then the number of unique +values obtained from the command ``cat +/sys/devices/system/cpu/cpufreq/policy*/amd_pstate_floor_freq | +sort -n | uniq`` should be at most this number for the behavior +described in ``amd_pstate_floor_freq`` to take effect. A zero value +implies that the platform supports unlimited floor performance levels. +This file is only visible on platforms that support the CPPC +Performance Priority feature. + +**Note**: When ``amd_pstate_floor_count`` is non-zero, the frequency to +which the CPU is throttled under power or thermal constraints is +undefined when the number of unique values of ``amd_pstate_floor_freq`` +across all CPUs in the system exceeds ``amd_pstate_floor_count``. + ``energy_performance_available_preferences`` =20 A list of all the supported EPP preferences that could be used for --=20 2.34.1