From nobody Tue Apr 7 03:53:00 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 512E53B389B for ; Wed, 11 Mar 2026 07:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773215336; cv=none; b=W88hfGvAxD4lNli7eNKtfUEo1hsjbymnyuSnlXKwnBrx6U+byWrt/dCc2qNL5mN3UyHR00nffuRLNU477zxGOShBGABuk2yrAgXe3r3AkLOiIzepBnexNx/0DpZkS1KFTeCbUJKinelUf1PkOtmJoFXVxVB1I/pkAhznJ8EiuXA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773215336; c=relaxed/simple; bh=snTnqgApwneclFn8hQMWtvpcYc+LlQ1Ko9atB3hpn8Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XgCxihYbY2Yr251HLmgbCmgcnRcaQu7PYMJL8JIJQEG7x6UFaNCSZ178HyZlXbFDzVIOK7pjQQnQ9H1+Qld4yr+Qrdtt4KIBL6c0TaFNdYJJWTiKky3bK8ip9NmgIRTs3V8ywVbwdzS+CvKp9vh1mt/LW97DWGVTiYV9mHGYmH4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=NDB28N8i; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="NDB28N8i" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7C286128C; Wed, 11 Mar 2026 08:47:32 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1773215253; bh=snTnqgApwneclFn8hQMWtvpcYc+LlQ1Ko9atB3hpn8Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NDB28N8ioG2Zqm66RhZsoQx5JWHArMQ4+TgbWZeXZyDcLTX1RrGj5/eobdNZ5fvS/ 0F1Wu/ofRI+s3HK3WiVduevvHrFqy1dE9Wv+StHbqAIic9A58KHIaOwVBjnhndxvG+ JfwvH9EjFmdhB0VFmOYCiaH4hpBfpTZXoBEQ236A= From: Tomi Valkeinen Date: Wed, 11 Mar 2026 09:48:14 +0200 Subject: [PATCH v2 3/7] drm/bridge: tc358768: Separate indirect register writes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260311-tc358768-v2-3-e75a99131bd5@ideasonboard.com> References: <20260311-tc358768-v2-0-e75a99131bd5@ideasonboard.com> In-Reply-To: <20260311-tc358768-v2-0-e75a99131bd5@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Parth Pancholi , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Tomi Valkeinen , =?utf-8?q?Jo=C3=A3o_Paulo_Gon=C3=A7alves?= X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4057; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=snTnqgApwneclFn8hQMWtvpcYc+LlQ1Ko9atB3hpn8Q=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBpsR5SSp9gnzB3t0flj4Y7NqjPloWKiAgwgpMTM kI8ZKOFcwqJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCabEeUgAKCRD6PaqMvJYe 9WFkD/4wq4gZvtkuccMZKdMxleX8P29mHbIOm9r9Cq/rnAyHQNHytfOyg+XCc0BFIujY0RcTTId ZRCwzJ8jc1ib2yY60X7zV76Lv9DInhKPYQhZPsjzMGMXoo25GGKUupDO48H0l1MJ283nLefqKV6 aV9Ol53O36aI4SS3ApB9yTXbih3iY0a4FdYdv/sQrRycsQxKmfabxxT0000pH4LohsZYh7hB4X0 37tc0VptHEIh/Q+VnIN8Ui4G0NYVrC2kPB19QFb1BRtrzQVC16Usvy+9Yg8U1qc5o3hiC65IPX3 /hnZ0/1hxxXTkwi0umiFMERTWb+HCDb1/qzQpgJLi12biVRmkdUeoR75FUiUDaz4w+FqTJiyXSn L9RXYtRnmKLggRq2E/9oz3MZXYrxfKoXS+zTIEHm1K5Yf4yGIm0MO/k27EmDSdpaaq2ehoVajTZ IwVao5yZ+kpSCGmTGzgzmFEG/HgZZpmTpIYukyDLhM+64I8IGA+X/mQ3biKhZxNtY4+WV5Ak/4i P6Sme7mAHjwVRmFFZwxuXi8ISh2Hj7xDfe2nURTo7rDzFHzZtwLAztDM4+d+5w88c8jJ32Xb0hs owRpL3dlgptLUCFLulWfyhYE+SkU5CkLhLyG7RhX3J81BiI7VvDE3jyF8RuEJL+bfBkZ6utR01w PK16U1cIrO7yADg== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Some registers can only be written indirectly, using DSI_CONFW register. We don't have many uses for those registers (in fact, only DSI_CONTROL is currently written), but the code to do those writes inline is a bit confusing. Add a new function, tc358768_confw_update_bits() which can be used to write the bits indirectly. Only DSI_CONTROL is currently supported. Tested-by: Jo=C3=A3o Paulo Gon=C3=A7alves # To= radex Verdin AM62 Reviewed-by: Francesco Dolcini Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 52 +++++++++++++++++++++++++++++------= ---- 1 file changed, 39 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index dab9cdf5cb98..755ed6483b2e 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -123,7 +123,7 @@ /* TC358768_DSI_CONFW (0x0500) register */ #define TC358768_DSI_CONFW_MODE_SET (5 << 29) #define TC358768_DSI_CONFW_MODE_CLR (6 << 29) -#define TC358768_DSI_CONFW_ADDR_DSI_CONTROL (0x3 << 24) +#define TC358768_DSI_CONFW_ADDR(x) ((x) << 24) =20 /* TC358768_DSICMD_TX (0x0600) register */ #define TC358768_DSI_CMDTX_DC_START BIT(0) @@ -232,6 +232,36 @@ static void tc358768_update_bits(struct tc358768_priv = *priv, u32 reg, u32 mask, tc358768_write(priv, reg, tmp); } =20 +static void tc358768_confw_update_bits(struct tc358768_priv *priv, u16 reg, + u16 mask, u16 val) +{ + u8 confw_addr; + u32 confw_val; + + switch (reg) { + case TC358768_DSI_CONTROL: + confw_addr =3D 0x3; + break; + default: + priv->error =3D -EINVAL; + return; + } + + if (mask !=3D val) { + confw_val =3D TC358768_DSI_CONFW_MODE_CLR | + TC358768_DSI_CONFW_ADDR(confw_addr) | + mask; + tc358768_write(priv, TC358768_DSI_CONFW, confw_val); + } + + if (val & mask) { + confw_val =3D TC358768_DSI_CONFW_MODE_SET | + TC358768_DSI_CONFW_ADDR(confw_addr) | + (val & mask); + tc358768_write(priv, TC358768_DSI_CONFW, confw_val); + } +} + static void tc358768_dsicmd_tx(struct tc358768_priv *priv) { u32 val; @@ -693,7 +723,7 @@ static void tc358768_bridge_atomic_pre_enable(struct dr= m_bridge *bridge, struct tc358768_priv *priv =3D bridge_to_tc358768(bridge); struct mipi_dsi_device *dsi_dev =3D priv->output.dev; unsigned long mode_flags =3D dsi_dev->mode_flags; - u32 val, val2, lptxcnt, hact, data_type; + u32 val, mask, val2, lptxcnt, hact, data_type; s32 raw_val; struct drm_crtc_state *crtc_state; struct drm_connector_state *conn_state; @@ -1065,13 +1095,7 @@ static void tc358768_bridge_atomic_pre_enable(struct= drm_bridge *bridge, tc358768_write(priv, TC358768_DSI_START, 0x1); =20 /* Configure DSI_Control register */ - val =3D TC358768_DSI_CONFW_MODE_CLR | TC358768_DSI_CONFW_ADDR_DSI_CONTROL; - val |=3D TC358768_DSI_CONTROL_TXMD | TC358768_DSI_CONTROL_HSCKMD | - 0x3 << 1 | TC358768_DSI_CONTROL_EOTDIS; - tc358768_write(priv, TC358768_DSI_CONFW, val); - - val =3D TC358768_DSI_CONFW_MODE_SET | TC358768_DSI_CONFW_ADDR_DSI_CONTROL; - val |=3D (dsi_dev->lanes - 1) << 1; + val =3D (dsi_dev->lanes - 1) << 1; =20 val |=3D TC358768_DSI_CONTROL_TXMD; =20 @@ -1081,11 +1105,13 @@ static void tc358768_bridge_atomic_pre_enable(struc= t drm_bridge *bridge, if (dsi_dev->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) val |=3D TC358768_DSI_CONTROL_EOTDIS; =20 - tc358768_write(priv, TC358768_DSI_CONFW, val); + mask =3D TC358768_DSI_CONTROL_TXMD | TC358768_DSI_CONTROL_HSCKMD | + 0x3 << 1 | TC358768_DSI_CONTROL_EOTDIS; + + tc358768_confw_update_bits(priv, TC358768_DSI_CONTROL, mask, val); =20 - val =3D TC358768_DSI_CONFW_MODE_CLR | TC358768_DSI_CONFW_ADDR_DSI_CONTROL; - val |=3D TC358768_DSI_CONTROL_DSI_MODE; - tc358768_write(priv, TC358768_DSI_CONFW, val); + tc358768_confw_update_bits(priv, TC358768_DSI_CONTROL, + TC358768_DSI_CONTROL_DSI_MODE, 0); =20 ret =3D tc358768_clear_error(priv); if (ret) --=20 2.43.0