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Wed, 11 Mar 2026 03:26:59 -0700 (PDT) Received: from hu-krichai-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2aeae222872sm19575245ad.18.2026.03.11.03.26.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Mar 2026 03:26:59 -0700 (PDT) From: Krishna Chaitanya Chundru Date: Wed, 11 Mar 2026 15:56:46 +0530 Subject: [PATCH v3 1/5] PCI: host-common: Add helper to determine host bridge D3cold eligibility Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260311-d3cold-v3-1-4d85dc7c2695@oss.qualcomm.com> References: <20260311-d3cold-v3-0-4d85dc7c2695@oss.qualcomm.com> In-Reply-To: <20260311-d3cold-v3-0-4d85dc7c2695@oss.qualcomm.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Will Deacon Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jonathanh@nvidia.com, bjorn.andersson@oss.qualcomm.com, Krishna Chaitanya Chundru X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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This helper is intended to be used by PCI host controller drivers to decide whether they may safely put the host bridge into D3cold based on the power state and wakeup capabilities of downstream endpoints. The helper walks all devices on the bridge's primary bus and only allows the host bridge to enter D3cold if all PCIe endpoints are already in PCI_D3hot. This ensures that we do not power off the host bridge while any active endpoint still requires the link to remain powered. For devices that may wake the system, the helper additionally requires that the device supports PME wake from D3cold (via WAKE#). Devices that do not have wakeup enabled are not restricted by this check and do not block the host bridge from entering D3cold. Devices without a bound driver and with PCI not enabled via sysfs are treated as inactive and therefore do not prevent the host bridge from entering D3cold. This allows controllers to power down more aggressively when there are no actively managed endpoints. Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/controller/pci-host-common.c | 47 ++++++++++++++++++++++++++++= ++++ drivers/pci/controller/pci-host-common.h | 2 ++ 2 files changed, 49 insertions(+) diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/control= ler/pci-host-common.c index d6258c1cffe5ec480fd2a7e50b3af39ef6ac4c8c..bff23bcdb5d032d2781d963eebe= 4a3fac0505517 100644 --- a/drivers/pci/controller/pci-host-common.c +++ b/drivers/pci/controller/pci-host-common.c @@ -106,5 +106,52 @@ void pci_host_common_remove(struct platform_device *pd= ev) } EXPORT_SYMBOL_GPL(pci_host_common_remove); =20 +static int __pci_host_common_d3cold_possible(struct pci_dev *pdev, void *u= serdata) +{ + bool *d3cold_possible =3D userdata; + + if (pci_pcie_type(pdev) !=3D PCI_EXP_TYPE_ENDPOINT) + return 0; + + if (!pdev->dev.driver && !pci_is_enabled(pdev)) + return 0; + + if (pdev->current_state !=3D PCI_D3hot) + goto exit; + + if (device_may_wakeup(&pdev->dev) && !pci_pme_capable(pdev, PCI_D3cold)) + goto exit; + + return 0; + +exit: + *d3cold_possible =3D false; + + return -EOPNOTSUPP; +} + +/** + * pci_host_common_d3cold_possible - Determine whether a host bridge can e= nter D3cold + * @bridge: PCI host bridge to check + * + * Walk downstream PCIe endpoint devices and determine whether the host br= idge + * is permitted to transition to D3cold. + * + * The host bridge can enter D3cold only if all active PCIe endpoints are = in + * PCI_D3hot and any wakeup-enabled endpoint is capable of generating PME = from + * D3cold. Inactive endpoints are ignored. + * + * Return: %true if the host bridge may enter D3cold, otherwise %false. + */ +bool pci_host_common_d3cold_possible(struct pci_host_bridge *bridge) +{ + bool d3cold_allow =3D true; + + pci_walk_bus(bridge->bus, __pci_host_common_d3cold_possible, &d3cold_allo= w); + + return d3cold_allow; +} +EXPORT_SYMBOL_GPL(pci_host_common_d3cold_possible); + MODULE_DESCRIPTION("Common library for PCI host controller drivers"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/control= ler/pci-host-common.h index b5075d4bd7eb31fbf1dc946ef1a6afd5afb5b3c6..c0ef2a2bf3994ce66686b3f8eae= 25538f3a902b4 100644 --- a/drivers/pci/controller/pci-host-common.h +++ b/drivers/pci/controller/pci-host-common.h @@ -20,4 +20,6 @@ void pci_host_common_remove(struct platform_device *pdev); =20 struct pci_config_window *pci_host_common_ecam_create(struct device *dev, struct pci_host_bridge *bridge, const struct pci_ecam_ops *ops); + +bool pci_host_common_d3cold_possible(struct pci_host_bridge *bridge); #endif --=20 2.34.1