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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2aea4eed00fsm9797975ad.80.2026.03.09.21.08.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2026 21:08:39 -0700 (PDT) From: Sibi Sankar To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org Cc: sudeep.holla@kernel.org, angelogioacchino.delregno@collabora.com, viresh.kumar@linaro.org, neil.armstrong@linaro.org, festevam@gmail.com, Frank.Li@nxp.com, danila@jiaxyga.com, lpieralisi@kernel.org, dmitry.baryshkov@oss.qualcomm.com, tengfei.fan@oss.qualcomm.com, jingyi.wang@oss.qualcomm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio Subject: [PATCH 3/3] arm64: dts: qcom: kaanapali: Fix deprecated cpu compatibles Date: Tue, 10 Mar 2026 09:37:51 +0530 Message-Id: <20260310040751.3132523-4-sibi.sankar@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260310040751.3132523-1-sibi.sankar@oss.qualcomm.com> References: <20260310040751.3132523-1-sibi.sankar@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzEwMDAzMSBTYWx0ZWRfX0IdW2ar+SnCl iZfTG3sSi66fQrF6RCBgtwW7e0s8KQIHvQuP/PfoOZDop0gq4q10Iu5hJz0nYrnKFFqC1AKuM3V 8HT5/4Xg+8MvsZa04jh+xKCxS0YgCLm9Abj5dwYSwF30K8A5TBOoCtYzZhl6RGHk1nWbwMOGSNx v+hh4XFpctiksE1PAj4+LU3hgStsVXdZFrD0slPq+qnybjgVIeY07rT+pTdJICOvtCQlTZAswUb qHC4A7wuDol3knMDxS3c4GW3nzEjVFgXj8iT2tNqcxVPRUprhy9P85eKM6k+UCC4aBJPVRuvWXW sFQA9K68xlRkn5iI96uspsVidelo6rGLezDs+9R/ZzjT4uOdsKTjbiZ17DEerPHSxzox2hQLBkD c7ALb9M5XW33EOjfXB3yG01M6MC+iljK3Yjug5fMByTXoo5EqM1j2bDL+OrXN8Gmw8c5b/n/5jD Yrpi/ZKWfbD3lD7va1Q== X-Proofpoint-GUID: L5WHBewUW2MTrxKrfWMw7ZdcY32HdS9D X-Proofpoint-ORIG-GUID: L5WHBewUW2MTrxKrfWMw7ZdcY32HdS9D X-Authority-Analysis: v=2.4 cv=KNRXzVFo c=1 sm=1 tr=0 ts=69af9949 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=GQnCsLCnUx_kYXgjSdsA:9 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-10_01,2026-03-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 spamscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603100031 Content-Type: text/plain; charset="utf-8" The generic Qualcomm Oryon CPU compatible used by the Kaanapali SoC is deprecated and incorrect since it uses a single compatible to describe two different core variants. It is now replaced with two different core-specific compatibles based on MIDR part and variant number. CPUS 0-5: MIDR_EL1[PART_NUM] - 0x2 MIDR_EL1[VARIANT] - 0x2 CPUS 6-7: MIDR_EL1[PART_NUM] - 0x2 MIDR_EL1[VARIANT] - 0x3 Fixes: 2eeb5767d53f ("arm64: dts: qcom: Introduce Kaanapali SoC") Signed-off-by: Sibi Sankar Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/= qcom/kaanapali.dtsi index 9ef57ad0ca71..40b9a5953d39 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -31,7 +31,7 @@ cpus { =20 cpu0: cpu@0 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-2"; reg =3D <0x0 0x0>; enable-method =3D "psci"; next-level-cache =3D <&l2_0>; @@ -48,7 +48,7 @@ l2_0: l2-cache { =20 cpu1: cpu@100 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-2"; reg =3D <0x0 0x100>; enable-method =3D "psci"; next-level-cache =3D <&l2_0>; @@ -59,7 +59,7 @@ cpu1: cpu@100 { =20 cpu2: cpu@200 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-2"; reg =3D <0x0 0x200>; enable-method =3D "psci"; next-level-cache =3D <&l2_0>; @@ -70,7 +70,7 @@ cpu2: cpu@200 { =20 cpu3: cpu@300 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-2"; reg =3D <0x0 0x300>; enable-method =3D "psci"; next-level-cache =3D <&l2_0>; @@ -81,7 +81,7 @@ cpu3: cpu@300 { =20 cpu4: cpu@400 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-2"; reg =3D <0x0 0x400>; enable-method =3D "psci"; next-level-cache =3D <&l2_0>; @@ -92,7 +92,7 @@ cpu4: cpu@400 { =20 cpu5: cpu@500 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-2"; reg =3D <0x0 0x500>; enable-method =3D "psci"; next-level-cache =3D <&l2_0>; @@ -103,7 +103,7 @@ cpu5: cpu@500 { =20 cpu6: cpu@10000 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-3"; reg =3D <0x0 0x10000>; enable-method =3D "psci"; next-level-cache =3D <&l2_1>; @@ -120,7 +120,7 @@ l2_1: l2-cache { =20 cpu7: cpu@10100 { device_type =3D "cpu"; - compatible =3D "qcom,oryon"; + compatible =3D "qcom,oryon-2-3"; reg =3D <0x0 0x10100>; enable-method =3D "psci"; next-level-cache =3D <&l2_1>; --=20 2.34.1