From nobody Wed Apr 8 01:19:28 2026 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA1FF33E368; Wed, 11 Mar 2026 02:43:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773196998; cv=none; b=JQDEsWgeOh3NIZhWSoQHNUn1kUFr/5RRn+wOy8zObIG6B5zWjkf7XtD3iljxZ890q4uXQOYnumysz0691g61Z917LMrPHUmVkr0FLVSMwt6HprXBkrvnkPgZzz/GiByIsxSCzN82h6Isk1pX3GFgH0G6fnJPfnbDiGHe6Rvek1Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773196998; c=relaxed/simple; bh=bVGpXn+ZgXNzH29Fkhvwsy1LuzF8NaqAwQ7MyPWgenE=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=elqTm1DnD8fpeUxvucugR/Reg9FS6ryCemSK5LJar+i0ltU06rvBPExUEu1rC1DVXWaiLIa+z2SP4AryL6HIFexBNuXHtZjfV5JlqivP7SLIBQBaWdv9Ts4glkL4tYWko4OmZwClhQE+1UIb2T0UnfAYdtI9+p1a2FyfzUbV6UM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=YpPc7P0l; arc=none smtp.client-ip=185.70.43.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="YpPc7P0l" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773196995; x=1773456195; bh=I9Iv7CGNOaaXVx5yEHSx42l6OlZyyzLak3JX3j4oK9I=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=YpPc7P0l+Apkz+KpZS/amD2AyqZHpuj5wjZaD7zVgr5ERPUSIvK/W+SdXWTi+U76n 4lr2lmMXPclnq6ZaZoPLWIn0y/0gr7pjtHmEXiclc7pcXbG8FLFuyFHIsFcFonMHyB OQpJ6xT5627Wb8XRgUshbPDndku06iiKXSRqLZbZoCeJbnl8SWTtchpy9LXeNn5j9v nIV0JoERDTcIJnNYymTo0FJbSkrnrBlyhbDUPtMmbVAqJIN7Iew5DT+J3onNN9HL02 FqgH2RbXKvh8gY+zjVXhuM/FAavkB13Je6RONw8ewVjY2uhq3dSwZsNfK8mhYxHd2D He6sffEX81t3Q== Date: Wed, 11 Mar 2026 02:43:09 +0000 To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kees Cook , Tony Luck , "Guilherme G. Piccoli" From: Alexander Koskovich Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexander Koskovich , Krzysztof Kozlowski Subject: [PATCH v3 1/2] dt-bindings: arm: qcom: Add ASUS ROG Phone 3 Message-ID: <20260310-sm8250-asus-obiwan-v3-1-9ed8f0e71e19@pm.me> In-Reply-To: <20260310-sm8250-asus-obiwan-v3-0-9ed8f0e71e19@pm.me> References: <20260310-sm8250-asus-obiwan-v3-0-9ed8f0e71e19@pm.me> Feedback-ID: 37836894:user:proton X-Pm-Message-ID: 4f0ccadab099be48158b44c4cdc4482d40579fb1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatible string for the ASUS ROG Phone 3 (SM8250). Acked-by: Krzysztof Kozlowski Signed-off-by: Alexander Koskovich --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index d48c625d3fc4..81677c0c5d47 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1010,6 +1010,7 @@ properties: =20 - items: - enum: + - asus,obiwan - qcom,qrb5165-rb5 - qcom,sm8250-hdk - qcom,sm8250-mtp --=20 2.53.0 From nobody Wed Apr 8 01:19:28 2026 Received: from mail-43100.protonmail.ch (mail-43100.protonmail.ch [185.70.43.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D83E4346A0A; Wed, 11 Mar 2026 02:43:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.100 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773197014; cv=none; b=qwnYFck0iAZPtLGfB60/tN1Jd05K4goNVirTO+xyLwmrpx2rHL+du4jAmMzekY0qjXRuFy8jBzV/8Yr5UNp5vFc+k9bXqkLSXHBExizB0Ei5hg8yUrFmvrI0x3rB76Pmx8YA19GR6KX5DI+KZizHdMS+BfGiNqOTTPkpcETdax8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773197014; c=relaxed/simple; bh=yKkVLEh8zT3GalJr2yPen1VOgnLM+ezDJCcTrcmDlb0=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nR5IibPPQmcbRaKk9gn3GsQDil2DoDAkBMXNjokTcplDKjMqFpwCVRussTb11AU2uLCOceHm1vZnccp8x/23lR8RQUtKeABIThw+vZQsySTEYt3ineuJetdhNIfWN0IVSYzRc2tJLzvIHVh2wIFk5oJVvCRRspA+fMn1LOEloMU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=oW5ivpS4; arc=none smtp.client-ip=185.70.43.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="oW5ivpS4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773197000; x=1773456200; bh=T4y9ViD9Hmsc9iThJ1yg88rpcAJAK4vskf7nayEgHGk=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=oW5ivpS4v+0GQ6af8ubjSzO8yBcoXjZd+F7THmjH3syPUynaccxZzPUpZkjld+STo hGqylCy9UsJfRFWTIt8IOxJEpx5pmqV6oCKJFxZ48c/Mm0SypwCuOMZm+ntgY+i9ef kS9chIOBJqU0BX7YHMWjPCQqAHNe3TTNV73C7wbeLo5JuparTqakGBg4VdIHDfo0TQ KcBmGCVkRjZU/SNdXtyfD4D4Zx4psOVO5pgd9ryPaF149bUvO4dK1uEI/GB//3S6bD U8E8fmP4WQpT8Z8SlYqypox9gzT3kgjqcmt1IrUYZFYr1whjdfFnOLNDO0Ci5JiVV5 KSssZB0z+j2Kg== Date: Wed, 11 Mar 2026 02:43:14 +0000 To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kees Cook , Tony Luck , "Guilherme G. Piccoli" From: Alexander Koskovich Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexander Koskovich Subject: [PATCH v3 2/2] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3 Message-ID: <20260310-sm8250-asus-obiwan-v3-2-9ed8f0e71e19@pm.me> In-Reply-To: <20260310-sm8250-asus-obiwan-v3-0-9ed8f0e71e19@pm.me> References: <20260310-sm8250-asus-obiwan-v3-0-9ed8f0e71e19@pm.me> Feedback-ID: 37836894:user:proton X-Pm-Message-ID: ced0b1d0cb262ed778f3aab5e510dc78fa1c7ee6 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Supported functionality as of this initial submission: * Armor Case & Dock Hall Sensors * Camera flash/torch LED * Display (Tianma TA066VVHM03) * DisplayPort Alt Mode * Macro Camera (OV8856) * GPU (Adreno 650) * NFC (NXP PN553) * Power Button, Volume Keys * Regulators * Remoteprocs (ADSP, CDSP, SLPI) * UFS * USB * Video Codec (Venus) * Wi-Fi / Bluetooth (QCA6390) Signed-off-by: Alexander Koskovich --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts | 1319 +++++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 13 +- 3 files changed, 1332 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index f80b5d9cf1e8..cca71c3884f6 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -307,6 +307,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sm8150-microsoft-surface-d= uo.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8150-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8150-sony-xperia-kumano-bahamut.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8150-sony-xperia-kumano-griffin.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sm8250-asus-obiwan.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8250-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8250-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sm8250-samsung-r8q.dtb diff --git a/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts b/arch/arm64/b= oot/dts/qcom/sm8250-asus-obiwan.dts new file mode 100644 index 000000000000..6cdd66349bb1 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts @@ -0,0 +1,1319 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/dts-v1/; + +#include +#include +#include +#include +#include +#include + +#include "sm8250.dtsi" +#include "pm8150.dtsi" /* PM8250 */ +#include "pm8150b.dtsi" +#include "pm8150l.dtsi" + +/delete-node/ &adsp_mem; +/delete-node/ &camera_mem; +/delete-node/ &cdsp_mem; +/delete-node/ &cdsp_secure_heap; +/delete-node/ &cvp_mem; +/delete-node/ &gpu_mem; +/delete-node/ &ipa_fw_mem; +/delete-node/ &ipa_gsi_mem; +/delete-node/ &npu_mem; +/delete-node/ &removed_mem; +/delete-node/ &slpi_mem; +/delete-node/ &spss_mem; +/delete-node/ &video_mem; +/delete-node/ &wlan_mem; + +/ { + model =3D "ASUS ROG Phone 3"; + compatible =3D "asus,obiwan", "qcom,sm8250"; + chassis-type =3D "handset"; + /* + * There are also ER & EVB boards, but those have meaningful hardware + * differences that make them not compatible with this devicetree. + */ + qcom,board-id =3D <31 0>, /* ER2 */ + <40 0>, /* PR */ + <41 0>, /* PR2 */ + <50 0>; /* MP */ + qcom,msm-id =3D ; + + aliases { + serial0 =3D &uart12; + serial1 =3D &uart6; + }; + + battery: battery { + compatible =3D "simple-battery"; + voltage-min-design-microvolt =3D <3400000>; + voltage-max-design-microvolt =3D <4360000>; + charge-full-design-microamp-hours =3D <5800000>; + charge-term-current-microamp =3D <200000>; + constant-charge-current-max-microamp =3D <2750000>; + constant-charge-voltage-max-microvolt =3D <4360000>; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + gpio_keys: gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&volume_up_default>, <&hall_sensors_default>; + pinctrl-names =3D "default"; + + event-hall-sensor-case { + label =3D "Hall Effect Sensor (Armor Case)"; + gpios =3D <&tlmm 113 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + linux,can-disable; + wakeup-source; + }; + + event-hall-sensor-dock { + label =3D "Hall Effect Sensor (Dock)"; + gpios =3D <&tlmm 121 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + linux,can-disable; + wakeup-source; + }; + + key-vol-up { + label =3D "Volume Up"; + gpios =3D <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <15>; + linux,can-disable; + wakeup-source; + }; + }; + + qca6390-pmu { + compatible =3D "qcom,qca6390-pmu"; + + pinctrl-0 =3D <&bt_en_default>, <&wlan_en_default>; + pinctrl-names =3D "default"; + + vddaon-supply =3D <&vreg_s6a>; + vddpmu-supply =3D <&vreg_s6a>; + vddrfa0p95-supply =3D <&vreg_s6a>; + vddrfa1p3-supply =3D <&vreg_s8c>; + vddrfa1p9-supply =3D <&vreg_s5a>; + vddpcie1p3-supply =3D <&vreg_s8c>; + vddpcie1p9-supply =3D <&vreg_s5a>; + vddio-supply =3D <&vreg_s4a>; + + wlan-enable-gpios =3D <&tlmm 20 GPIO_ACTIVE_HIGH>; + bt-enable-gpios =3D <&tlmm 21 GPIO_ACTIVE_HIGH>; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p7: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p7"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; + + vreg_cam_dvdd_1p2: regulator-cam-dvdd-1p2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_cam_dvdd_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-enable-ramp-delay =3D <233>; + gpio =3D <&pm8150l_gpios 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vreg_pm8150b_vbus: regulator-pm8150b-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_pm8150b_vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&tlmm 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <&pm8150b_vbus>; + }; + + vreg_rt1715_vbus: regulator-rt1715-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_rt1715_vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&tlmm 71 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vreg_s6c: regulator-smpc6 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_s6c"; + + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-always-on; + + vin-supply =3D <&vph_pwr>; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + }; + + reserved-memory { + removed_mem: memory@80b00000 { + reg =3D <0x0 0x80b00000 0x0 0xb200000>; + no-map; + }; + + camera_mem: memory@8bf00000 { + reg =3D <0x0 0x8bf00000 0x0 0x500000>; + no-map; + }; + + wlan_mem: memory@8c400000 { + reg =3D <0x0 0x8c400000 0x0 0x100000>; + no-map; + }; + + ipa_fw_mem: memory@8c500000 { + reg =3D <0x0 0x8c500000 0x0 0x10000>; + no-map; + }; + + ipa_gsi_mem: memory@8c510000 { + reg =3D <0x0 0x8c510000 0x0 0xa000>; + no-map; + }; + + gpu_mem: memory@8c51a000 { + reg =3D <0x0 0x8c51a000 0x0 0x2000>; + no-map; + }; + + npu_mem: memory@8c600000 { + reg =3D <0x0 0x8c600000 0x0 0x500000>; + no-map; + }; + + video_mem: memory@8cb00000 { + reg =3D <0x0 0x8cb00000 0x0 0x500000>; + no-map; + }; + + cvp_mem: memory@8d000000 { + reg =3D <0x0 0x8d000000 0x0 0x500000>; + no-map; + }; + + cdsp_mem: memory@8d500000 { + reg =3D <0x0 0x8d500000 0x0 0x1400000>; + no-map; + }; + + slpi_mem: memory@8e900000 { + reg =3D <0x0 0x8e900000 0x0 0x1500000>; + no-map; + }; + + adsp_mem: memory@8fe00000 { + reg =3D <0x0 0x8fe00000 0x0 0x1d00000>; + no-map; + }; + + spss_mem: memory@92300000 { + reg =3D <0x0 0x92300000 0x0 0x100000>; + no-map; + }; + + cdsp_secure_heap: memory@92400000 { + reg =3D <0x0 0x92400000 0x0 0x4600000>; + no-map; + }; + + ramoops: ramoops@96a00000 { + compatible =3D "ramoops"; + reg =3D <0x0 0x96a00000 0x0 0x400000>; + console-size =3D <0x200000>; + pmsg-size =3D <0x200000>; + ecc-size =3D <16>; + }; + + asus_debug_mem: memory@97000000 { + reg =3D <0x0 0x97000000 0x0 0x400000>; + no-map; + }; + }; + + sbu-mux { + compatible =3D "pericom,pi3usb102", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 162 GPIO_ACTIVE_LOW>; + select-gpios =3D <&pm8150l_gpios 1 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&sbu_mux_default>, <&sbu_mux_sel_default>; + pinctrl-names =3D "default"; + + vcc-supply =3D <&vreg_l2a>; + mode-switch; + orientation-switch; + + port { + sbu_mux_in: endpoint { + remote-endpoint =3D <&pm8150b_sbu>; + }; + }; + }; +}; + +&adsp { + firmware-name =3D "qcom/sm8250/asus/obiwan/adsp.mbn"; + + status =3D "okay"; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8150-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + vdd-s3-supply =3D <&vph_pwr>; + vdd-s4-supply =3D <&vph_pwr>; + vdd-s5-supply =3D <&vph_pwr>; + vdd-s6-supply =3D <&vph_pwr>; + vdd-s7-supply =3D <&vph_pwr>; + vdd-s8-supply =3D <&vph_pwr>; + vdd-s9-supply =3D <&vph_pwr>; + vdd-s10-supply =3D <&vph_pwr>; + vdd-l1-l8-l11-supply =3D <&vreg_s6c>; + vdd-l2-l10-supply =3D <&vreg_bob>; + vdd-l3-l4-l5-l18-supply =3D <&vreg_s6a>; + vdd-l6-l9-supply =3D <&vreg_s8c>; + vdd-l7-l12-l14-l15-supply =3D <&vreg_s5a>; + vdd-l13-l16-l17-supply =3D <&vreg_bob>; + + vreg_s4a: smps4 { + regulator-name =3D "vreg_s4a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1920000>; + regulator-initial-mode =3D ; + }; + + vreg_s5a: smps5 { + regulator-name =3D "vreg_s5a"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <2100000>; + regulator-initial-mode =3D ; + }; + + vreg_s6a: smps6 { + regulator-name =3D "vreg_s6a"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <1128000>; + regulator-initial-mode =3D ; + }; + + vreg_l2a: ldo2 { + regulator-name =3D "vreg_l2a"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l3a: ldo3 { + regulator-name =3D "vreg_l3a"; + regulator-min-microvolt =3D <928000>; + regulator-max-microvolt =3D <932000>; + regulator-initial-mode =3D ; + }; + + vreg_l5a: ldo5 { + regulator-name =3D "vreg_l5a"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l6a: ldo6 { + regulator-name =3D "vreg_l6a"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l7a: ldo7 { + regulator-name =3D "vreg_l7a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l9a: ldo9 { + regulator-name =3D "vreg_l9a"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l10a: ldo10 { + regulator-name =3D "vreg_l10a"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l12a: ldo12 { + regulator-name =3D "vreg_l12a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l13a: ldo13 { + regulator-name =3D "vreg_l13a"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l14a: ldo14 { + regulator-name =3D "vreg_l14a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1880000>; + regulator-initial-mode =3D ; + }; + + vreg_l15a: ldo15 { + regulator-name =3D "vreg_l15a"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l16a: ldo16 { + regulator-name =3D "vreg_l16a"; + regulator-min-microvolt =3D <3024000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + + vreg_l17a: ldo17 { + regulator-name =3D "vreg_l17a"; + regulator-min-microvolt =3D <2496000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l18a: ldo18 { + regulator-name =3D "vreg_l18a"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8150l-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + vdd-s3-supply =3D <&vph_pwr>; + vdd-s4-supply =3D <&vph_pwr>; + vdd-s5-supply =3D <&vph_pwr>; + vdd-s6-supply =3D <&vph_pwr>; + vdd-s7-supply =3D <&vph_pwr>; + vdd-s8-supply =3D <&vph_pwr>; + vdd-l1-l8-supply =3D <&vreg_s4a>; + vdd-l2-l3-supply =3D <&vreg_s8c>; + vdd-l4-l5-l6-supply =3D <&vreg_bob>; + vdd-l7-l11-supply =3D <&vreg_bob>; + vdd-l9-l10-supply =3D <&vreg_bob>; + vdd-bob-supply =3D <&vph_pwr>; + + vreg_bob: bob { + regulator-name =3D "vreg_bob"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <4000000>; + regulator-initial-mode =3D ; + }; + + vreg_s7c: smps7 { + regulator-name =3D "vreg_s7c"; + regulator-min-microvolt =3D <348000>; + regulator-max-microvolt =3D <1000000>; + regulator-initial-mode =3D ; + }; + + vreg_s8c: smps8 { + regulator-name =3D "vreg_s8c"; + regulator-min-microvolt =3D <1350000>; + regulator-max-microvolt =3D <1400000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c: ldo1 { + regulator-name =3D "vreg_l1c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c: ldo2 { + regulator-name =3D "vreg_l2c"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c: ldo3 { + regulator-name =3D "vreg_l3c"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l4c: ldo4 { + regulator-name =3D "vreg_l4c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l5c: ldo5 { + regulator-name =3D "vreg_l5c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l6c: ldo6 { + regulator-name =3D "vreg_l6c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l7c: ldo7 { + regulator-name =3D "vreg_l7c"; + regulator-min-microvolt =3D <2856000>; + regulator-max-microvolt =3D <3104000>; + regulator-initial-mode =3D ; + }; + + vreg_l8c: ldo8 { + regulator-name =3D "vreg_l8c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + /* Hall sensor VDD */ + regulator-always-on; + }; + + vreg_l9c: ldo9 { + regulator-name =3D "vreg_l9c"; + regulator-min-microvolt =3D <2704000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10c: ldo10 { + regulator-name =3D "vreg_l10c"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + }; + + vreg_l11c: ldo11 { + regulator-name =3D "vreg_l11c"; + regulator-min-microvolt =3D <3104000>; + regulator-max-microvolt =3D <3304000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&camss { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l9a>; + + status =3D "okay"; + + ports { + port@2 { + csiphy2_ep: endpoint { + clock-lanes =3D <7>; + data-lanes =3D <0 1>; + remote-endpoint =3D <&ov8856_ep>; + }; + }; + }; +}; + +&cci1 { + status =3D "okay"; +}; + +&cci1_i2c0 { + camera@36 { + compatible =3D "ovti,ov8856"; + reg =3D <0x36>; + + rotation =3D <90>; + orientation =3D <1>; + + reset-gpios =3D <&tlmm 109 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&cam_ov8856_default>; + pinctrl-names =3D "default"; + + clocks =3D <&camcc CAM_CC_MCLK2_CLK>; + clock-names =3D "xvclk"; + assigned-clocks =3D <&camcc CAM_CC_MCLK2_CLK>; + assigned-clock-rates =3D <19200000>; + + dovdd-supply =3D <&vreg_l6p>; + avdd-supply =3D <&vreg_l5p>; + dvdd-supply =3D <&vreg_cam_dvdd_1p2>; + + port { + ov8856_ep: endpoint { + link-frequencies =3D /bits/ 64 <720000000 360000000>; + data-lanes =3D <1 2>; + remote-endpoint =3D <&csiphy2_ep>; + }; + }; + }; +}; + +&cdsp { + firmware-name =3D "qcom/sm8250/asus/obiwan/cdsp.mbn"; + + status =3D "okay"; +}; + +&gmu { + status =3D "okay"; +}; + +&gpi_dma0 { + status =3D "okay"; +}; + +&gpi_dma1 { + status =3D "okay"; +}; + +&gpi_dma2 { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/sm8250/asus/obiwan/a650_zap.mbn"; +}; + +&i2c1 { + status =3D "okay"; + clock-frequency =3D <400000>; + + nfc@28 { + compatible =3D "nxp,pn553", + "nxp,nxp-nci-i2c"; + reg =3D <0x28>; + + interrupt-parent =3D <&tlmm>; + interrupts =3D <111 IRQ_TYPE_EDGE_RISING>; + + enable-gpios =3D <&tlmm 6 GPIO_ACTIVE_HIGH>; + firmware-gpios =3D <&tlmm 110 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&nfc_en_default>, + <&nfc_clk_req_default>, + <&nfc_firmware_default>, + <&nfc_irq_default>; + pinctrl-names =3D "default"; + }; +}; + +&i2c4 { + /* AW8697FCR vibrator @ 0x5a */ + + status =3D "okay"; +}; + +&i2c13 { + /* Goodix GT9896 touchscreen @ 0x5d */ + + status =3D "okay"; +}; + +&i2c15 { + status =3D "okay"; + + typec@4e { + compatible =3D "richtek,rt1715"; + reg =3D <0x4e>; + interrupts-extended =3D <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; + vbus-supply =3D <&vreg_rt1715_vbus>; + pinctrl-0 =3D <&rt1715_irq_default>; + pinctrl-names =3D "default"; + + connector { + compatible =3D "usb-c-connector"; + power-role =3D "dual"; + data-role =3D "dual"; + try-power-role =3D "sink"; + self-powered; + op-sink-microwatt =3D <10000000>; + + source-pdos =3D ; + + sink-pdos =3D ; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + rt1715_con_hs: endpoint { + remote-endpoint =3D <&usb_2_dwc3_hs_out>; + }; + }; + }; + }; + }; + + pm8008: pmic@8 { + compatible =3D "qcom,pm8008"; + reg =3D <0x8>; + + interrupts-extended =3D <&tlmm 39 IRQ_TYPE_EDGE_RISING>; + reset-gpios =3D <&tlmm 38 GPIO_ACTIVE_LOW>; + + vdd-l1-l2-supply =3D <&vreg_s8c>; + vdd-l3-l4-supply =3D <&vreg_bob>; + vdd-l5-supply =3D <&vreg_bob>; + vdd-l6-supply =3D <&vreg_s5a>; + vdd-l7-supply =3D <&vreg_bob>; + + pinctrl-0 =3D <&pm8008_default>; + pinctrl-names =3D "default"; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pm8008 0 0 2>; + + interrupt-controller; + #interrupt-cells =3D <2>; + + #thermal-sensor-cells =3D <0>; + + regulators { + vreg_l1p: ldo1 { + regulator-name =3D "vreg_l1p"; + regulator-min-microvolt =3D <1104000>; + regulator-max-microvolt =3D <1104000>; + }; + + vreg_l2p: ldo2 { + regulator-name =3D "vreg_l2p"; + regulator-min-microvolt =3D <1104000>; + regulator-max-microvolt =3D <1104000>; + }; + + vreg_l3p: ldo3 { + regulator-name =3D "vreg_l3p"; + regulator-min-microvolt =3D <2856000>; + regulator-max-microvolt =3D <2856000>; + }; + + vreg_l4p: ldo4 { + regulator-name =3D "vreg_l4p"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + }; + + vreg_l5p: ldo5 { + regulator-name =3D "vreg_l5p"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + }; + + vreg_l6p: ldo6 { + regulator-name =3D "vreg_l6p"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + vreg_l7p: ldo7 { + regulator-name =3D "vreg_l7p"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + }; + }; + }; +}; + +&i2c16 { + /* TFA9874 amplifier (top) @ 0x34 */ + /* TFA9874 amplifier (bottom) @ 0x35 */ + + status =3D "okay"; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp { + status =3D "okay"; +}; + +&mdss_dp_out { + data-lanes =3D <0 1>; +}; + +&mdss_dsi0 { + vdda-supply =3D <&vreg_l9a>; + + status =3D "okay"; + + panel@0 { + compatible =3D "tianma,ta066vvhm03"; + reg =3D <0>; + + enable-gpios =3D <&tlmm 12 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&tlmm 75 GPIO_ACTIVE_LOW>; + + vci-supply =3D <&vreg_l10a>; + vdd-supply =3D <&vreg_l3c>; + vddio-supply =3D <&vreg_l14a>; + + pinctrl-0 =3D <&disp_en_active>, <&disp_reset_n_active>, <&mdp_vsync>; + pinctrl-1 =3D <&disp_en_suspend>, <&disp_reset_n_suspend>, <&mdp_vsync>; + pinctrl-names =3D "default", "sleep"; + + port { + panel_in: endpoint { + remote-endpoint =3D <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes =3D <0 1 2 3>; + remote-endpoint =3D <&panel_in>; +}; + +&mdss_dsi0_phy { + vdds-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&pcie0 { + status =3D "okay"; +}; + +&pcie0_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l9a>; + + status =3D "okay"; +}; + +&pcieport0 { + wifi@0 { + compatible =3D "pci17cb,1101"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p7-supply =3D <&vreg_pmu_rfa_1p7>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + + qcom,calibration-variant =3D "ASUS_ROG_Phone_3"; + }; +}; + +&pm8150_gpios { + volume_up_default: volume-up-default-state { + pins =3D "gpio6"; + function =3D PMIC_GPIO_FUNC_NORMAL; + power-source =3D <1>; + input-enable; + bias-pull-up; + }; + + /* + * When low the USB 2 data lanes are routed to the bottom USB port. + * When high they are routed to the pogo port on the side of the device. + */ + usb2_mux_en: usb2-mux-en-default-state { + pins =3D "gpio9"; + function =3D PMIC_GPIO_FUNC_NORMAL; + power-source =3D <0>; + output-low; + }; +}; + +&pm8150l_flash { + status =3D "okay"; + + led-0 { + function =3D LED_FUNCTION_FLASH; + color =3D ; + led-sources =3D <1>, <2>; + led-max-microamp =3D <500000>; + flash-max-microamp =3D <1500000>; + flash-max-timeout-us =3D <1280000>; + }; +}; + +&pm8150l_gpios { + sbu_mux_sel_default: sbu-mux-sel-default-state { + pins =3D "gpio1"; + function =3D PMIC_GPIO_FUNC_NORMAL; + power-source =3D <0>; + output-low; + }; +}; + +&pm8150b_gpios { + rt1715_mux_en: rt1715-mux-en-default-state { + pins =3D "gpio10"; + function =3D PMIC_GPIO_FUNC_NORMAL; + power-source =3D <0>; + output-high; + }; +}; + +&pm8150b_typec { + vdd-pdphy-supply =3D <&vreg_l2a>; + vdd-vbus-supply =3D <&vreg_pm8150b_vbus>; + + status =3D "okay"; + + connector { + compatible =3D "usb-c-connector"; + power-role =3D "dual"; + data-role =3D "dual"; + try-power-role =3D "source"; + self-powered; + op-sink-microwatt =3D <10000000>; + + source-pdos =3D ; + + sink-pdos =3D ; + + altmodes { + displayport { + svid =3D /bits/ 16 <0xff01>; + vdo =3D <0x00001c46>; + }; + }; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pm8150b_hs: endpoint { + remote-endpoint =3D <&usb_1_dwc3_hs_out>; + }; + }; + + port@1 { + reg =3D <1>; + + pm8150b_ss: endpoint { + remote-endpoint =3D <&usb_1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pm8150b_sbu: endpoint { + remote-endpoint =3D <&sbu_mux_in>; + }; + }; + }; + }; +}; + +&pm8150b_vbus { + regulator-min-microamp =3D <500000>; + regulator-max-microamp =3D <3000000>; + + status =3D "okay"; +}; + +&pon { + mode-bootloader =3D <0x2>; + mode-recovery =3D <0x1>; +}; + +&pon_pwrkey { + status =3D "okay"; +}; + +&pon_resin { + linux,code =3D ; + + status =3D "okay"; +}; + +&qupv3_id_0 { + status =3D "okay"; +}; + +&qupv3_id_1 { + status =3D "okay"; +}; + +&qupv3_id_2 { + status =3D "okay"; +}; + +&slpi { + firmware-name =3D "qcom/sm8250/asus/obiwan/slpi.mbn"; + + status =3D "okay"; +}; + +&tlmm { + gpio-reserved-ranges =3D <28 4>, /* NXP PN553 eSE (SPI) */ + <40 4>; /* Goodix GF9608 UDFPS (SPI) */ + + nfc_en_default: nfc-en-default-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + nfc_clk_req_default: nfc-clk-req-default-state { + pins =3D "gpio7"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + disp_en_active: disp-en-active-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-disable; + }; + + disp_en_suspend: disp-en-suspend-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + + wlan_en_default: wlan-default-state { + pins =3D "gpio20"; + function =3D "gpio"; + drive-strength =3D <16>; + output-low; + bias-pull-up; + }; + + bt_en_default: bt-default-state { + pins =3D "gpio21"; + function =3D "gpio"; + drive-strength =3D <16>; + output-low; + bias-pull-up; + }; + + pm8008_default: pm8008-default-state { + reset-n-pins { + pins =3D "gpio38"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + irq-pins { + pins =3D "gpio39"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + mdp_vsync: mdp-vsync-state { + pins =3D "gpio66"; + function =3D "mdp_vsync"; + drive-strength =3D <2>; + bias-pull-down; + }; + + disp_reset_n_active: disp-reset-n-active-state { + pins =3D "gpio75"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-disable; + }; + + disp_reset_n_suspend: disp-reset-n-suspend-state { + pins =3D "gpio75"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + + cam_ov8856_default: cam-ov8856-default-state { + mclk-pins { + pins =3D "gpio96"; + function =3D "cam_mclk"; + drive-strength =3D <16>; + bias-disable; + }; + + reset-n-pins { + pins =3D "gpio109"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + }; + + nfc_firmware_default: nfc-firmware-default-state { + pins =3D "gpio110"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + nfc_irq_default: nfc-irq-default-state { + pins =3D "gpio111"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + hall_sensors_default: hall-sensors-default-state { + pins =3D "gpio113", "gpio121"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + sbu_mux_default: sbu-mux-default-state { + pins =3D "gpio162"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + uart12_mux_default: uart12-mux-default-state { + pins =3D "gpio170"; + function =3D "gpio"; + drive-strength =3D <2>; + output-low; + }; + + rt1715_irq_default: rt1715-irq-default-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; +}; + +/* Debug UART is routed to bottom USB-C pins A11/B11 (TX) and A10/B10 (RX)= . */ +&uart12 { + pinctrl-0 =3D <&uart12_mux_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&uart6 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,qca6390-bt"; + + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddbtcmx-supply =3D <&vreg_pmu_btcmx_0p85>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p7-supply =3D <&vreg_pmu_rfa_1p7>; + }; +}; + +&ufs_mem_hc { + vcc-supply =3D <&vreg_l17a>; + vcc-max-microamp =3D <750000>; + vccq-supply =3D <&vreg_l6a>; + vccq-max-microamp =3D <700000>; + vccq2-supply =3D <&vreg_s4a>; + vccq2-max-microamp =3D <750000>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l9a>; + + status =3D "okay"; +}; + +&usb_1 { + status =3D "okay"; +}; + +&usb_1_dwc3_hs_out { + remote-endpoint =3D <&pm8150b_hs>; +}; + +&usb_1_hsphy { + vdda-pll-supply =3D <&vreg_l5a>; + vdda18-supply =3D <&vreg_l12a>; + vdda33-supply =3D <&vreg_l2a>; + + qcom,hs-disconnect-bp =3D <973>; + qcom,hs-amplitude-bp =3D <1110>; + qcom,pre-emphasis-amplitude-bp =3D <10000>; + + status =3D "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply =3D <&vreg_l9a>; + vdda-pll-supply =3D <&vreg_l18a>; + + status =3D "okay"; +}; + +&usb_1_qmpphy_out { + remote-endpoint =3D <&pm8150b_ss>; +}; + +&usb_2 { + pinctrl-0 =3D <&rt1715_mux_en>, <&usb2_mux_en>; + pinctrl-names =3D "default"; + + /* + * Disable USB3 clock requirement as the bottom port only supports USB2. + * The USB3 lanes are routed through the pogo connector on this board for + * use with accessories, so will need to revisit this when we start to add + * support for those. + */ + qcom,select-utmi-as-pipe-clk; + + status =3D "okay"; +}; + +&usb_2_dwc3 { + maximum-speed =3D "high-speed"; + phys =3D <&usb_2_hsphy>; + phy-names =3D "usb2-phy"; + + port { + usb_2_dwc3_hs_out: endpoint { + remote-endpoint =3D <&rt1715_con_hs>; + }; + }; +}; + +&usb_2_hsphy { + vdda-pll-supply =3D <&vreg_l5a>; + vdda18-supply =3D <&vreg_l12a>; + vdda33-supply =3D <&vreg_l2a>; + + qcom,hs-disconnect-bp =3D <1332>; + qcom,hs-amplitude-bp =3D <2000>; + qcom,pre-emphasis-amplitude-bp =3D <20000>; + + status =3D "okay"; +}; + +&venus { + firmware-name =3D "qcom/sm8250/asus/obiwan/venus.mbn"; + + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index c7dffa440074..9803aa8cac46 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -665,6 +665,11 @@ cpu7_opp20: opp-2841600000 { opp-hz =3D /bits/ 64 <2841600000>; opp-peak-kBps =3D <8368000 51609600>; }; + + cpu7_opp21: opp-3091200000 { + opp-hz =3D /bits/ 64 <3091200000>; + opp-peak-kBps =3D <8368000 51609600>; + }; }; =20 firmware { @@ -3928,6 +3933,7 @@ usb_1_qmpphy: phy@88e8000 { #phy-cells =3D <1>; =20 orientation-switch; + mode-switch; =20 ports { #address-cells =3D <1>; @@ -3949,7 +3955,9 @@ usb_1_qmpphy_usb_ss_in: endpoint { port@2 { reg =3D <2>; =20 - usb_1_qmpphy_dp_in: endpoint {}; + usb_1_qmpphy_dp_in: endpoint { + remote-endpoint =3D <&mdss_dp_out>; + }; }; }; }; @@ -4223,6 +4231,7 @@ usb_1_dwc3: usb@a600000 { snps,dis-u2-entry-quirk; phys =3D <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; phy-names =3D "usb2-phy", "usb3-phy"; + usb-role-switch; =20 ports { #address-cells =3D <1>; @@ -4312,6 +4321,7 @@ usb_2_dwc3: usb@a800000 { snps,dis-u2-entry-quirk; phys =3D <&usb_2_hsphy>, <&usb_2_qmpphy>; phy-names =3D "usb2-phy", "usb3-phy"; + usb-role-switch; }; }; =20 @@ -4819,6 +4829,7 @@ port@1 { reg =3D <1>; =20 mdss_dp_out: endpoint { + remote-endpoint =3D <&usb_1_qmpphy_dp_in>; }; }; }; --=20 2.53.0