From nobody Thu Apr 9 11:49:31 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 283833382FE; Mon, 9 Mar 2026 18:12:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773079965; cv=none; b=SWjSC/3KOL1hRwHRNyF4JSONqrRS5jKNwOulOWuBI4Fyc1lU28tL5hh0QbGotPYACGCM7zH3+ez6EC6FcPw+Zrw9e6N6DGXxspqmEye/9i3aNFAuglUEP5wIdcvNUcrpRyyDGeoPx/TMw6NUPWpIP1xftZ3+iBmtq9fx8uUUE4s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773079965; c=relaxed/simple; bh=1qzEqFPdZuX9j2z6MnjXL40+sdQNv2B1yHC6um5bTq0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dTl1NWnXKR+ghHDDZAt/8vBGjGUtpx+4xW1jAhUxFOMjns0ARmPiQYnB3lLQyRiiEUgwwxpOU9v9M3wiIy0/Pkbl9IhqeiuQ2QJWKIA9ojBx066/WAbqRbg2mDY4nEeTSiKL1yu5bCW02QpfNCvpE5lyjeC1o0e0Lb712233MOM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=HQhRLy78; arc=none smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="HQhRLy78" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1773079964; x=1804615964; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1qzEqFPdZuX9j2z6MnjXL40+sdQNv2B1yHC6um5bTq0=; b=HQhRLy78FWxfoXyMpDe7xjfxiav4dTTZjgo7iCbe2NsZRXDrjV5S1owC kEMKDuhfC5h1LTna09yj/prmfWJY3UDec3hJetzxDJH7TcQ8dtRz6raJX ShUYSLy3tuFd01RAjtz+YabNstV0OExoIRCeG7820OCuMEZwm4lPos8nm NzNF4TWWhDjmhWvtBbLiiTJU4KjQ8qCaqKIX/KOEK4i6feyEI9PvHQ/ue iMz3V8oiilZDOnTMNo4zrH9cEgke1V/tVTJEp6am/yRd5mYZmCFM5/5Qp eeL1poCYReJV5U8VspW2iroLvkJbiY6CuhwnqYTe8dy8bqZh2rI4hYjZn Q==; X-CSE-ConnectionGUID: 9U2c3t/YTc6DhJ1tC4oObA== X-CSE-MsgGUID: 3ml5G/RGRbazBxX+eWQMsg== X-IronPort-AV: E=McAfee;i="6800,10657,11724"; a="73992089" X-IronPort-AV: E=Sophos;i="6.23,109,1770624000"; d="scan'208";a="73992089" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Mar 2026 11:12:44 -0700 X-CSE-ConnectionGUID: PG4ZSg2IQPCV+zKGdBk47A== X-CSE-MsgGUID: LO2whBOJS7WCRSTi7miORg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,109,1770624000"; d="scan'208";a="224774483" Received: from sohilmeh.sc.intel.com ([172.25.103.65]) by orviesa005.jf.intel.com with ESMTP; 09 Mar 2026 11:12:43 -0700 From: Sohil Mehta To: Dave Hansen , x86@kernel.org, Andy Lutomirski , Borislav Petkov Cc: Jonathan Corbet , Shuah Khan , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra , Sohil Mehta , Kiryl Shutsemau , Brendan Jackman , Sean Christopherson , Nam Cao , Cedric Xing , Rick Edgecombe , Andrew Cooper , Tony Luck , Alexander Shishkin , Maciej Wieczor-Retman , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/5] x86/cpu: Remove LASS restriction on vsyscall emulation Date: Mon, 9 Mar 2026 11:10:29 -0700 Message-ID: <20260309181029.398498-6-sohil.mehta@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260309181029.398498-1-sohil.mehta@intel.com> References: <20260309181029.398498-1-sohil.mehta@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Vsyscall emulation has two modes of operation: XONLY and EMULATE. The default XONLY mode is now supported with a LASS-triggered #GP. OTOH, LASS is disabled if someone requests the deprecated EMULATE mode via the vsyscall=3Demulate command line option. So, remove the restriction on LASS when the overall vsyscall emulation support is compiled in. As a result, there is no need for setup_lass() anymore. LASS is enabled by default through a late_initcall(). Signed-off-by: Sohil Mehta Reviewed-by: Dave Hansen Reviewed-by: H. Peter Anvin (Intel) Tested-by: Maciej Wieczor-Retman --- v3: - Pick up review and tested-by tags. v2: - Picked up Dave's review tag - Improve commit message --- arch/x86/kernel/cpu/common.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 3557f0e6b3aa..02472fc763d9 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -406,20 +406,6 @@ static __always_inline void setup_umip(struct cpuinfo_= x86 *c) cr4_clear_bits(X86_CR4_UMIP); } =20 -static __always_inline void setup_lass(struct cpuinfo_x86 *c) -{ - if (!cpu_feature_enabled(X86_FEATURE_LASS)) - return; - - /* - * Legacy vsyscall page access causes a #GP when LASS is active. - * Disable LASS because the #GP handler doesn't support vsyscall - * emulation. - */ - if (IS_ENABLED(CONFIG_X86_VSYSCALL_EMULATION)) - setup_clear_cpu_cap(X86_FEATURE_LASS); -} - static int enable_lass(unsigned int cpu) { cr4_set_bits(X86_CR4_LASS); @@ -2061,7 +2047,6 @@ static void identify_cpu(struct cpuinfo_x86 *c) setup_smep(c); setup_smap(c); setup_umip(c); - setup_lass(c); =20 /* Enable FSGSBASE instructions if available. */ if (cpu_has(c, X86_FEATURE_FSGSBASE)) { --=20 2.43.0