From nobody Thu Apr 9 12:05:05 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 076C03DA7DD for ; Mon, 9 Mar 2026 15:24:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773069874; cv=none; b=nuyXqyIVb8QzbRQNdVsCUL6MUWFsOLi9bCP6GOU8dvq4Nojn5oGeMYCKTxYRVjwSaMs8Ef9lh5GwIo+2JWKK40EsnVonXgaaPz6r37VROyPuAYWBVZUFvny9d0qmt9R2KadtDGHeE3uiHlTZXAnN5b1lR6wAcy8ptyZIKCR+8nc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773069874; c=relaxed/simple; bh=zF/ZtSRqYTNTiJla1Mk2osrN2zkae+hDXhuv9dj2vx4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XMrEQjcDYMEa4wps8ANqK1aEZFqtpWjnuDfCJGvuUhjqRLf4RjuFp4NywHuu9t/EWhHW8il2ASm6ov/c5u2Nk4xSMDO608aUUb8pw3r33ele1ahlhP8N5oeDQoe5/0b/KPnSj8Ug0OhXaJ6Y7E0abIG42KLuGdU7Hmtn23er7h8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=LP1UX689; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=BMj+cJhE; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="LP1UX689"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="BMj+cJhE" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 629A6eef2195117 for ; Mon, 9 Mar 2026 15:24:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Md0AAi37albUzSAboU61gZErEa4ooVARCZHWV8Dr0hw=; b=LP1UX6895G3AJzUN RHu50HwgSKNW81fnRg/8HtNdH6UH7a7DE53d94o4KDec/WL4MpaQ5wLA9xzjdoS4 YFSsLHFX1kmcbAnmfchUUEl5fT8uSeJJtjnu8ziRzxEqJ25p3h89oxfLEkFGKHCE AypPkVDaOG3BucI7PK3rwgKsAgdXEqGKGqdcndJ7lpMYUh9SySTYG1XMNpnsYKSM whwEWRfbwn64v+Ex0tIBPHkGnYXvlXm3KyAeira2Pw13Z/Hk6uwU8vMGgM43V4As gFtU9TbgL6R7Y7aDF7s2tJDbJjGULO4yM2wErLzQMW/L7U01cAgiFFegt/fpYCxr uI2MnQ== Received: from mail-qk1-f197.google.com (mail-qk1-f197.google.com [209.85.222.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4csv5u90en-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 09 Mar 2026 15:24:31 +0000 (GMT) Received: by mail-qk1-f197.google.com with SMTP id af79cd13be357-8cd77bc8186so2149329085a.0 for ; Mon, 09 Mar 2026 08:24:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1773069871; x=1773674671; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Md0AAi37albUzSAboU61gZErEa4ooVARCZHWV8Dr0hw=; b=BMj+cJhEARmxiXDSYxWmXLyudCA0kqMIaZ98gICOkeanmDauVQsvCzjvcPWmnsYs+Z w8dXVetrm/guWc8qPH6HmSlzlgqos1aNY5p+YNkFVK8xsRaO2gdbAYDnhH+KXTezQC2H 7HrfjpkQLp4RbdsKypKqu8mCrNLXm+PNmn+rNcoOszqGrP0abwQy7pIrAnTnYKOyKbCK qIDnFZK8WFvTdMn+gthxglOof+Zmt6k4TbzgGRf/MyQvPhGqTdUVfvQS69dInSFPfMjM /qQTVZJI0oTXYC0ZVC9odoAaW9oVdO9IGrlQNoaTVO5Qc1DJGw2R8BcaYYiCaejBPCGN V+2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1773069871; x=1773674671; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Md0AAi37albUzSAboU61gZErEa4ooVARCZHWV8Dr0hw=; b=UC9XHh485vIgzEJPhj5vd/fGEpCvEjczGLpM4CE/oXV+WG63R25zUyhctj+gqOQmVc dMnv+usnDvtfwzEyFazCrw9jdPRVPI39ilp/lL9QMrYdaJneJNk3/lLZ6DXC334/heTy RxiAwcysYR6tOd4GRgxq9q3GLZa16dyK/NBZb0dGMuJnmntiSc8tTgS8znz0uLYWqwiV /14HX4S/JNcJLTPVqsBip0754ib2jC3Rp/eTF9ipqtg5R9/6ebMBdQzNd6r7K7dH8m8U vrg9kPno2I/9xq4QdWiX9009NiqQ3pmS4Z4CA3fgPjJZuQ77CTZ9mzYWGGBo52hqmDpK lgYQ== X-Forwarded-Encrypted: i=1; AJvYcCU59f2xhHR2/siKFCYCslL5OCdiu4mZKeWXQLDkCqBqK0brxVqWGVi/1tAS8cKHZ46Erp8NQSSxIv9PVQE=@vger.kernel.org X-Gm-Message-State: AOJu0YyPcpYQnLeKlww5nmRRc1M+QHGLu915YS3gz31kYclKtgF68ZrT Z0yF5t5dppZkyOaIYiH6n81Xzi4I7GURcTL7eClO/sn6L9TIQYfE+pQY3zyrkTuRr6rUWE8m41U kK1MTPUvVwJMeeyqmsPJ9KxLKoXRerbNkHtQo0qG0VtURAj5oot5PxVsAHTpHXhtleT4= X-Gm-Gg: ATEYQzwuGMs2gANM/wTRcfQzl1Q8gmhmqMdsuAa8YKyOd2xMqDKQ7xnh05tmeOdgL0w bDENanTTiaGkoKsNpu1rhm0FK+o8xSQ/pHyZAcSZbPQb3EuREbzFZgKPhDJNkJvT7URqFpccsiX otK+buLfKTVWEw+AYzSJDiiZ7NkWmZvm/jKmoDoGD6tqtNHnWlc5jiT1KwgRhXyJ3GV+VDEH5G2 vCL83geaIuqYAVCMSQRgMong2LMm+Kulhqqf4fXEprVdvV4hcNyV8A31pX4ZO/tujYp7mb7IERK cpnSGfOdkL40YHnuQjHjVPcT7s0gY53U94mShJQ1YIFWeW1yp49sCGN1sOSbWYR4BIFgB8RGrgt M4IgPfZ11TSr7ohQmkMzQZ8X9aOkIBwpXFCM7oR3PXs/yPAYtCV3EmSw= X-Received: by 2002:a05:620a:2844:b0:8cd:9322:d44e with SMTP id af79cd13be357-8cd9322d85bmr58486985a.73.1773069870892; Mon, 09 Mar 2026 08:24:30 -0700 (PDT) X-Received: by 2002:a05:620a:2844:b0:8cd:9322:d44e with SMTP id af79cd13be357-8cd9322d85bmr58481885a.73.1773069870372; Mon, 09 Mar 2026 08:24:30 -0700 (PDT) Received: from localhost.localdomain ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4853a59fc36sm192812515e9.9.2026.03.09.08.24.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2026 08:24:29 -0700 (PDT) From: Srinivas Kandagatla To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: richardcochran@gmail.com, geert+renesas@glider.be, arnd@arndb.de, dmitry.baryshkov@oss.qualcomm.com, ebiggers@kernel.org, michal.simek@amd.com, luca.weiss@fairphone.com, sven@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, kuninori.morimoto.gx@renesas.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, m.facchin@arduino.cc, r.mereu@arduino.cc, loic.poulain@oss.qualcomm.com, Srinivas Kandagatla Subject: [PATCH 2/7] arm64: dts: qcom: Add Monaco Monza SoM Date: Mon, 9 Mar 2026 15:24:13 +0000 Message-ID: <20260309152420.1404349-3-srinivas.kandagatla@oss.qualcomm.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260309152420.1404349-1-srinivas.kandagatla@oss.qualcomm.com> References: <20260309152420.1404349-1-srinivas.kandagatla@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: 1TuOmPxaVWfO2xXjAgmxzayd3FpmPy7l X-Proofpoint-ORIG-GUID: 1TuOmPxaVWfO2xXjAgmxzayd3FpmPy7l X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA5MDEzOSBTYWx0ZWRfX5s9EkVG9apt2 wO2xx0Ue10OZmzjVSnKuzVfMwDrN/+UPXzIY3+woXLMMoVN9DiiOIkPIp2nQQrvLCBzZMa/HwvG Y215ppC9Mi2a3td4HXkBBA1P2ALX/e/3eG5Z6QRXn8H3hHJR952NGc0IDGiaRP1aQlBKLkSj0K7 OSDCS/ypW2L4rqOjfNviCZdlHlK2MQ87JUkMiR7b64t0SCRGz+BoIo26kOsk3/zv/bHic4kzuwP Aj+oZxbpJa/PA8W1jr8qr+dvTBS0ZjyouEJw2iUxLBTC24PhiwE98Lxy72GT8dgHK7+r5ZZXSPR XIw5LvQ9cXsWnagmVLxair+i43IS8USEOGgp8ZD8CPP4/MSG8/xfE+7FuCTc0KaHhvrkfTDhD+C tcPMhjCOe5Cf3zqQS7ch76FAsaNOHSq+uOqE6zKBDMfF4BjJr7joGmDkoT6+NX42poP3EHrihMH OxYNqWA4Fiw6/b+mZAw== X-Authority-Analysis: v=2.4 cv=Xr/3+FF9 c=1 sm=1 tr=0 ts=69aee62f cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=ZsC4DHZuhs/kKio7QBcDoQ==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=wMphO_-U-tlnGu-niZMA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-09_04,2026-03-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 spamscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 priorityscore=1501 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603090139 From: Loic Poulain The Monaco Monza SoM is a compact computing module that integrates a Monaco/QCS8300 System on Chip (SoC), along with essential components optimized for IoT applications. It is designed to be mounted on carrier boards, enabling the development of complete embedded systems. The following components are described: - Fixed S2S 1.8V rail - PMM8654AU RPMh regulators (PMIC A and PMIC C) - Display subsystem/phy supplies (DSI, DP) - Enable GPU, GPI DMA, IRIS - PCIe Gen4 for both controllers and PHY supply hookups - QUPv3 firmware declarations - REFGEN always-on workaround for USB2 HS PHY - Remoteproc firmware names for ADSP, CDSP and GPDSP - Ethernet SERDES supplies - USB HS/SS PHY regulators - On-SoM eMMC Signed-off-by: Loic Poulain Co-developed-by: Srinivas Kandagatla Signed-off-by: Srinivas Kandagatla --- .../arm64/boot/dts/qcom/monaco-monza-som.dtsi | 325 ++++++++++++++++++ 1 file changed, 325 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/bo= ot/dts/qcom/monaco-monza-som.dtsi new file mode 100644 index 000000000000..9c4f515337de --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi @@ -0,0 +1,325 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include + +#include "monaco.dtsi" +#include "monaco-pmics.dtsi" + +/ { + /* This comes from a PMIC handled within the SAIL domain */ + vreg_s2s: vreg-s2s { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_s2s"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vreg_l3a: ldo3 { + regulator-name =3D "vreg_l3a"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + regulator-always-on; + }; + + vreg_l4a: ldo4 { + regulator-name =3D "vreg_l4a"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l5a: ldo5 { + regulator-name =3D "vreg_l5a"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l6a: ldo6 { + regulator-name =3D "vreg_l6a"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l7a: ldo7 { + regulator-name =3D "vreg_l7a"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l8a: ldo8 { + regulator-name =3D "vreg_l8a"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l9a: ldo9 { + regulator-name =3D "vreg_l9a"; + regulator-min-microvolt =3D <2970000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vreg_s5c: smps5 { /* LPDDR VDD2H */ + regulator-name =3D "vreg_s5c"; + regulator-min-microvolt =3D <1104000>; + regulator-max-microvolt =3D <1104000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c: ldo1 { /* LPDDR VDDQ */ + regulator-name =3D "vreg_l1c"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <512000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l2c: ldo2 { /* LPDDR VDD2L */ + regulator-name =3D "vreg_l2c"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <904000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l4c: ldo4 { + regulator-name =3D "vreg_l4c"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l7c: ldo7 { + regulator-name =3D "vreg_l7c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l8c: ldo8 { /* LPDDR VDD1 */ + regulator-name =3D "vreg_l8c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l9c: ldo9 { /* QFPROM */ + regulator-name =3D "vreg_l9c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; +}; + +&mdss_dp0 { + pinctrl-0 =3D <&dp_hpd>; + pinctrl-names =3D "default"; +}; + +&mdss_dp0_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l4a>; +}; + +&mdss_dsi0 { + vdda-supply =3D <&vreg_l5a>; +}; + +&mdss_dsi0_phy { + vdds-supply =3D <&vreg_l4a>; +}; + +&gpi_dma0 { + status =3D "okay"; +}; + +&gpi_dma1 { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/qcs8300/a623_zap.mbn"; +}; + +&iris { + status =3D "okay"; +}; + +/* PCIe0 Gen4 x2 */ +&pcie0 { + iommu-map =3D <0x0 &pcie_smmu 0x0000 0x1>, + <0x100 &pcie_smmu 0x0001 0x1>, + <0x200 &pcie_smmu 0x0007 0x1>, + <0x208 &pcie_smmu 0x0002 0x1>, + <0x210 &pcie_smmu 0x0003 0x1>, + <0x218 &pcie_smmu 0x0004 0x1>, + <0x300 &pcie_smmu 0x0005 0x1>, + <0x400 &pcie_smmu 0x0006 0x1>; + num-lanes =3D <2>; + + status =3D "okay"; +}; + +&pcie0_phy { + vdda-phy-supply =3D <&vreg_l6a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +/* PCIe1 Gen4 x4 */ +&pcie1 { + num-lanes =3D <4>; + + status =3D "okay"; +}; + +&pcie1_phy { + vdda-phy-supply =3D <&vreg_l6a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&qupv3_id_0 { + firmware-name =3D "qcom/qcs8300/qupv3fw.elf"; + status =3D "okay"; +}; + +&qupv3_id_1 { + firmware-name =3D "qcom/qcs8300/qupv3fw.elf"; + status =3D "okay"; +}; + +/* There is a HW/FW issue preventing proper REFGEN hardware voting + * for the USB2 HS PHY. As a workaround, we force REFGEN to stay + * always=E2=80=91on in software, matching initial bootloader config. + */ +&refgen{ + regulator-always-on; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/qcs8300/adsp.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/qcs8300/cdsp0.mbn"; + + status =3D "okay"; +}; + +&remoteproc_gpdsp { + firmware-name =3D "qcom/qcs8300/gpdsp0.mbn"; + + status =3D "okay"; +}; + +/* Ethernet/SGMII */ +&serdes0 { + phy-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&tlmm { + dp_hpd: dp-hpd-state { + pins =3D "gpio94"; + function =3D "edp0_hot"; + bias-disable; + }; +}; + +/* USB0 HS + SS */ +&usb_1_hsphy { + vdda-pll-supply =3D <&vreg_l7a>; + vdda18-supply =3D <&vreg_l7c>; + vdda33-supply =3D <&vreg_l9a>; + + status =3D "okay"; +}; + +&usb_qmpphy { + vdda-phy-supply =3D <&vreg_l7a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +/* USB1 HS */ +&usb_2_hsphy { + vdda-pll-supply =3D <&vreg_l7a>; + vdda18-supply =3D <&vreg_l7c>; + vdda33-supply =3D <&vreg_l9a>; + + status =3D "okay"; +}; + +/* OnSom eMMC */ +&sdhc_1 { + vmmc-supply =3D <&vreg_l8a>; + vqmmc-supply =3D <&vreg_s2s>; + + bus-width =3D <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + no-sd; + no-sdio; + non-removable; + + status =3D "okay"; +}; --=20 2.47.3