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Mon, 09 Mar 2026 23:12:20 -0700 (PDT) From: Dmitry Torokhov Date: Mon, 09 Mar 2026 23:11:59 -0700 Subject: [PATCH 2/4] MIPS: alchemy: db1000: use nodes attached to GPIO chips in properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260309-alchemy-v1-2-f55e9dc60ba1@gmail.com> References: <20260309-alchemy-v1-0-f55e9dc60ba1@gmail.com> In-Reply-To: <20260309-alchemy-v1-0-f55e9dc60ba1@gmail.com> To: Thomas Bogendoerfer Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev-a6826 GPIO subsystem is switching the way it locates GPIO chip instances for GPIO references in software nodes by doing identity matching instead of matching on node names. Switch to using software nodes attached to gpio chips instead of using freestanding software nodes. Also stop supplying platform data for the spi-gpio controller since spi-gpio driver can derive number of chipselect lines from device properties. Signed-off-by: Dmitry Torokhov --- arch/mips/alchemy/devboards/db1000.c | 36 +++++++++++---------------------= ---- 1 file changed, 11 insertions(+), 25 deletions(-) diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devbo= ards/db1000.c index 6984cd5169b5..d9dffacc5f5a 100644 --- a/arch/mips/alchemy/devboards/db1000.c +++ b/arch/mips/alchemy/devboards/db1000.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include @@ -375,20 +374,14 @@ static struct platform_device db1100_mmc1_dev =3D { =20 /*************************************************************************= *****/ =20 -static const struct software_node db1100_alchemy2_gpiochip =3D { - .name =3D "alchemy-gpio2", -}; - -static const struct property_entry db1100_ads7846_properties[] =3D { - PROPERTY_ENTRY_U16("ti,vref_min", 3300), - PROPERTY_ENTRY_GPIO("pendown-gpios", - &db1100_alchemy2_gpiochip, 21, GPIO_ACTIVE_LOW), - { } -}; - static const struct software_node db1100_ads7846_swnode =3D { .name =3D "ads7846", - .properties =3D db1100_ads7846_properties, + .properties =3D (const struct property_entry[]){ + PROPERTY_ENTRY_U16("ti,vref_min", 3300), + PROPERTY_ENTRY_GPIO("pendown-gpios", + &alchemy_gpio2_node, 21, GPIO_ACTIVE_LOW), + { } + }, }; =20 static struct spi_board_info db1100_spi_info[] __initdata =3D { @@ -403,32 +396,26 @@ static struct spi_board_info db1100_spi_info[] __init= data =3D { }, }; =20 -static const struct spi_gpio_platform_data db1100_spictl_pd __initconst = =3D { - .num_chipselect =3D 1, -}; - /* * Alchemy GPIO 2 has its base at 200 so the GPIO lines * 207 thru 210 are GPIOs at offset 7 thru 10 at this chip. */ static const struct property_entry db1100_spi_dev_properties[] __initconst= =3D { PROPERTY_ENTRY_GPIO("miso-gpios", - &db1100_alchemy2_gpiochip, 7, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 7, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("mosi-gpios", - &db1100_alchemy2_gpiochip, 8, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 8, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("sck-gpios", - &db1100_alchemy2_gpiochip, 9, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 9, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("cs-gpios", - &db1100_alchemy2_gpiochip, 10, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 10, GPIO_ACTIVE_HIGH), { } }; =20 static const struct platform_device_info db1100_spi_dev_info __initconst = =3D { .name =3D "spi_gpio", .id =3D 0, - .data =3D &db1100_spictl_pd, - .size_data =3D sizeof(db1100_spictl_pd), - .dma_mask =3D DMA_BIT_MASK(32), + .dma_mask =3D DMA_BIT_MASK(32), .properties =3D db1100_spi_dev_properties, }; =20 @@ -481,7 +468,6 @@ int __init db1000_dev_setup(void) pfc |=3D (1 << 0); /* SSI0 pins as GPIOs */ alchemy_wrsys(pfc, AU1000_SYS_PINFUNC); =20 - software_node_register(&db1100_alchemy2_gpiochip); spi_register_board_info(db1100_spi_info, ARRAY_SIZE(db1100_spi_info)); =20 --=20 2.53.0.473.g4a7958ca14-goog