From nobody Thu Apr 9 13:38:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AD94271471; Sun, 8 Mar 2026 14:52:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772981577; cv=none; b=bJk7FMuZ6wAL0rOqGoW58DxpfI47P8LeyOGhYVWihfjaOZJNsJ3XY4QXJyn9KNYdjlXqwTIJmxfmQp1LtcplFKJj6groYL9iIzmWBjX6nISWRIq6xl6D47XdKLHY2tF0vJgewLOjA3GOpoxRB5OfUfLIETy5d+EWktEH17suWqo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772981577; c=relaxed/simple; bh=h9lR2FOnXE7uoB+tCaLzQ8fel/j8lhzsuvRhfAbAB9w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tdP8cSBbCicP5LTCDzPLTQGnIz5uWAEYBSxLfldOALLh20I5rpDjAWUXRUYAEf9ETq3SvR8bjWeOnnIa7Dx+mhJs0egU1IQev4JsIeXXZXcZ08t1qdsAOnbEonGfSW8MCZkixTW2h5Gb3s5J4j8X77iGZAlbGKxO+yaV7yghYcA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=k77hhvnE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="k77hhvnE" Received: by smtp.kernel.org (Postfix) with ESMTPS id E9600C19423; Sun, 8 Mar 2026 14:52:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772981577; bh=h9lR2FOnXE7uoB+tCaLzQ8fel/j8lhzsuvRhfAbAB9w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=k77hhvnEvTSU6lpLA1+SBP5JZknY/DEi5bTfGwnZOEeHg1EJEOfC/pNvbntjxr5ak qYvxejUfCBVEtQMzWIBqrQ+vAVSTh9F2hV+odWI/NpbRLItZ73eWc42CH8EGjpUhsW CRG1VvXdGXy2Ch3IGyiY8WipOPBg1ZHvXk7r4hFHJI+QUUxOpWMatMewN/aG/CO5yx 7nuQWbwNkP3hAKND+mbqh7oVmJAhzfcwGvz6etEKUMHSI6Ucg7MjKDgUrnJDy9RGtN HzFg+QjuKYGcrTfu2ifNuMCk012bNoPxC6je0iNACJq7kTR+j3foVNSkUiKxOGsWAv Qr+VH9LHcXGaA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0BFBEA8524; Sun, 8 Mar 2026 14:52:56 +0000 (UTC) From: Cristian Cozzolino via B4 Relay Date: Sun, 08 Mar 2026 16:52:41 +0100 Subject: [PATCH 1/6] dt-bindings: display: panel: Add Novatek NT35532 LCD DSI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260308-rimob-new-features-v1-1-aa2c330572c0@protonmail.com> References: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> In-Reply-To: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Cristian Cozzolino X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772985180; l=2664; i=cristian_ci@protonmail.com; s=20250620; h=from:subject:message-id; bh=CY/PsVM9Vewhtr4VFeBaWeD4SwFUa8brDk4OcdsJP5M=; b=SnKXcuSfJ5wjVhp0OwfLf5Z6gv09wYnZZm/lTRzSr02v7j7PV4pf2qRwBopZH4NI/D8uWpyS9 ZS3EFrraTRNAmIco82D0JH6KAHO4PzJVYEDoNbS2mMdfXTQDSK2uUPw X-Developer-Key: i=cristian_ci@protonmail.com; a=ed25519; pk=xH5IvIPUNHV1Q8R0/pq2CfuVFR/wTiAyuyi6IwedjZY= X-Endpoint-Received: by B4 Relay for cristian_ci@protonmail.com/20250620 with auth_id=438 X-Original-From: Cristian Cozzolino Reply-To: cristian_ci@protonmail.com From: Cristian Cozzolino Document Novatek NT35532-based DSI display panel. Signed-off-by: Cristian Cozzolino --- .../bindings/display/panel/novatek,nt35532.yaml | 66 ++++++++++++++++++= ++++ MAINTAINERS | 5 ++ 2 files changed, 71 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt3553= 2.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt35532.ya= ml new file mode 100644 index 000000000000..de11cce83b40 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/novatek,nt35532.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Novatek NT35532-based DSI display panels + +maintainers: + - Cristian Cozzolino + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: novatek,nt35532 + + reg: + maxItems: 1 + + backlight: true + reset-gpios: true + + vsn-supply: + description: negative voltage supply for analog circuits + vsp-supply: + description: positive voltage supply for analog circuits + + port: true + +required: + - compatible + - reg + - reset-gpios + - vsn-supply + - vsp-supply + - port + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + panel@0 { + compatible =3D "novatek,nt35532"; + reg =3D <0>; + + backlight =3D <&pmi8950_wled>; + reset-gpios =3D <&tlmm 61 GPIO_ACTIVE_LOW>; + vsn-supply =3D <&ibb>; + vsp-supply =3D <&lab>; + + port { + panel_in: endpoint { + remote-endpoint =3D <&dsi0_out>; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 61bf550fd37c..12243feb0b27 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8139,6 +8139,11 @@ T: git https://gitlab.freedesktop.org/drm/misc/kerne= l.git F: Documentation/devicetree/bindings/display/panel/novatek,nt35510.yaml F: drivers/gpu/drm/panel/panel-novatek-nt35510.c =20 +DRM DRIVER FOR NOVATEK NT35532 PANELS +M: Cristian Cozzolino +S: Maintained +F: Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml + DRM DRIVER FOR NOVATEK NT35560 PANELS M: Linus Walleij S: Maintained --=20 2.52.0 From nobody Thu Apr 9 13:38:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AE712797B5; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260308-rimob-new-features-v1-2-aa2c330572c0@protonmail.com> References: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> In-Reply-To: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Cristian Cozzolino X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772985181; l=41261; i=cristian_ci@protonmail.com; s=20250620; h=from:subject:message-id; bh=rtTdI+Pmxfb99iePMOdvawez184BGjMFFKV3zP8oy+4=; b=SBsvpSUczH1AoQvwtupF85mfX5a01WmwaXiwCbR79QXW6kBlviMX/XUS3Z/prS1iY+KrxvRmW m4TKWYCYnbUADTckP5Ob4e6Kev4MqqFdVEYkPq/JgBbapT0ZxLQY6yM X-Developer-Key: i=cristian_ci@protonmail.com; a=ed25519; pk=xH5IvIPUNHV1Q8R0/pq2CfuVFR/wTiAyuyi6IwedjZY= X-Endpoint-Received: by B4 Relay for cristian_ci@protonmail.com/20250620 with auth_id=438 X-Original-From: Cristian Cozzolino Reply-To: cristian_ci@protonmail.com From: Cristian Cozzolino Add support for Novatek NT35532-based 1080p video mode DSI panel. Signed-off-by: Cristian Cozzolino --- MAINTAINERS | 1 + drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-novatek-nt35532.c | 767 ++++++++++++++++++++++= ++++ 4 files changed, 780 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 12243feb0b27..d854804dc8cc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8143,6 +8143,7 @@ DRM DRIVER FOR NOVATEK NT35532 PANELS M: Cristian Cozzolino S: Maintained F: Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml +F: drivers/gpu/drm/panel/panel-novatek-nt35532.c =20 DRM DRIVER FOR NOVATEK NT35560 PANELS M: Linus Walleij diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 307152ad7759..4eb9691ab552 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -500,6 +500,17 @@ config DRM_PANEL_NOVATEK_NT35510 around the Novatek NT35510 display controller, such as some Hydis panels. =20 +config DRM_PANEL_NOVATEK_NT35532 + tristate "Novatek NT35532-based DSI video mode panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + select VIDEOMODE_HELPERS + select DRM_KMS_HELPER + help + Say Y or M here if you want to enable support for Novatek + NT35532-based 1080p video mode DSI panels. + config DRM_PANEL_NOVATEK_NT35560 tristate "Novatek NT35560 DSI command mode panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index aeffaa95666d..f2b3d9b7abee 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) +=3D panel-nec-nl8= 048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) +=3D panel-newvision-nv3051d.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) +=3D panel-newvision-nv3052c.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) +=3D panel-novatek-nt35510.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35532) +=3D panel-novatek-nt35532.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) +=3D panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) +=3D panel-novatek-nt35950.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) +=3D panel-novatek-nt36523.o diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35532.c b/drivers/gpu/dr= m/panel/panel-novatek-nt35532.c new file mode 100644 index 000000000000..51ba548d0a8b --- /dev/null +++ b/drivers/gpu/drm/panel/panel-novatek-nt35532.c @@ -0,0 +1,767 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Generated with linux-mdss-dsi-panel-driver-generator from vendor device= tree. + * Copyright (c) 2026 Cristian Cozzolino + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +struct novatek_nt35532 { + struct drm_panel panel; + struct mipi_dsi_device *dsi; + struct regulator_bulk_data *supplies; + struct gpio_desc *reset_gpio; +}; + +static const struct regulator_bulk_data nt35532_supplies[] =3D { + { .supply =3D "vsn" }, + { .supply =3D "vsp" }, +}; + +static inline struct novatek_nt35532 *to_novatek_nt35532(struct drm_panel = *panel) +{ + return container_of(panel, struct novatek_nt35532, panel); +} + +static void nt35532_reset(struct novatek_nt35532 *ctx) +{ + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + usleep_range(5000, 6000); + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + usleep_range(10000, 11000); +} + +static int nt35532_on(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi }; + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x31); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0x7e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x55); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x50); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xd0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x6b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x63); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x3c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x5c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x60); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0xca); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0xd5); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xab); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0x80); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x05); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x1d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x17); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x38); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0x1c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x3f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x07); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x1a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x19); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x36); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0x1b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0x27); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x28); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x2c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x32); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x44); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x06); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x22); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x08); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0xc0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x09); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x11); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x14); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x61); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x15); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x30); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0xb0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x0a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0xda); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xff); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xf4); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x40); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x7f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x16); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x53); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0xf0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x3b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x13); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x77); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x2a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x92); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x88); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0xaa); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x70); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xeb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xec, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xed, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xee, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xef, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xf9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfa, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x01, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x03, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x04, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x05, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x06, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x07, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x08, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x09, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x0f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x10, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x12, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x13, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x14, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x15, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x16, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x17, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x18, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x19, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1a, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1b, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1c, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1d, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1e, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x1f, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x20, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x21, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x22, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x23, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x24, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x25, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x26, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x27, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x28, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2a, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2b, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x2f, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x30, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x31, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x32, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x33, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x34, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x37, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x38, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x39, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3a, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3b, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x3f, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x43, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x44, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x45, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x46, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x47, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x48, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x49, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4a, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4b, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4c, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4d, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4e, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x4f, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x50, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x51, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x52, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x53, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x54, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x55, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x56, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x58, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x59, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5a, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5b, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5c, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5e, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x5f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x60, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x61, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x62, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x63, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x64, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x65, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x66, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x67, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x68, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x69, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6a, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6c, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6e, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x6f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x70, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x71, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x72, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x73, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x74, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x75, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x76, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x77, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x78, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x79, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7a, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7b, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7c, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7d, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7e, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x7f, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x80, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x81, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x82, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x83, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x84, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x85, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x86, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x87, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x88, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x89, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8a, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8b, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8c, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8d, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8e, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x90, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x92, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x93, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x94, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x95, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x96, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x97, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x98, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x99, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9a, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9b, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9c, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9d, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9e, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x9f, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa0, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa2, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa3, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa4, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa5, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa6, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa7, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xa9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaa, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xab, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xac, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xad, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xae, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xaf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb2, 0x20); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb4, 0x49); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb5, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb6, 0x66); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb8, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x91); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbb, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbc, 0xa3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbe, 0xb3); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbf, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0xc1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc1, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc2, 0xf1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc3, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc4, 0x18); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc5, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc6, 0x54); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc7, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc8, 0x85); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc9, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xca, 0xd1); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcb, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcc, 0x0c); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcd, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xce, 0x0e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xcf, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd0, 0x43); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd1, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd2, 0x7d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0xa2); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0xd7); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x02); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd8, 0xf8); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xda, 0x2b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdb, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdc, 0x3a); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdd, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xde, 0x4b); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xdf, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe0, 0x5d); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, 0x73); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe3, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe4, 0x8e); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe5, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe6, 0xae); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe7, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe8, 0xc9); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe9, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xea, 0xcd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0xee); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x40, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x41, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x02, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x42, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xba, 0x03); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x35, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x36, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd3, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd4, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd5, 0x0f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, 0x48); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd7, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd9, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x11, 0x00); + mipi_dsi_msleep(&dsi_ctx, 120); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x29, 0x00); + mipi_dsi_msleep(&dsi_ctx, 50); + + return dsi_ctx.accum_err; +} + +static int nt35532_off(struct novatek_nt35532 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D ctx->dsi }; + + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 50); + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 120); + + return dsi_ctx.accum_err; +} + +static int nt35532_prepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx =3D to_novatek_nt35532(panel); + struct device *dev =3D &ctx->dsi->dev; + int ret; + + ret =3D regulator_bulk_enable(ARRAY_SIZE(nt35532_supplies), ctx->supplies= ); + if (ret < 0) { + dev_err(dev, "Failed to enable regulators: %d\n", ret); + return ret; + } + + nt35532_reset(ctx); + + ret =3D nt35532_on(ctx); + if (ret < 0) { + dev_err(dev, "Failed to initialize panel: %d\n", ret); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + return ret; + } + + return 0; +} + +static int nt35532_unprepare(struct drm_panel *panel) +{ + struct novatek_nt35532 *ctx =3D to_novatek_nt35532(panel); + struct device *dev =3D &ctx->dsi->dev; + int ret; + + ret =3D nt35532_off(ctx); + if (ret < 0) + dev_err(dev, "Failed to un-initialize panel: %d\n", ret); + + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(nt35532_supplies), ctx->supplies); + + return 0; +} + +static const struct drm_display_mode nt35532_mode =3D { + .clock =3D (1080 + 100 + 6 + 94) * (1920 + 15 + 6 + 10) * 60 / 1000, + .hdisplay =3D 1080, + .hsync_start =3D 1080 + 100, + .hsync_end =3D 1080 + 100 + 6, + .htotal =3D 1080 + 100 + 6 + 94, + .vdisplay =3D 1920, + .vsync_start =3D 1920 + 15, + .vsync_end =3D 1920 + 15 + 6, + .vtotal =3D 1920 + 15 + 6 + 10, + .width_mm =3D 68, + .height_mm =3D 121, + .type =3D DRM_MODE_TYPE_DRIVER, +}; + +static int nt35532_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + return drm_connector_helper_get_modes_fixed(connector, &nt35532_mode); +} + +static const struct drm_panel_funcs novatek_nt35532_panel_funcs =3D { + .prepare =3D nt35532_prepare, + .unprepare =3D nt35532_unprepare, + .get_modes =3D nt35532_get_modes, +}; + +static int nt35532_probe(struct mipi_dsi_device *dsi) +{ + struct device *dev =3D &dsi->dev; + struct novatek_nt35532 *ctx; + int ret; + + ctx =3D devm_drm_panel_alloc(dev, struct novatek_nt35532, panel, + &novatek_nt35532_panel_funcs, + DRM_MODE_CONNECTOR_DSI); + if (IS_ERR(ctx)) + return PTR_ERR(ctx); + + ret =3D devm_regulator_bulk_get_const(dev, + ARRAY_SIZE(nt35532_supplies), + nt35532_supplies, + &ctx->supplies); + if (ret < 0) + return ret; + + ctx->reset_gpio =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(ctx->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), + "Failed to get reset-gpios\n"); + + ctx->dsi =3D dsi; + mipi_dsi_set_drvdata(dsi, ctx); + + dsi->lanes =3D 4; + dsi->format =3D MIPI_DSI_FMT_RGB888; + dsi->mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_LPM; + + ctx->panel.prepare_prev_first =3D true; + + ret =3D drm_panel_of_backlight(&ctx->panel); + if (ret) + return dev_err_probe(dev, ret, "Failed to get backlight\n"); + + drm_panel_add(&ctx->panel); + + ret =3D mipi_dsi_attach(dsi); + if (ret < 0) { + drm_panel_remove(&ctx->panel); + return dev_err_probe(dev, ret, "Failed to attach to DSI host\n"); + } + + return 0; +} + +static void nt35532_remove(struct mipi_dsi_device *dsi) +{ + struct novatek_nt35532 *ctx =3D mipi_dsi_get_drvdata(dsi); + int ret; + + ret =3D mipi_dsi_detach(dsi); + if (ret < 0) + dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret); + + drm_panel_remove(&ctx->panel); +} + +static const struct of_device_id nt35532_of_match[] =3D { + { .compatible =3D "novatek,nt35532" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, nt35532_of_match); + +static struct mipi_dsi_driver nt35532_driver =3D { + .probe =3D nt35532_probe, + .remove =3D nt35532_remove, + .driver =3D { + .name =3D "panel-novatek-nt35532", + .of_match_table =3D nt35532_of_match, + }, +}; +module_mipi_dsi_driver(nt35532_driver); + +MODULE_DESCRIPTION("DRM driver for Novatek NT35532-based 1080p video mode = DSI panel"); +MODULE_LICENSE("GPL"); --=20 2.52.0 From nobody Thu Apr 9 13:38:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A55B280325; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260308-rimob-new-features-v1-3-aa2c330572c0@protonmail.com> References: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> In-Reply-To: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Cristian Cozzolino X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772985181; l=2496; i=cristian_ci@protonmail.com; s=20250620; h=from:subject:message-id; bh=OucZ1Y4hELJ4A5HRkm799al0dZ0EBqNmgbJMR0NtTgI=; b=hLUB2XoeA3Kc3SSzrkqIjnGR7RMQ41xtcRMEVepAfbcUE3jk4iir01xExt6tOBPM8jB/cdXCm YEB2o9sE/AiChcRi0aJtnis0si5iSEex/dXUEQn4ZynIjPwgWU+nmS9 X-Developer-Key: i=cristian_ci@protonmail.com; a=ed25519; pk=xH5IvIPUNHV1Q8R0/pq2CfuVFR/wTiAyuyi6IwedjZY= X-Endpoint-Received: by B4 Relay for cristian_ci@protonmail.com/20250620 with auth_id=438 X-Original-From: Cristian Cozzolino Reply-To: cristian_ci@protonmail.com From: Cristian Cozzolino Add the description for the display panel found on this phone. And with this done we can also enable the GPU and set the zap shader firmware path. Signed-off-by: Cristian Cozzolino --- .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 80 ++++++++++++++++++= ++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm= 64/boot/dts/qcom/msm8953-flipkart-rimob.dts index ef4faf763132..a00cf83dba93 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -78,6 +78,13 @@ vph_pwr: vph-pwr-regulator { }; }; =20 +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/msm8953/flipkart/rimob/a506_zap.mdt"; +}; =20 &hsusb_phy { vdd-supply =3D <&pm8953_l3>; @@ -87,11 +94,69 @@ &hsusb_phy { status =3D "okay"; }; =20 +&ibb { + qcom,discharge-resistor-kohms =3D <32>; +}; + +&lab { + qcom,soft-start-us =3D <800>; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dsi0 { + vdda-supply =3D <&pm8953_s3>; + vddio-supply =3D <&pm8953_l6>; + + pinctrl-0 =3D <&mdss_default>; + pinctrl-1 =3D <&mdss_sleep>; + pinctrl-names =3D "default", "sleep"; + + status =3D "okay"; + + panel: panel@0 { + compatible =3D "novatek,nt35532"; + reg =3D <0>; + + backlight =3D <&pmi8950_wled>; + reset-gpios =3D <&tlmm 61 GPIO_ACTIVE_LOW>; + vsp-supply =3D <&lab>; + vsn-supply =3D <&ibb>; + + port { + panel_in: endpoint { + remote-endpoint =3D <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes =3D <0 1 2 3>; + remote-endpoint =3D <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply =3D <&pm8953_l3>; + + status =3D "okay"; +}; + &pm8953_resin { linux,code =3D ; status =3D "okay"; }; =20 +&pmi8950_wled { + qcom,current-limit-microamp =3D <10000>; + qcom,num-strings =3D <3>; + qcom,ovp-millivolt =3D <29500>; + + status =3D "okay"; +}; + &rpm_requests { regulators { compatible =3D "qcom,rpm-pm8953-regulators"; @@ -244,6 +309,21 @@ gpio_key_default: gpio-key-default-state { drive-strength =3D <2>; bias-pull-up; }; + + mdss_default: mdss-default-state { + pins =3D "gpio61"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-disable; + output-high; + }; + + mdss_sleep: mdss-sleep-state { + pins =3D "gpio61"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; }; =20 &usb3 { --=20 2.52.0 From nobody Thu Apr 9 13:38:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60319280CE0; Sun, 8 Mar 2026 14:52:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772981577; cv=none; b=mZHzG6yp1VqeMehsXB+Gp0OvI2M8SovILeuvWQcILaAAeSz6v1IKxosLapnVhtd9xni4HofZII0n6v1+WG3GrWJ1kKQYPf5zIRLyPm5nVYE4riEK1HtZ6/BUTquMpqgldZWq61qYmF3q7Y+q6/l/0jCglCu+is/KpQmqmlWC6Dk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772981577; c=relaxed/simple; bh=hdH/8RBztoxcxP9jLo+G7cW9DiXcKLSC0NauhkzMG3Q=; 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Sun, 8 Mar 2026 14:52:57 +0000 (UTC) From: Cristian Cozzolino via B4 Relay Date: Sun, 08 Mar 2026 16:52:44 +0100 Subject: [PATCH 4/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/Bluetooth Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260308-rimob-new-features-v1-4-aa2c330572c0@protonmail.com> References: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> In-Reply-To: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Cristian Cozzolino X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772985181; l=926; i=cristian_ci@protonmail.com; s=20250620; h=from:subject:message-id; bh=UxkiUf+lcb5Tn1zG5yWXMywYNhh5HdW9lUht49EkNe0=; b=X8NrGc7sd5MVWVxbBkGzqoPY4rmL3/1cmAoEvGLGU/csTO2bx2yZ9nfIX4uOoLI5ZbElxudJW SEobwXC4kxxCoIjLlLz/wcN8SA4qD8/3eW32WlFFhq34v36fGwY1JpG X-Developer-Key: i=cristian_ci@protonmail.com; a=ed25519; pk=xH5IvIPUNHV1Q8R0/pq2CfuVFR/wTiAyuyi6IwedjZY= X-Endpoint-Received: by B4 Relay for cristian_ci@protonmail.com/20250620 with auth_id=438 X-Original-From: Cristian Cozzolino Reply-To: cristian_ci@protonmail.com From: Cristian Cozzolino Configure and enable the WCNSS which provides WiFi and Bluetooth on this device using the WCN3660B chip. Signed-off-by: Cristian Cozzolino Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm= 64/boot/dts/qcom/msm8953-flipkart-rimob.dts index a00cf83dba93..7b2849405462 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -333,3 +333,18 @@ &usb3 { &usb3_dwc3 { dr_mode =3D "peripheral"; }; + +&wcnss { + vddpx-supply =3D <&pm8953_l5>; + + status =3D "okay"; +}; + +&wcnss_iris { + compatible =3D "qcom,wcn3660b"; + + vddxo-supply =3D <&pm8953_l7>; + vddrfa-supply =3D <&pm8953_l19>; + vddpa-supply =3D <&pm8953_l9>; + vdddig-supply =3D <&pm8953_l5>; +}; --=20 2.52.0 From nobody Thu Apr 9 13:38:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A1F0285056; Sun, 8 Mar 2026 14:52:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772981577; cv=none; b=GSj73rG7ENMBIYu6ZI/BHLqENyAQIwEMIC07D8GskYiZkTU7u/fwak+QE8/IQQi5g6X3KtiOsAollAAKkDTqyXNJINm/ocdGPovqoyDd+6mUOU7OQoNOsY9JTZ0jszUkGWaQS9gdS5uCgMnpS2v/qpjiz+//hdm9DPpan8ro1GM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772981577; c=relaxed/simple; bh=Vc6BStLhf2YonGOFI3gte4yDvX6yz4QhBccE8uQ9lOE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Lj5S9CVLKBMHEm4e86pVCRVQMVJhfdxxXdB9DOhakzrP6oT76ilUq295ARjqfkrLVlRm3iICK0+dxeQKFz83bdScl9JTjlti5Eh6l/OdAm0YVDt4LfP2rTxxCEyxl4+S7ZMFfPzuDP+TScr7sAc20GJzb3YByRM2TnY2ozDx7xg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Sj3vt+sv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Sj3vt+sv" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5146FC2BCF4; Sun, 8 Mar 2026 14:52:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772981577; bh=Vc6BStLhf2YonGOFI3gte4yDvX6yz4QhBccE8uQ9lOE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Sj3vt+svFQC6tXmAjrlqtCIbD306D1JScAruTHzKC6jqNwc/PJCWrXIq5oPtcdK+7 OJIIGnEgWdGV+cYTo0upZk1f47l5foQUGcPn0pD3l3t2mgqzBVgTetZbsRHZhGqcyN zR+BJhtjQBe3o2aKigsXo7kmz6Br/zGShbRw1yS0sreqqZ/HX1mhcb+z7OBVaipapa 5gwu6XDvefTOluTaUnpcPJrVINsfYyzEaXXKJZWQQqDoxwOQy63+YbYLLus3unfYVK d/nkCS58yEoNFkWOF0hXLMV9TJti/dyUt/IphoKQQdtMPO8P1SqyQoc9AXq6lr6u4r d25u1k2dySBgA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 453C5EA8520; Sun, 8 Mar 2026 14:52:57 +0000 (UTC) From: Cristian Cozzolino via B4 Relay Date: Sun, 08 Mar 2026 16:52:45 +0100 Subject: [PATCH 5/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreen Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260308-rimob-new-features-v1-5-aa2c330572c0@protonmail.com> References: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> In-Reply-To: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Cristian Cozzolino X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772985181; l=1526; i=cristian_ci@protonmail.com; s=20250620; h=from:subject:message-id; bh=XQl5nSdg+PoeO9f/GA6vS7lJytMiNgLggtR2JXTp7MI=; b=NbQPg1CIk5z+Ptu+IL8KRnHwrrtpGoLeeH6hvVcmPcVLfRg1WYlpUusBZSiOqVHfSZl84MK3C SoPWhVd/7n/AAGB1wWJNYIeaJXkkr1wvF7OGuefQ3nJgYOXo/opxCoo X-Developer-Key: i=cristian_ci@protonmail.com; a=ed25519; pk=xH5IvIPUNHV1Q8R0/pq2CfuVFR/wTiAyuyi6IwedjZY= X-Endpoint-Received: by B4 Relay for cristian_ci@protonmail.com/20250620 with auth_id=438 X-Original-From: Cristian Cozzolino Reply-To: cristian_ci@protonmail.com From: Cristian Cozzolino This device uses a Goodix GT5688 touch controller, connected to i2c_3. Add it to the device tree. Signed-off-by: Cristian Cozzolino --- .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 32 ++++++++++++++++++= ++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm= 64/boot/dts/qcom/msm8953-flipkart-rimob.dts index 7b2849405462..709ea6fc9fbb 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -94,6 +94,31 @@ &hsusb_phy { status =3D "okay"; }; =20 +&i2c_3 { + status =3D "okay"; + + touchscreen@5d { + compatible =3D "goodix,gt5688"; + reg =3D <0x5d>; + + interrupts-extended =3D <&tlmm 65 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-0 =3D <&tsp_int_rst_default>; + pinctrl-names =3D "default"; + + irq-gpios =3D <&tlmm 65 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&tlmm 64 GPIO_ACTIVE_HIGH>; + + VDDIO-supply =3D <&pm8953_l6>; + AVDD28-supply =3D <&pm8953_l10>; + + touchscreen-size-x =3D <1080>; + touchscreen-size-y =3D <1920>; + touchscreen-inverted-x; + touchscreen-inverted-y; + }; +}; + &ibb { qcom,discharge-resistor-kohms =3D <32>; }; @@ -324,6 +349,13 @@ mdss_sleep: mdss-sleep-state { drive-strength =3D <2>; bias-pull-down; }; + + tsp_int_rst_default: tsp-int-rst-default-state { + pins =3D "gpio64", "gpio65"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-pull-up; + }; }; =20 &usb3 { --=20 2.52.0 From nobody Thu Apr 9 13:38:36 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 902142877CB; Sun, 8 Mar 2026 14:52:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772981577; cv=none; b=ZC+5b2F4pd2XG28ORnsdB1zOJTP7pe6kLANw6f5/DIrGYrYf2Vrz25jPopmm3pv64gxgB2XJjbC9MGTtk3OwGWW4knpMV5SWyi1Qc1WIxIo6md1u3GWUO3mZhVwszs7GOzoCp7QAIInFJ3SAXBpRa4G58sTfLvfhFE3l8N84h34= ARC-Message-Signature: i=1; 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b=kQ8XdQsdQmLI7EiLYwlL+xA98ZvRqiCGrgbzp1N+PFJKetCI34OfNLx2MFO01OPzs HUPLs9MCQsTynvlAQFbgoUKRhzaEY6flzNaSreTaXn8pLPKtdktsaR2BkGSWmr+9dO 0kUPptQX11dOtKnmWiRZoJXEcslNXiy1eQaNhoFrpaVMB1UlBW6Z21R8dUv8DoxvgL lIfFKe2mSfCYWeMwuB+Ou5dKONJvWrAkpovDx7YEdYNJBAD987WzA+iDeryLLdWt3O s+1o6Js0yL0rLrvkodol7pW6GeEFpg59Rt3/tiFFDdW1aW+jIu0cbNfZ4v2N9gHmJX gieMt3C/7TsSw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5419FEA8524; Sun, 8 Mar 2026 14:52:57 +0000 (UTC) From: Cristian Cozzolino via B4 Relay Date: Sun, 08 Mar 2026 16:52:46 +0100 Subject: [PATCH 6/6] arm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensor Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260308-rimob-new-features-v1-6-aa2c330572c0@protonmail.com> References: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> In-Reply-To: <20260308-rimob-new-features-v1-0-aa2c330572c0@protonmail.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Cristian Cozzolino X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772985181; l=1434; i=cristian_ci@protonmail.com; s=20250620; h=from:subject:message-id; bh=/6j0+t2XKdKx1e1cFAgI0as9W1ExR5I7yqNCXHZ/Uzs=; b=NzbU54tsA4XN8Nz2MbLAnZnyrJar55S2NfzMDiqjaBAhTT2PFW84rbNSK+RHqLfbFlgz8pfgW brFoFv9OkFFCjXVwpiII9P8yS/qAxX8jxuvtydmjSD5egBN68AjQz/j X-Developer-Key: i=cristian_ci@protonmail.com; a=ed25519; pk=xH5IvIPUNHV1Q8R0/pq2CfuVFR/wTiAyuyi6IwedjZY= X-Endpoint-Received: by B4 Relay for cristian_ci@protonmail.com/20250620 with auth_id=438 X-Original-From: Cristian Cozzolino Reply-To: cristian_ci@protonmail.com From: Cristian Cozzolino Enable the Hall effect sensor (flip cover) for Billion Capture+. The GPIO is mapped to SW_LID events as in other qcom devices. Signed-off-by: Cristian Cozzolino --- .../arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts | 25 ++++++++++++++++++= ++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts b/arch/arm= 64/boot/dts/qcom/msm8953-flipkart-rimob.dts index 709ea6fc9fbb..83812050a0a3 100644 --- a/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts +++ b/arch/arm64/boot/dts/qcom/msm8953-flipkart-rimob.dts @@ -44,6 +44,24 @@ framebuffer@90001000 { }; }; =20 + gpio-hall-sensor { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&hall_sensor_default>; + pinctrl-names =3D "default"; + + label =3D "GPIO Hall Effect Sensor"; + + event-hall-sensor { + label =3D "Hall Effect Sensor"; + gpios =3D <&tlmm 46 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + linux,can-disable; + wakeup-source; + }; + }; + gpio-keys { compatible =3D "gpio-keys"; =20 @@ -335,6 +353,13 @@ gpio_key_default: gpio-key-default-state { bias-pull-up; }; =20 + hall_sensor_default: hall-sensor-default-state { + pins =3D "gpio46"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + mdss_default: mdss-default-state { pins =3D "gpio61"; function =3D "gpio"; --=20 2.52.0