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charset="utf-8" Recognize new SMCA bank types and include their short names for sysfs and long names for decoding. Signed-off-by: Yazen Ghannam --- arch/x86/include/asm/mce.h | 11 +++++++++++ arch/x86/kernel/cpu/mce/amd.c | 30 ++++++++++++++++++++++++++++++ drivers/edac/mce_amd.c | 10 ++++++++++ 3 files changed, 51 insertions(+) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 576a4b6e83ea..e4d0fc0978ac 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -351,7 +351,10 @@ enum smca_bank_types { */ SMCA_CS, /* Coherent Station */ SMCA_CS_V2, + SMCA_DACC_BE, /* Data Acceleration Back-end */ + SMCA_DACC_FE, /* Data Acceleration Front-end */ SMCA_DE, /* Decoder Unit */ + SMCA_EDDR5CMN, /* eDDR5 CMN */ SMCA_EX, /* Execution Unit */ SMCA_FP, /* Floating Point */ SMCA_GMI_PCS, /* GMI PCS Unit */ @@ -363,12 +366,19 @@ enum smca_bank_types { SMCA_LS_V2, SMCA_MA_LLC, /* Memory Attached Last Level Cache */ SMCA_MP5, /* Microprocessor 5 Unit */ + SMCA_MPART, /* AMD Root of Trust Microprocessor */ + SMCA_MPASP, /* AMD Secure Processor */ + SMCA_MPASP_V2, + SMCA_MPDACC, /* MP for Data Acceleration */ SMCA_MPDMA, /* MPDMA Unit */ + SMCA_MPM, /* Microprocessor Manageability Core */ + SMCA_MPRAS, /* MP for RAS */ SMCA_NBIF, /* NBIF Unit */ SMCA_NBIO, /* Northbridge IO Unit */ SMCA_PB, /* Parameter Block */ SMCA_PCIE, /* PCI Express Unit */ SMCA_PCIE_V2, + SMCA_PCIE_PL, /* PCIe Link */ SMCA_PIE, /* Power, Interrupts, etc. */ SMCA_PSP, /* Platform Security Processor */ SMCA_PSP_V2, @@ -377,6 +387,7 @@ enum smca_bank_types { SMCA_SHUB, /* System HUB Unit */ SMCA_SMU, /* System Management Unit */ SMCA_SMU_V2, + SMCA_SSBDCI, /* Die to Die Interconnect */ SMCA_UMC, /* Unified Memory Controller */ SMCA_UMC_V2, SMCA_USB, /* USB Unit */ diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c index 86f51415283c..fc1513f8d180 100644 --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -96,7 +96,10 @@ static DEFINE_PER_CPU_READ_MOSTLY(u8[N_SMCA_BANK_TYPES],= smca_bank_counts); =20 static const char * const smca_names[] =3D { [SMCA_CS ... SMCA_CS_V2] =3D "coherent_station", + [SMCA_DACC_BE] =3D "dacc_be", + [SMCA_DACC_FE] =3D "dacc_fe", [SMCA_DE] =3D "decode_unit", + [SMCA_EDDR5CMN] =3D "eddr5_cmn", [SMCA_EX] =3D "execution_unit", [SMCA_FP] =3D "floating_point", [SMCA_GMI_PCS] =3D "gmi_pcs", @@ -107,17 +110,24 @@ static const char * const smca_names[] =3D { [SMCA_LS ... SMCA_LS_V2] =3D "load_store", [SMCA_MA_LLC] =3D "ma_llc", [SMCA_MP5] =3D "mp5", + [SMCA_MPART] =3D "mpart", + [SMCA_MPASP ... SMCA_MPASP_V2] =3D "mpasp", + [SMCA_MPDACC] =3D "mpdacc", [SMCA_MPDMA] =3D "mpdma", + [SMCA_MPM] =3D "mpm", + [SMCA_MPRAS] =3D "mpras", [SMCA_NBIF] =3D "nbif", [SMCA_NBIO] =3D "nbio", [SMCA_PB] =3D "param_block", [SMCA_PCIE ... SMCA_PCIE_V2] =3D "pcie", + [SMCA_PCIE_PL] =3D "pcie_pl", [SMCA_PIE] =3D "pie", [SMCA_PSP ... SMCA_PSP_V2] =3D "psp", [SMCA_RESERVED] =3D "reserved", [SMCA_SATA] =3D "sata", [SMCA_SHUB] =3D "shub", [SMCA_SMU ... SMCA_SMU_V2] =3D "smu", + [SMCA_SSBDCI] =3D "ssbdci", =20 /* UMC v2 is separate because both of them can exist in a single system. = */ [SMCA_UMC] =3D "umc", @@ -166,6 +176,8 @@ static const struct smca_hwid smca_hwid_mcatypes[] =3D { =20 { SMCA_PB, HWID_MCATYPE(0x05, 0x0) }, =20 + { SMCA_MPRAS, HWID_MCATYPE(0x12, 0x0) }, + { SMCA_NBIO, HWID_MCATYPE(0x18, 0x0) }, =20 { SMCA_CS, HWID_MCATYPE(0x2E, 0x0) }, @@ -178,6 +190,8 @@ static const struct smca_hwid smca_hwid_mcatypes[] =3D { =20 { SMCA_XGMI_PCS, HWID_MCATYPE(0x50, 0x0) }, =20 + { SMCA_SSBDCI, HWID_MCATYPE(0x5C, 0x0) }, + { SMCA_NBIF, HWID_MCATYPE(0x6C, 0x0) }, =20 { SMCA_SHUB, HWID_MCATYPE(0x80, 0x0) }, @@ -199,13 +213,29 @@ static const struct smca_hwid smca_hwid_mcatypes[] = =3D { { SMCA_L3_CACHE, HWID_MCATYPE(0xB0, 0x7) }, { SMCA_LS_V2, HWID_MCATYPE(0xB0, 0x10) }, =20 + { SMCA_MPDACC, HWID_MCATYPE(0xBE, 0x0) }, + + { SMCA_MPM, HWID_MCATYPE(0xF9, 0x0) }, + + { SMCA_MPASP, HWID_MCATYPE(0xFD, 0x0) }, + { SMCA_MPASP_V2, HWID_MCATYPE(0xFD, 0x1) }, + { SMCA_PSP, HWID_MCATYPE(0xFF, 0x0) }, { SMCA_PSP_V2, HWID_MCATYPE(0xFF, 0x1) }, + { SMCA_MPART, HWID_MCATYPE(0xFF, 0x2) }, + + { SMCA_DACC_FE, HWID_MCATYPE(0x157, 0x0) }, + + { SMCA_DACC_BE, HWID_MCATYPE(0x164, 0x0) }, =20 { SMCA_USR_DP, HWID_MCATYPE(0x170, 0x0) }, =20 { SMCA_USR_CP, HWID_MCATYPE(0x180, 0x0) }, =20 + { SMCA_EDDR5CMN, HWID_MCATYPE(0x1E0, 0x0) }, + + { SMCA_PCIE_PL, HWID_MCATYPE(0x1E1, 0x0) }, + { SMCA_GMI_PCS, HWID_MCATYPE(0x241, 0x0) }, =20 { SMCA_XGMI_PHY, HWID_MCATYPE(0x259, 0x0) }, diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index 54ad56f2a9e0..bd252cb3c38e 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -690,7 +690,10 @@ static void decode_mc6_mce(struct mce *m) =20 static const char * const smca_long_names[] =3D { [SMCA_CS ... SMCA_CS_V2] =3D "Coherent Station", + [SMCA_DACC_BE] =3D "DACC Back-end Unit", + [SMCA_DACC_FE] =3D "DACC Front-end Unit", [SMCA_DE] =3D "Decode Unit", + [SMCA_EDDR5CMN] =3D "eDDR5 CMN Unit", [SMCA_EX] =3D "Execution Unit", [SMCA_FP] =3D "Floating Point Unit", [SMCA_GMI_PCS] =3D "Global Memory Interconnect PCS Unit", @@ -700,17 +703,24 @@ static const char * const smca_long_names[] =3D { [SMCA_L3_CACHE] =3D "L3 Cache", [SMCA_LS ... SMCA_LS_V2] =3D "Load Store Unit", [SMCA_MP5] =3D "Microprocessor 5 Unit", + [SMCA_MPART] =3D "MPART Unit", + [SMCA_MPASP ... SMCA_MPASP_V2] =3D "MPASP Unit", + [SMCA_MPDACC] =3D "MPDACC Unit", [SMCA_MPDMA] =3D "MPDMA Unit", + [SMCA_MPM] =3D "MPM Unit", + [SMCA_MPRAS] =3D "MPRAS Unit", [SMCA_NBIF] =3D "NBIF Unit", [SMCA_NBIO] =3D "Northbridge IO Unit", [SMCA_PB] =3D "Parameter Block", [SMCA_PCIE ... SMCA_PCIE_V2] =3D "PCI Express Unit", + [SMCA_PCIE_PL] =3D "PCIe Link Unit", [SMCA_PIE] =3D "Power, Interrupts, etc.", [SMCA_PSP ... SMCA_PSP_V2] =3D "Platform Security Processor", [SMCA_RESERVED] =3D "Reserved", [SMCA_SATA] =3D "SATA Unit", [SMCA_SHUB] =3D "System Hub Unit", [SMCA_SMU ... SMCA_SMU_V2] =3D "System Management Unit", + [SMCA_SSBDCI] =3D "Die to Die Interconnect Unit", =20 /* UMC v2 is separate because both of them can exist in a single system. = */ [SMCA_UMC] =3D "Unified Memory Controller", --=20 2.53.0