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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Chanwoo Choi , Alexandre Belloni , Svyatoslav Ryhel Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-rtc@vger.kernel.org Subject: [PATCH v3 4/6] dt-bindings: mfd: max77620: convert to DT schema Date: Fri, 6 Mar 2026 15:33:49 +0200 Message-ID: <20260306133351.31589-5-clamor95@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260306133351.31589-1-clamor95@gmail.com> References: <20260306133351.31589-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert max77620 devicetree bindings from TXT to YAML format. This patch does not change any functionality; the bindings remain the same. The thermal bindings are incorporated into the binding. Signed-off-by: Svyatoslav Ryhel --- .../devicetree/bindings/mfd/max77620.txt | 162 ------- .../bindings/mfd/maxim,max77620.yaml | 422 ++++++++++++++++++ .../bindings/thermal/max77620_thermal.txt | 70 --- 3 files changed, 422 insertions(+), 232 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/max77620.txt create mode 100644 Documentation/devicetree/bindings/mfd/maxim,max77620.ya= ml delete mode 100644 Documentation/devicetree/bindings/thermal/max77620_ther= mal.txt diff --git a/Documentation/devicetree/bindings/mfd/max77620.txt b/Documenta= tion/devicetree/bindings/mfd/max77620.txt deleted file mode 100644 index 5a642a51d58e..000000000000 --- a/Documentation/devicetree/bindings/mfd/max77620.txt +++ /dev/null @@ -1,162 +0,0 @@ -MAX77620 Power management IC from Maxim Semiconductor. - -Required properties: -------------------- -- compatible: Must be one of - "maxim,max77620" - "maxim,max20024" - "maxim,max77663" -- reg: I2C device address. - -Optional properties: -------------------- -- interrupts: The interrupt on the parent the controller is - connected to. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells: is <2> and their usage is compliant to the 2 cells - variant of <../interrupt-controller/interrupts.txt> - IRQ numbers for different interrupt source of MAX77620 - are defined at dt-bindings/mfd/max77620.h. - -- system-power-controller: Indicates that this PMIC is controlling the - system power, see [1] for more details. - -[1] Documentation/devicetree/bindings/power/power-controller.txt - -Optional subnodes and their properties: -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D - -Flexible power sequence configurations: --------------------------------------- -The Flexible Power Sequencer (FPS) allows each regulator to power up under -hardware or software control. Additionally, each regulator can power on -independently or among a group of other regulators with an adjustable powe= r-up -and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be program= med -to be part of a sequence allowing external regulators to be sequenced along -with internal regulators. 32KHz clock can be programmed to be part of a -sequence. - -The flexible sequencing structure consists of two hardware enable inputs -(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2. -Each master sequencing timer is programmable through its configuration -register to have a hardware enable source (EN1 or EN2) or a software enable -source (SW). When enabled/disabled, the master sequencing timer generates -eight sequencing events on different time periods called slots. The time -period between each event is programmable within the configuration registe= r. -Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power -sequence slave register which allows its enable source to be specified as -a flexible power sequencer timer or a software bit. When a FPS source of -regulators, GPIOs and clocks specifies the enable source to be a flexible -power sequencer, the power up and power down delays can be specified in -the regulators, GPIOs and clocks flexible power sequencer configuration -registers. - -When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz -clock are set into following state at the sequencing event that -corresponds to its flexible sequencer configuration register. - Sleep state: In this state, regulators, GPIOs - and 32KHz clock get disabled at - the sequencing event. - Global Low Power Mode (GLPM): In this state, regulators are set in - low power mode at the sequencing event. - -The configuration parameters of FPS is provided through sub-node "fps" -and their child for FPS specific. The child node name for FPS are "fps0", -"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively. - -The FPS configurations like FPS source, power up and power down slots for -regulators, GPIOs and 32kHz clocks are provided in their respective -configuration nodes which is explained in respective sub-system DT -binding document. - -There is need for different FPS configuration parameters based on system -state like when system state changed from active to suspend or active to -power off (shutdown). - -Optional properties: -------------------- --maxim,fps-event-source: u32, FPS event source like external - hardware input to PMIC i.e. EN0, EN1 or - software (SW). - The macros are defined on - dt-bindings/mfd/max77620.h - for different control source. - - MAX77620_FPS_EVENT_SRC_EN0 - for hardware input pin EN0. - - MAX77620_FPS_EVENT_SRC_EN1 - for hardware input pin EN1. - - MAX77620_FPS_EVENT_SRC_SW - for software control. - --maxim,shutdown-fps-time-period-us: u32, FPS time period in microseconds - when system enters in to shutdown - state. - --maxim,suspend-fps-time-period-us: u32, FPS time period in microseconds - when system enters in to suspend state. - --maxim,device-state-on-disabled-event: u32, describe the PMIC state when F= PS - event cleared (set to LOW) whether it - should go to sleep state or low-power - state. Following are valid values: - - MAX77620_FPS_INACTIVE_STATE_SLEEP - to set the PMIC state to sleep. - - MAX77620_FPS_INACTIVE_STATE_LOW_POWER - to set the PMIC state to low - power. - Absence of this property or other value - will not change device state when FPS - event get cleared. - -Here supported time periods by device in microseconds are as follows: -MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds. -MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds. -MAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds. - --maxim,power-ok-control: configure map power ok bit - 1: Enables POK(Power OK) to control nRST_IO and GPIO1 - POK function. - 0: Disables POK control. - if property missing, do not configure MPOK bit. - If POK mapping is enabled for GPIO1/nRST_IO then, - GPIO1/nRST_IO pins are HIGH only if all rails - that have POK control enabled are HIGH. - If any of the rails goes down(which are enabled for POK - control) then, GPIO1/nRST_IO goes LOW. - this property is valid for max20024 only. - -For DT binding details of different sub modules like GPIO, pincontrol, -regulator, power, please refer respective device-tree binding document -under their respective sub-system directories. - -Example: --------- -#include - -max77620@3c { - compatible =3D "maxim,max77620"; - reg =3D <0x3c>; - - interrupt-parent =3D <&intc>; - interrupts =3D <0 86 IRQ_TYPE_NONE>; - - interrupt-controller; - #interrupt-cells =3D <2>; - - fps { - fps0 { - maxim,shutdown-fps-time-period-us =3D <1280>; - maxim,fps-event-source =3D ; - }; - - fps1 { - maxim,shutdown-fps-time-period-us =3D <1280>; - maxim,fps-event-source =3D ; - }; - - fps2 { - maxim,shutdown-fps-time-period-us =3D <1280>; - maxim,fps-event-source =3D ; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml b/Do= cumentation/devicetree/bindings/mfd/maxim,max77620.yaml new file mode 100644 index 000000000000..42cbad56595f --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/maxim,max77620.yaml @@ -0,0 +1,422 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/maxim,max77620.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MAX77620 Power management IC from Maxim Semiconductor + +maintainers: + - Svyatoslav Ryhel + +properties: + compatible: + enum: + - maxim,max20024 + - maxim,max77620 + - maxim,max77663 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + gpio-controller: true + + "#gpio-cells": + const: 2 + description: + Device has 8 GPIO pins which can be configured as GPIO as well as + the special IO functions. The first cell is the pin number, and the + second cell is used to specify the gpio polarity (GPIO_ACTIVE_HIGH or + GPIO_ACTIVE_LOW). + + system-power-controller: true + + "#thermal-sensor-cells": + const: 0 + description: + Maxim Semiconductor MAX77620 supports alarm interrupts when its + die temperature crosses 120C and 140C. These threshold temperatures + are not configurable. Device does not provide the real temperature + of die other than just indicating whether temperature is above or + below threshold level. + + fps: + type: object + additionalProperties: false + description: | + The Flexible Power Sequencer (FPS) allows each regulator to power up + under hardware or software control. Additionally, each regulator can + power on independently or among a group of other regulators with an + adjustable power-up and power-down delays (sequencing). GPIO1, GPIO2, + and GPIO3 can be programmed to be part of a sequence allowing extern= al + regulators to be sequenced along with internal regulators. 32KHz clo= ck + can be programmed to be part of a sequence. + + The flexible sequencing structure consists of two hardware enable in= puts + (EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS= 2. + Each master sequencing timer is programmable through its configurati= on + register to have a hardware enable source (EN1 or EN2) or a software= enable + source (SW). When enabled/disabled, the master sequencing timer gene= rates + eight sequencing events on different time periods called slots. The = time + period between each event is programmable within the configuration r= egister. + Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible = power + sequence slave register which allows its enable source to be specifi= ed as + a flexible power sequencer timer or a software bit. When a FPS sourc= e of + regulators, GPIOs and clocks specifies the enable source to be a fle= xible + power sequencer, the power up and power down delays can be specified= in + the regulators, GPIOs and clocks flexible power sequencer configurat= ion + registers. + + When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz clo= ck + are set into following state at the sequencing event that corresponds + to its flexible sequencer configuration register. + + Sleep state: In this state, regulators, GPIOs and 32KHz clock get di= sabled + at the sequencing event. + Global Low Power Mode (GLPM): In this state, regulators are set in l= ow + power mode at the sequencing event. + + The configuration parameters of FPS is provided through sub-node "fp= s" + and their child for FPS specific. The child node name for FPS are "f= ps0", + "fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively. + + The FPS configurations like FPS source, power up and power down slot= s for + regulators, GPIOs and 32kHz clocks are provided in their respective + configuration nodes which is explained in respective sub-system DT + binding document. + + There is need for different FPS configuration parameters based on sy= stem + state like when system state changed from active to suspend or activ= e to + power off (shutdown). + + patternProperties: + "^fps[0-2]$": + type: object + additionalProperties: false + + properties: + maxim,fps-event-source: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + FPS event source like external hardware input to PMIC i.e. E= N0, EN1 + or software (SW). + + The macros are defined on dt-bindings/mfd/max77620.h for dif= ferent + control source. + - MAX77620_FPS_EVENT_SRC_EN0 for hardware input pin EN0. + - MAX77620_FPS_EVENT_SRC_EN1 for hardware input pin EN1. + - MAX77620_FPS_EVENT_SRC_SW for software control. + + maxim,shutdown-fps-time-period-us: + description: + FPS time period in microseconds when system enters in to shu= tdown state. + + maxim,suspend-fps-time-period-us: + description: + FPS time period in microseconds when system enters in to sus= pend state. + + maxim,device-state-on-disabled-event: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Describe the PMIC state when FPS event cleared (set to LOW) = whether it + should go to sleep state or low-power state. Following are v= alid values: + - MAX77620_FPS_INACTIVE_STATE_SLEEP to set the PMIC state = to sleep. + - MAX77620_FPS_INACTIVE_STATE_LOW_POWER to set the PMIC st= ate to low + power. + Absence of this property or other value will not change devi= ce state + when FPS event get cleared. + + maxim,power-ok-control: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Configure map power ok bit + + 1: Enables POK(Power OK) to control nRST_IO and GPIO1 POK fu= nction. + 0: Disables POK control. + + If property missing, do not configure MPOK bit. If POK mappi= ng is + enabled for GPIO1/nRST_IO then, GPIO1/nRST_IO pins are HIGH = only if + all rails that have POK control enabled are HIGH. If any of = the rails + goes down (which are enabled for POK control) then, GPIO1/nR= ST_IO + goes LOW. + enum: [0, 1] + + pinmux: + $ref: /schemas/pinctrl/maxim,max77620-pinctrl.yaml + + regulators: + $ref: /schemas/regulator/maxim,max77620-regulator.yaml + +allOf: + - if: + properties: + compatible: + contains: + enum: + - maxim,max20024 + - maxim,max77663 + then: + properties: + "#thermal-sensor-cells": false + fps: + patternProperties: + "^fps[0-2]$": + properties: + maxim,shutdown-fps-time-period-us: + enum: [20, 40, 80, 160, 320, 640, 1280, 2540] + maxim,suspend-fps-time-period-us: + enum: [20, 40, 80, 160, 320, 640, 1280, 2540] + maxim,power-ok-control: false + + - if: + properties: + compatible: + contains: + const: maxim,max77620 + then: + properties: + fps: + patternProperties: + "^fps[0-2]$": + properties: + maxim,shutdown-fps-time-period-us: + enum: [40, 80, 160, 320, 640, 1280, 2560, 5120] + maxim,suspend-fps-time-period-us: + enum: [40, 80, 160, 320, 640, 1280, 2560, 5120] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + pmic@3c { + compatible =3D "maxim,max77620"; + reg =3D <0x3c>; + + interrupts =3D ; + #interrupt-cells =3D <2>; + interrupt-controller; + + #gpio-cells =3D <2>; + gpio-controller; + + #thermal-sensor-cells =3D <0>; + + system-power-controller; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&max77620_default>; + + max77620_default: pinmux { + gpio0 { + pins =3D "gpio0"; + function =3D "gpio"; + }; + + gpio1 { + pins =3D "gpio1"; + function =3D "fps-out"; + maxim,active-fps-source =3D ; + }; + + gpio2 { + pins =3D "gpio2"; + function =3D "fps-out"; + maxim,active-fps-source =3D ; + }; + + gpio3 { + pins =3D "gpio3"; + function =3D "gpio"; + }; + + gpio4 { + pins =3D "gpio4"; + function =3D "32k-out1"; + }; + + gpio5_6 { + pins =3D "gpio5", "gpio6"; + function =3D "gpio"; + drive-push-pull =3D <1>; + }; + + gpio7 { + pins =3D "gpio7"; + function =3D "gpio"; + }; + }; + + fps { + fps0 { + maxim,shutdown-fps-time-period-us =3D <1280>; + maxim,fps-event-source =3D ; + }; + + fps1 { + maxim,shutdown-fps-time-period-us =3D <1280>; + maxim,fps-event-source =3D ; + }; + + fps2 { + maxim,shutdown-fps-time-period-us =3D <1280>; + maxim,fps-event-source =3D ; + }; + }; + + regulators { + in-sd0-supply =3D <&vdd_5v0_vbus>; + in-sd1-supply =3D <&vdd_5v0_vbus>; + in-sd2-supply =3D <&vdd_5v0_vbus>; + in-sd3-supply =3D <&vdd_5v0_vbus>; + + in-ldo0-1-supply =3D <&vdd_1v8_vio>; + in-ldo2-supply =3D <&vdd_3v3_vbat>; + in-ldo3-5-supply =3D <&vdd_3v3_vbat>; + in-ldo4-6-supply =3D <&vdd_3v3_vbat>; + in-ldo7-8-supply =3D <&vdd_1v8_vio>; + + sd0 { + regulator-name =3D "vdd_cpu"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <1250000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + sd1 { + regulator-name =3D "vdd_core"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <1350000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + vdd_1v8_vio: sd2 { + regulator-name =3D "vdd_1v8_gen"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + sd3 { + regulator-name =3D "vddio_ddr"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + ldo0 { + regulator-name =3D "avdd_pll"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + ldo1 { + regulator-name =3D "vdd_ddr_hs"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1000000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + ldo2 { + regulator-name =3D "avdd_usb"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + maxim,active-fps-source =3D ; + }; + + ldo3 { + regulator-name =3D "vdd_sdmmc3"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-always-on; + + maxim,active-fps-source =3D ; + }; + + ldo4 { + regulator-name =3D "vdd_rtc"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + ldo5 { + regulator-name =3D "vdd_ddr_rx"; + regulator-min-microvolt =3D <2850000>; + regulator-max-microvolt =3D <2850000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + ldo6 { + regulator-name =3D "avdd_osc"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + regulator-boot-on; + + maxim,active-fps-source =3D ; + }; + + ldo7 { + regulator-name =3D "vdd_1v2_mhl"; + regulator-min-microvolt =3D <1050000>; + regulator-max-microvolt =3D <1250000>; + + maxim,active-fps-source =3D ; + }; + + ldo8 { + regulator-name =3D "avdd_dsi_csi"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + + maxim,active-fps-source =3D ; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/thermal/max77620_thermal.txt= b/Documentation/devicetree/bindings/thermal/max77620_thermal.txt deleted file mode 100644 index 82ed5d487966..000000000000 --- a/Documentation/devicetree/bindings/thermal/max77620_thermal.txt +++ /dev/null @@ -1,70 +0,0 @@ -Thermal driver for MAX77620 Power management IC from Maxim Semiconductor. - -Maxim Semiconductor MAX77620 supports alarm interrupts when its -die temperature crosses 120C and 140C. These threshold temperatures -are not configurable. Device does not provide the real temperature -of die other than just indicating whether temperature is above or -below threshold level. - -Required properties: -------------------- -#thermal-sensor-cells: For more details, please refer to - - The value must be 0. - -For more details, please refer generic thermal DT binding document -. - -Please refer for mfd DT binding -document for the MAX77620. - -Example: --------- -#include -#include -... - -i2c@7000d000 { - spmic: max77620@3c { - compatible =3D "maxim,max77620"; - ::::: - #thermal-sensor-cells =3D <0>; - ::: - }; -}; - -cool_dev: cool-dev { - compatible =3D "cooling-dev"; - #cooling-cells =3D <2>; -}; - -thermal-zones { - PMIC-Die { - polling-delay =3D <0>; - polling-delay-passive =3D <0>; - thermal-sensors =3D <&spmic>; - - trips { - pmic_die_warn_temp_thresh: hot-die { - temperature =3D <120000>; - type =3D "hot"; - hysteresis =3D <0>; - }; - - pmic_die_cirt_temp_thresh: cirtical-die { - temperature =3D <140000>; - type =3D "critical"; - hysteresis =3D <0>; - }; - }; - - cooling-maps { - map0 { - trip =3D <&pmic_die_warn_temp_thresh>; - cooling-device =3D <&cool_dev THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution =3D <100>; - }; - }; - }; -}; --=20 2.51.0