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charset="utf-8" Enable QPIC SPI NAND flash controller support on the IPQ5332 reference design platform. Reviewed-by: Konrad Dybcio Signed-off-by: Md Sadre Alam --- Change in [v6] * Squash the eMMC removal changes Change in [v5] * No change Change in [v4] * No change Change in [v3] * Added Reviewed-by tag Change in [v2] * No change Change in [v1] .../boot/dts/qcom/ipq5332-rdp-common.dtsi | 44 +++++++++++++++++++ arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts | 34 -------------- 2 files changed, 44 insertions(+), 34 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi b/arch/arm64/= boot/dts/qcom/ipq5332-rdp-common.dtsi index b37ae7749083..8967861be5fd 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi @@ -78,4 +78,48 @@ gpio_leds_default: gpio-leds-default-state { drive-strength =3D <8>; bias-pull-down; }; + + qpic_snand_default_state: qpic-snand-default-state { + clock-pins { + pins =3D "gpio13"; + function =3D "qspi_clk"; + drive-strength =3D <8>; + bias-disable; + }; + + cs-pins { + pins =3D "gpio12"; + function =3D "qspi_cs"; + drive-strength =3D <8>; + bias-disable; + }; + + data-pins { + pins =3D "gpio8", "gpio9", "gpio10", "gpio11"; + function =3D "qspi_data"; + drive-strength =3D <8>; + bias-disable; + }; + }; +}; + +&qpic_bam { + status =3D "okay"; +}; + +&qpic_nand { + pinctrl-0 =3D <&qpic_snand_default_state>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + flash@0 { + compatible =3D "spi-nand"; + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + nand-ecc-engine =3D <&qpic_nand>; + nand-ecc-strength =3D <4>; + nand-ecc-step-size =3D <512>; + }; }; diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts b/arch/arm64/boot/= dts/qcom/ipq5332-rdp442.dts index ed8a54eb95c0..6e2abde9ed89 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts @@ -35,17 +35,6 @@ flash@0 { }; }; =20 -&sdhc { - bus-width =3D <4>; - max-frequency =3D <192000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-0 =3D <&sdc_default_state>; - pinctrl-names =3D "default"; - status =3D "okay"; -}; - &tlmm { i2c_1_pins: i2c-1-state { pins =3D "gpio29", "gpio30"; @@ -54,29 +43,6 @@ i2c_1_pins: i2c-1-state { bias-pull-up; }; =20 - sdc_default_state: sdc-default-state { - clk-pins { - pins =3D "gpio13"; - function =3D "sdc_clk"; - drive-strength =3D <8>; - bias-disable; - }; - - cmd-pins { - pins =3D "gpio12"; - function =3D "sdc_cmd"; - drive-strength =3D <8>; - bias-pull-up; - }; - - data-pins { - pins =3D "gpio8", "gpio9", "gpio10", "gpio11"; - function =3D "sdc_data"; - drive-strength =3D <8>; - bias-pull-up; - }; - }; - spi_0_data_clk_pins: spi-0-data-clk-state { pins =3D "gpio14", "gpio15", "gpio16"; function =3D "blsp0_spi"; --=20 2.34.1