From nobody Thu Apr 9 19:21:02 2026 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B35AC378D71; Fri, 6 Mar 2026 07:55:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772783741; cv=none; b=UtulPP5tdXw7bdUCOPYEw0YRx1DP/ELgDwXPpoSlXoWdg6HJ1KDtn3KwBRT6jxn5RuUR39+KyHdoprnlt9Yf6DNPwEBbOlhlQGyYw/fMBhbSOOy4H0nEAR7BeAlx+uJdwDuqmA7tjfoUDxgeB/zhaq+zCFGRj38j+sKrC08ZH7Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772783741; c=relaxed/simple; bh=pQYxHoI8rATXbQ6bN7Xuu1ElfXD2Vud0syGkJjISLrg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mDswIoFzLhZG/nb4zGqAFz9QQMZu6CBFbLIh7C9OOioQc9mk8o4j8gWIZLoZVzoFBls2NGYNb+sq7ZHDwg29lRrK/HJ761cE5zY84AKRHRwSepv87g0PnWyEU8FGMAOjj5us2WKofVBFpLneqz5yqowOsky/gDOhs2RpTMwlhQc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b=gkNeZCYK; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b="gkNeZCYK" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 6267qkunF2977157, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim; t=1772783566; bh=fqong6ONpLV7i4pGQx7rPiXI4yfULcIEHX9UrfhOolE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=gkNeZCYKpgdHd0vqbMG7lRGCvKE8g34E5N8OPNrA7k4ttWahPbyGPMcszVf3ClWqm gjusY4q8pN1GlsPuDcIFglvuACMW/kkbppEVfpWHx8M4ZDExwSWpfoOoCpuzVOBdRg AbdQPO8h/ObMA+n+USgCkKsn98QeH1ZmDz++B6DmTB3noZCoiNkm3jV7Fal1fupEdZ HsJzShQQGdVLh6WtC/aGEQ2Xgs3Vl6MZh7dzFoe7BjfqLFQ5faZwLPEKCqf7HK8SuD AGlyEd7CjVkrU/vjOA7JeYf6rEw92bNC7l4/fl/EOFHc8f5HH7k/zoJbUYvo9K4Z+q JxjOUKJ1QUUVg== Received: from mail.realtek.com (rtkexhmbs02.realtek.com.tw[172.21.6.41]) by rtits2.realtek.com.tw (8.15.2/3.21/5.94) with ESMTPS id 6267qkunF2977157 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 6 Mar 2026 15:52:46 +0800 Received: from RTKEXHMBS06.realtek.com.tw (10.21.1.56) by RTKEXHMBS02.realtek.com.tw (172.21.6.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Fri, 6 Mar 2026 15:52:46 +0800 Received: from cn1dhc-k02 (172.21.252.101) by RTKEXHMBS06.realtek.com.tw (10.21.1.56) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Fri, 6 Mar 2026 15:52:46 +0800 From: Yu-Chun Lin To: , , , , , CC: , , , , , , , , , Subject: [PATCH v2 05/14] pinctrl: realtek: Fix grammar in error messages Date: Fri, 6 Mar 2026 15:52:35 +0800 Message-ID: <20260306075244.1170399-6-eleanor.lin@realtek.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260306075244.1170399-1-eleanor.lin@realtek.com> References: <20260306075244.1170399-1-eleanor.lin@realtek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Correct the grammar in dev_err() messages. Change "Not support ..." to " unsupported..." to improve readability and comply with standard English usage. Signed-off-by: Yu-Chun Lin --- drivers/pinctrl/realtek/pinctrl-rtd.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/realtek/pinctrl-rtd.c b/drivers/pinctrl/realte= k/pinctrl-rtd.c index 382bdae54bf3..5888a36babba 100644 --- a/drivers/pinctrl/realtek/pinctrl-rtd.c +++ b/drivers/pinctrl/realtek/pinctrl-rtd.c @@ -293,14 +293,14 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *d= ata, =20 config_desc =3D rtd_pinctrl_find_config(data, pinnr); if (!config_desc) { - dev_err(data->dev, "Not support pin config for pin: %s\n", name); + dev_err(data->dev, "Pin config unsupported for pin: %s\n", name); return -ENOTSUPP; } switch ((u32)param) { case PIN_CONFIG_INPUT_SCHMITT: case PIN_CONFIG_INPUT_SCHMITT_ENABLE: if (config_desc->smt_offset =3D=3D NA) { - dev_err(data->dev, "Not support input schmitt for pin: %s\n", name); + dev_err(data->dev, "Input schmitt unsupported for pin: %s\n", name); return -ENOTSUPP; } smt_off =3D config_desc->base_bit + config_desc->smt_offset; @@ -313,7 +313,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, =20 case PIN_CONFIG_DRIVE_PUSH_PULL: if (config_desc->pud_en_offset =3D=3D NA) { - dev_err(data->dev, "Not support push pull for pin: %s\n", name); + dev_err(data->dev, "Push pull unsupported for pin: %s\n", name); return -ENOTSUPP; } pulen_off =3D config_desc->base_bit + config_desc->pud_en_offset; @@ -325,7 +325,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, =20 case PIN_CONFIG_BIAS_DISABLE: if (config_desc->pud_en_offset =3D=3D NA) { - dev_err(data->dev, "Not support bias disable for pin: %s\n", name); + dev_err(data->dev, "Bias disable unsupported for pin: %s\n", name); return -ENOTSUPP; } pulen_off =3D config_desc->base_bit + config_desc->pud_en_offset; @@ -337,7 +337,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, =20 case PIN_CONFIG_BIAS_PULL_UP: if (config_desc->pud_en_offset =3D=3D NA) { - dev_err(data->dev, "Not support bias pull up for pin:%s\n", name); + dev_err(data->dev, "Bias pull up unsupported for pin:%s\n", name); return -ENOTSUPP; } pulen_off =3D config_desc->base_bit + config_desc->pud_en_offset; @@ -350,7 +350,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, =20 case PIN_CONFIG_BIAS_PULL_DOWN: if (config_desc->pud_en_offset =3D=3D NA) { - dev_err(data->dev, "Not support bias pull down for pin: %s\n", name); + dev_err(data->dev, "Bias pull down unsupported for pin: %s\n", name); return -ENOTSUPP; } pulen_off =3D config_desc->base_bit + config_desc->pud_en_offset; @@ -384,7 +384,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, return -EINVAL; break; case NA: - dev_err(data->dev, "Not support drive strength for pin: %s\n", name); + dev_err(data->dev, "Drive strength unsupported for pin: %s\n", name); return -ENOTSUPP; default: return -EINVAL; @@ -394,7 +394,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, =20 case PIN_CONFIG_POWER_SOURCE: if (config_desc->power_offset =3D=3D NA) { - dev_err(data->dev, "Not support power source for pin: %s\n", name); + dev_err(data->dev, "Power source unsupported for pin: %s\n", name); return -ENOTSUPP; } reg_off =3D config_desc->reg_offset; @@ -411,7 +411,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, case RTD_DRIVE_STRENGH_P: sconfig_desc =3D rtd_pinctrl_find_sconfig(data, pinnr); if (!sconfig_desc) { - dev_err(data->dev, "Not support P driving for pin: %s\n", name); + dev_err(data->dev, "P driving unsupported for pin: %s\n", name); return -ENOTSUPP; } set_val =3D arg; @@ -428,7 +428,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, case RTD_DRIVE_STRENGH_N: sconfig_desc =3D rtd_pinctrl_find_sconfig(data, pinnr); if (!sconfig_desc) { - dev_err(data->dev, "Not support N driving for pin: %s\n", name); + dev_err(data->dev, "N driving unsupported for pin: %s\n", name); return -ENOTSUPP; } set_val =3D arg; @@ -445,7 +445,7 @@ static int rtd_pconf_parse_conf(struct rtd_pinctrl *dat= a, case RTD_DUTY_CYCLE: sconfig_desc =3D rtd_pinctrl_find_sconfig(data, pinnr); if (!sconfig_desc || sconfig_desc->dcycle_offset =3D=3D NA) { - dev_err(data->dev, "Not support duty cycle for pin: %s\n", name); + dev_err(data->dev, "Duty cycle unsupported for pin: %s\n", name); return -ENOTSUPP; } set_val =3D arg; --=20 2.34.1