From nobody Thu Apr 9 20:24:30 2026 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69DA134B662 for ; Thu, 5 Mar 2026 21:04:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772744663; cv=none; b=O4OQvBDFcSuaL5uXoFudOR/R5gVLUjSkaHIFmuvvTw7Q89Pung5aoGpDIjhfJwY/Yb2giIks0w8kI/3U5sXMLWqGymnmDh/9QtKmh1aGb/65EvJOOKikNpzGQL2qeLBjKEC8jKPYveWBGHf61Uqhuj/K5Eq22RX0RRst030jseg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772744663; c=relaxed/simple; bh=RrTc5ZHztUuUqkH+At+TJQt4NUn4orTcyqFWueIoEvM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=mMb3hqDR4FyzyMuMMyRjYWaKF3sY4i9uNOB81i/4W7DsooXojUnP0jQ0/4w3dflkOQC2c502lazWBoO9bvpNj2VrhkGyskL3df2H9sR5mHyi95oFiMdHV3RAdrckXbn/maNbhrkUYFaoOYDyWTAX7/SoZeF5hx8nM0vVNGjeGp0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=WZub/Hd8; arc=none smtp.client-ip=209.85.210.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WZub/Hd8" Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-8272a56b91cso7164772b3a.1 for ; Thu, 05 Mar 2026 13:04:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1772744662; x=1773349462; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=PFqSaEYNCjidkzwHN5ZnhX/rwyXadMMMmVhe1scX/pA=; b=WZub/Hd896c+918E7xmFYVjPMWf2xXQndxomZz1rb+ZvtM45RwlPvQVxG0Hh2BYEe9 N0Mioi+RlV+9+3U67mbk8JUN39xKZCKPpI1voFPlliSGVSd10iMsqDPraBoBUAvv2LvD P3sIEHxOF+wUK60kPkzz2RdPFhCcaAiWcbfp4qBCUaNNJE+U/7VDKMxfz2mo+0aS9mOU D8fc+iR8Jt2aF/90sXKALk66IelWomDxC2tHI8+EASM90y5NNdXeYtMxsCStxDnbwZ2F ceFtmCYr4l1FnX3uBm6NNLymReAyDAef2sAE6/b41m3AtxpY2pjOMa2EJljdkQP0rERs PhYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772744662; x=1773349462; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=PFqSaEYNCjidkzwHN5ZnhX/rwyXadMMMmVhe1scX/pA=; b=E8fzDaACwTHUJMQ9tslplXiJvcnmLmonNFnQ+KrbYuqIxvlYHGyqcZ7ErmEinuKoXp o2bb6Yvx6kw6uW0GTXo2lwIGKrAR0RQDSZxE8mNPUIAfGhW9jbLLqxuzcMAWPB/hmQ/t up7WhG3XI0/pAVHDcdRLVlbyt9egdo8/C27PyTSS5HT3OWByIkogOHhltEVNflDLv39t wOgtTCG41jSI1qQ+yf1ZiMMt7kM2641NwbE/qZrmdjeQFhXpb5rcXBQ71kduhH2oePUA I2wZXFBNjs0v0gu3R6STQtSXV0BbHU76ix8pN9wzhgxsMLfq8Z1YQoqx5/CsKRCD2LPr oswA== X-Forwarded-Encrypted: i=1; AJvYcCXhLmC4TWJuPr0RD5bRHlWMdJDfsJARRvJFeE+QTh/b4f5EfQs352DwbyHbViUwNKJMhLZwi8gVpaXHN88=@vger.kernel.org X-Gm-Message-State: AOJu0YyTBr9XCynx11Iyz2/i1fQofR23fiMUFMJsjtpi8swuk8Z2s8SM cjY3Gf7ed5rNjK1sWwHC06GIN9xC0WSbhuMpvkHKFtKB6xBBp56Mq/aY X-Gm-Gg: ATEYQzw9VhHFLlVGMoFqkLxMTBqKox7vZdYLmA2rZtQssJ5a5oamzKMUpWmGh2j8IOW +dEXNWMMLDjmc6S2tf/P3V2PPfhdpRQ/xRU9MqydfKBCNu5x3fVtqdemc5FZ8DSd+eS8mxnqy/D 8bbiNyhjlBq7TAAlkGpEtzQXxaKe7fwHSTWrX66qbDs7GZF70/2/D0LcBLvVfVbEl4XuLwFsyMH nlRjgLSTDvOS16idN8ZtcqFMJdL2ADp29HJGhZvS98ssSR5QZ+bIkGajbWkYpcIjEDgaMz4fOPG ImKJvJ+SdBow72MpUcgXrJ32b68ltN/JSGAUOpJMsVSa0JkX667aYWCUncvS+Y2GcCFzRPf7zWM QoiKcAy4rvl+1w3qtN1kWVK92b3XwoRbeYm929TvL4mnsyVUYpEmtEUo7HN4sP6NYShRB5DB3v8 t6v2OBeJSghA087/6JXGf9KLAH X-Received: by 2002:a05:6a00:1c9a:b0:829:9130:e698 with SMTP id d2e1a72fcca58-8299130ecb8mr1738523b3a.64.1772744661731; Thu, 05 Mar 2026 13:04:21 -0800 (PST) Received: from arch ([2409:40c2:542d:796b:d56f:9c25:f250:525e]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8273a05c0b0sm21854421b3a.61.2026.03.05.13.04.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Mar 2026 13:04:20 -0800 (PST) From: Bhargav Joshi To: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org Cc: dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, rougueprince47@gmail.com, linux-staging@lists.linux.dev Subject: [RFC PATCH] staging: iio: ad9832: modernize ABI and remove dds.h dependency Date: Fri, 6 Mar 2026 02:33:47 +0530 Message-ID: <20260305210347.120446-1-rougueprince47@gmail.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The AD9832 driver currently relies on legacy custom IIO macros defined in dds.h. This triggers checkpatch.pl warnings (NON_OCTAL_PERMISSIONS) and, more importantly, exposes a non-standard sysfs ABI (e.g., frequency0, frequency1, phase0-3) directly to user space. This patch removes the custom macros and migrates the driver to standard IIO API mechanisms: - Standard attributes (frequency, phase) now use info_mask_separate. - Non standard specific toggles (frequencysymbol, phasesymbol, pincontrol) have been migrated to an ext_info array. - Remove dds.h header dependency. - Pointless frequency_scale and phase_scale attributes are dropped as suggested by Jonathan in https://lore.kernel.org/linux-iio/20251231180939.422e9e62@jic23-huawei/ NOTE: This patch introduces an intentional ABI changes. The non-standard attributes (out_altvoltage0_frequency0, etc.) have been removed. They are replaced by standard attributes (out_altvoltage0_frequency and out_altvoltage0_phase). Routing to correct register while writing is handled by checking currently active frequencysymbol or phasesymbol. Testing: This patch has been strictly compile-tested. I do not have access to physical AD9832 hardware. I am submitting this as an RFC to see if these changes are acceptable, and to ask if someone with physical hardware could test thisg and provide a Tested-by tag. Signed-off-by: Bhargav Joshi --- This patch is heavily inspired from discussions in following thread. https://lore.kernel.org/linux-iio/20251215190806.11003-1-tomasborquez13@gma= il.com/ Since this is an RFC please let me know if these changes are acceptable. drivers/staging/iio/frequency/ad9832.c | 135 +++++++++++++++---------- 1 file changed, 80 insertions(+), 55 deletions(-) diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/f= requency/ad9832.c index b87ea1781b27..066a1b9ee8d5 100644 --- a/drivers/staging/iio/frequency/ad9832.c +++ b/drivers/staging/iio/frequency/ad9832.c @@ -23,8 +23,6 @@ #include #include =20 -#include "dds.h" - /* Registers */ #define AD9832_FREQ0LL 0x0 #define AD9832_FREQ0HL 0x1 @@ -168,12 +166,63 @@ static int ad9832_write_phase(struct ad9832_state *st, return spi_sync(st->spi, &st->phase_msg); } =20 -static ssize_t ad9832_write(struct device *dev, struct device_attribute *a= ttr, - const char *buf, size_t len) +static int ad9832_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad9832_state *st =3D iio_priv(indio_dev); + int ret; + unsigned int addr; + + if (val < 0) + return -EINVAL; + + mutex_lock(&st->lock); + switch (mask) { + case IIO_CHAN_INFO_FREQUENCY: + if (st->ctrl_fp & AD9832_FREQ) + addr =3D AD9832_FREQ1HM; + else + addr =3D AD9832_FREQ0HM; + + ret =3D ad9832_write_frequency(st, addr, val); + break; + + case IIO_CHAN_INFO_PHASE: + switch (FIELD_GET(AD9832_PHASE_MASK, st->ctrl_fp)) { + case 0: + addr =3D AD9832_PHASE0H; + break; + case 1: + addr =3D AD9832_PHASE1H; + break; + case 2: + addr =3D AD9832_PHASE2H; + break; + case 3: + addr =3D AD9832_PHASE3H; + break; + default: + addr =3D AD9832_PHASE0H; + break; + } + ret =3D ad9832_write_phase(st, addr, val); + break; + + default: + ret =3D -EINVAL; + } + mutex_unlock(&st->lock); + + return ret; +} + +static ssize_t ad9832_write_ext_info(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) { - struct iio_dev *indio_dev =3D dev_to_iio_dev(dev); struct ad9832_state *st =3D iio_priv(indio_dev); - struct iio_dev_attr *this_attr =3D to_iio_dev_attr(attr); int ret; unsigned long val; =20 @@ -182,17 +231,7 @@ static ssize_t ad9832_write(struct device *dev, struct= device_attribute *attr, goto error_ret; =20 mutex_lock(&st->lock); - switch ((u32)this_attr->address) { - case AD9832_FREQ0HM: - case AD9832_FREQ1HM: - ret =3D ad9832_write_frequency(st, this_attr->address, val); - break; - case AD9832_PHASE0H: - case AD9832_PHASE1H: - case AD9832_PHASE2H: - case AD9832_PHASE3H: - ret =3D ad9832_write_phase(st, this_attr->address, val); - break; + switch ((u32)private) { case AD9832_PINCTRL_EN: st->ctrl_ss &=3D ~AD9832_SELSRC; st->ctrl_ss |=3D FIELD_PREP(AD9832_SELSRC, val ? 0 : 1); @@ -245,50 +284,34 @@ static ssize_t ad9832_write(struct device *dev, struc= t device_attribute *attr, return ret ? ret : len; } =20 -/* - * see dds.h for further information - */ +#define AD9832_EXT_INFO(_name, _ident) { \ + .name =3D _name, \ + .write =3D ad9832_write_ext_info, \ + .private =3D _ident, \ + .shared =3D IIO_SEPARATE, \ +} =20 -static IIO_DEV_ATTR_FREQ(0, 0, 0200, NULL, ad9832_write, AD9832_FREQ0HM); -static IIO_DEV_ATTR_FREQ(0, 1, 0200, NULL, ad9832_write, AD9832_FREQ1HM); -static IIO_DEV_ATTR_FREQSYMBOL(0, 0200, NULL, ad9832_write, AD9832_FREQ_SY= M); -static IIO_CONST_ATTR_FREQ_SCALE(0, "1"); /* 1Hz */ - -static IIO_DEV_ATTR_PHASE(0, 0, 0200, NULL, ad9832_write, AD9832_PHASE0H); -static IIO_DEV_ATTR_PHASE(0, 1, 0200, NULL, ad9832_write, AD9832_PHASE1H); -static IIO_DEV_ATTR_PHASE(0, 2, 0200, NULL, ad9832_write, AD9832_PHASE2H); -static IIO_DEV_ATTR_PHASE(0, 3, 0200, NULL, ad9832_write, AD9832_PHASE3H); -static IIO_DEV_ATTR_PHASESYMBOL(0, 0200, NULL, - ad9832_write, AD9832_PHASE_SYM); -static IIO_CONST_ATTR_PHASE_SCALE(0, "0.0015339808"); /* 2PI/2^12 rad*/ - -static IIO_DEV_ATTR_PINCONTROL_EN(0, 0200, NULL, - ad9832_write, AD9832_PINCTRL_EN); -static IIO_DEV_ATTR_OUT_ENABLE(0, 0200, NULL, - ad9832_write, AD9832_OUTPUT_EN); - -static struct attribute *ad9832_attributes[] =3D { - &iio_dev_attr_out_altvoltage0_frequency0.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_frequency1.dev_attr.attr, - &iio_const_attr_out_altvoltage0_frequency_scale.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase0.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase1.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase2.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phase3.dev_attr.attr, - &iio_const_attr_out_altvoltage0_phase_scale.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_pincontrol_en.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_frequencysymbol.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_phasesymbol.dev_attr.attr, - &iio_dev_attr_out_altvoltage0_out_enable.dev_attr.attr, - NULL, +static const struct iio_chan_spec_ext_info ad9832_ext_info[] =3D { + AD9832_EXT_INFO("pincontrol_en", AD9832_PINCTRL_EN), + AD9832_EXT_INFO("frequencysymbol", AD9832_FREQ_SYM), + AD9832_EXT_INFO("phasesymbol", AD9832_PHASE_SYM), + AD9832_EXT_INFO("out_enable", AD9832_OUTPUT_EN), + { } }; =20 -static const struct attribute_group ad9832_attribute_group =3D { - .attrs =3D ad9832_attributes, +static const struct iio_chan_spec ad9832_channels[] =3D { + { + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 0, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_FREQUENCY) | + BIT(IIO_CHAN_INFO_PHASE), + .ext_info =3D ad9832_ext_info, + }, }; =20 static const struct iio_info ad9832_info =3D { - .attrs =3D &ad9832_attribute_group, + .write_raw =3D ad9832_write_raw, }; =20 static int ad9832_probe(struct spi_device *spi) @@ -321,6 +344,8 @@ static int ad9832_probe(struct spi_device *spi) indio_dev->name =3D spi_get_device_id(spi)->name; indio_dev->info =3D &ad9832_info; indio_dev->modes =3D INDIO_DIRECT_MODE; + indio_dev->channels =3D ad9832_channels; + indio_dev->num_channels =3D ARRAY_SIZE(ad9832_channels); =20 /* Setup default messages */ st->xfer.tx_buf =3D &st->data; --=20 2.53.0