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Thu, 5 Mar 2026 13:58:33 -0600 From: Sen Wang To: , , , , , , CC: , , , , Sen Wang Subject: [PATCH 2/2] ASoC: ti: davinci-mcasp: improve aux_div selection for mid-range dividers Date: Thu, 5 Mar 2026 13:58:25 -0600 Message-ID: <20260305195825.9998-3-sen@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260305195825.9998-1-sen@ti.com> References: <20260305195825.9998-1-sen@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0001709A:EE_|BL3PR10MB6113:EE_ X-MS-Office365-Filtering-Correlation-Id: efd241c5-d8d0-47b8-4198-08de7af198b7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|34020700016|1800799024|36860700016|82310400026|376014|12100799066; X-Microsoft-Antispam-Message-Info: kpi/OG3B2NYGdj/KIQA/SbUEyztWInBUtjMgLQVDJgbTIGO+ob1ug4e+M3VzhK7OAjQatvkCqiBisTq8SwoVB4y6HOtoZc7zP6Xst0H52Jpgug6WJvUkzaBkzw9zXBqqR6tMNeoN8bv6S4ZZsnVetgk7RUqU3aN5x2zJVulqwZZtrAFrV71r0+yUjOhIM2VV4lFEljiikYtgnzw/YPDByifacTiVM9bA7Ig8U1AHWIAzeRCQkrfPextT+Mq6DGkor8LYZIWOpcwjkj11an5gCizcwxRf/h1jP8Ygcno4QGHa1s1WvTz6WN08gHkPOi2qASxAiHT4n0MTJHzRVx/jyTPPM6c7x9Isp56MOnxf3uqXsTNJALunRWRX5shAflKXe1XhA9mS09ID/EFSBm0tx4qTPVMhQIo1Mj/k3ITGWnGquL0pkbbJ+L5S8H/dOP1XOl8LkaSvNmuDyW7liGeMYGMwL19qXu/ArkPmo2iNffMLFKticueEo6x60YIvK2ZFKOvV+l11+mlIcO+M4LLUj4aoiXEKhIStcyFgYKjl3TVYOFfAp2RlC9IKVOzAcKR5K+of0oQdBl8Ed/NSBiB/WkqnkhbXPVMPbcWAEZITyd2xu4Njk/YCG3XeJ8xl4AVDasp4eNfUxltdyIyqXis3BoGD+iwy5EtGdTDVAN9EfNcGpuCEBR9E0d5HZaSAeBoCeF8R4/Ih1sEVkIxworA1UXxAoiz3p3JWphRl+m2Tv6yxyF65NbwPkMAvLMxq+f2yMpawgYodw3TJvOvB3IQvsQ== X-Forefront-Antispam-Report: CIP:198.47.21.195;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:flwvzet201.ext.ti.com;PTR:ErrorRetry;CAT:NONE;SFS:(13230040)(34020700016)(1800799024)(36860700016)(82310400026)(376014)(12100799066);DIR:OUT;SFP:1501; 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charset="utf-8" When the ideal total divider (sysclk/bclk) is between 33 and 4096 and AUXCLK is enabled, the driver computes aux_div as ceil(div/32) and then recomputes bclk_div from the truncated sysclk. This two-step integer division loses precision due to truncation and can sometimes produce PPM errors large enough for ALSA's hw_rule_format to reject otherwise valid sample formats. For example, on AM62D-EVM (auxclk-fs-ratio=3D2177, tdm-slots=3D2, fck=3D96 = MHz), playing S16_LE at 44100 Hz gives BCLK =3D 1,411,200 Hz and an ideal total divider of 68. The old code picks aux_div =3D ceil(68/32) =3D 3, then bclk_div =3D (96005700/3) / 1411200 =3D 22, for a total of 3 x 22 =3D 66 -- two steps from ideal. The resulting error exceeds the PPM threshold and causes S16_LE, S24_LE to be rejected. Therefore when the total divider fits in the AHCLKXDIV register alone (<=3D4096), use it directly as aux_div with bclk_div=3D1, and compare floor and ceil to pick the closer match, to ensure the best ideal total dividers. Dividers at or below 32 never enter this path, and dividers above 4096 still fall through to the existing DIV_ROUND_UP path, so previously working configurations remains unaffected. Signed-off-by: Sen Wang --- sound/soc/ti/davinci-mcasp.c | 34 ++++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/sound/soc/ti/davinci-mcasp.c b/sound/soc/ti/davinci-mcasp.c index 6d0310f09b12..800c383ed2e1 100644 --- a/sound/soc/ti/davinci-mcasp.c +++ b/sound/soc/ti/davinci-mcasp.c @@ -1358,19 +1358,29 @@ static int davinci_mcasp_calc_clk_div(struct davinc= i_mcasp *mcasp, auxclk_div_id =3D MCASP_CLKDIV_AUXCLK; } =20 - if (div > (ACLKXDIV_MASK + 1)) { - if (auxclk_enabled) { - aux_div =3D div / (ACLKXDIV_MASK + 1); - if (div % (ACLKXDIV_MASK + 1)) - aux_div++; - - sysclk_freq /=3D aux_div; - div =3D sysclk_freq / bclk_freq; - rem =3D sysclk_freq % bclk_freq; - } else if (set) { - dev_warn(mcasp->dev, "Too fast reference clock (%u)\n", - sysclk_freq); + if (div > (ACLKXDIV_MASK + 1) && auxclk_enabled) { + if (div <=3D (AHCLKXDIV_MASK + 1)) { + /* aux_div absorbs entire division; bclk_div =3D 1 */ + aux_div =3D div; + if ((div + 1) <=3D (AHCLKXDIV_MASK + 1)) { + unsigned int err_lo =3D sysclk_freq / div - + bclk_freq; + unsigned int err_hi =3D bclk_freq - + sysclk_freq / (div + 1); + + if (err_hi < err_lo) + aux_div =3D div + 1; + } + } else { + aux_div =3D DIV_ROUND_UP(div, ACLKXDIV_MASK + 1); } + + sysclk_freq /=3D aux_div; + div =3D sysclk_freq / bclk_freq; + rem =3D sysclk_freq % bclk_freq; + } else if (div > (ACLKXDIV_MASK + 1) && set) { + dev_warn(mcasp->dev, "Too fast reference clock (%u)\n", + sysclk_freq); } =20 if (rem !=3D 0) { --=20 2.43.0