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charset="utf-8" From: Suma Hegde The new messages extend the HSMP interface to provide finer control over power states and system monitoring capabilities. Power state control: - Get/Set PC6 and CC6 enable/disable control (0x29, 0x2A) Power and thermal monitoring: - Get CCD power consumption reading (0x34) - Get Thermal delta (Tdelta) reading (0x35) - Get SVI3 VR controller temperature (0x36) DIMM sideband operations: - Get/Set DIMM sideband data(0x33, 0x39) Power management: - Get/Set Floor limit control (0x38) - Get/Set SDPS limit control (0x3A) System capabilities: - Get enabled HSMP commands (0x37) Bump driver version to 2.6. Co-developed-by: Muthusamy Ramalingam Signed-off-by: Muthusamy Ramalingam Signed-off-by: Suma Hegde --- arch/x86/include/uapi/asm/amd_hsmp.h | 142 +++++++++++++++++++++++---- drivers/platform/x86/amd/hsmp/hsmp.h | 2 +- 2 files changed, 126 insertions(+), 18 deletions(-) diff --git a/arch/x86/include/uapi/asm/amd_hsmp.h b/arch/x86/include/uapi/a= sm/amd_hsmp.h index 92d8f256d096..603d62f8d4da 100644 --- a/arch/x86/include/uapi/asm/amd_hsmp.h +++ b/arch/x86/include/uapi/asm/amd_hsmp.h @@ -53,9 +53,19 @@ enum hsmp_message_ids { HSMP_SET_XGMI_PSTATE_RANGE, /* 26h Set xGMI P-state range */ HSMP_CPU_RAIL_ISO_FREQ_POLICY, /* 27h Get/Set Cpu Iso frequency policy */ HSMP_DFC_ENABLE_CTRL, /* 28h Enable/Disable DF C-state */ + HSMP_PC6_ENABLE, /* 29h Get/Set PC6 enable/disable status */ + HSMP_CC6_ENABLE, /* 2Ah Get/Set CC6 enable/disable status */ HSMP_GET_RAPL_UNITS =3D 0x30, /* 30h Get scaling factor for energy */ HSMP_GET_RAPL_CORE_COUNTER, /* 31h Get core energy counter value */ HSMP_GET_RAPL_PACKAGE_COUNTER, /* 32h Get package energy counter value */ + HSMP_DIMM_SB_RD, /* 33h Get data from a specified device o= n the DIMM */ + HSMP_READ_CCD_POWER, /* 34h Get the average power consumed by CCD */ + HSMP_READ_TDELTA, /* 35h Get thermal solution behaviour */ + HSMP_GET_SVI3_VR_CTRL_TEMP, /* 36h Get temperature of SVI3 VR controller = rails */ + HSMP_GET_ENABLED_HSMP_CMDS, /* 37h Get/Set supported HSMP commands */ + HSMP_SET_GET_FLOOR_LIMIT, /* 38h Get/Set supported Floor limit comm= ands */ + HSMP_DIMM_SB_WR, /* 39h Set data to a specified device on = the DIMM */ + HSMP_SDPS_LIMIT, /* 3Ah Get/Set SDPS limit */ HSMP_MSG_ID_MAX, }; =20 @@ -170,16 +180,18 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table= [] {0, 1, HSMP_GET}, =20 /* - * HSMP_SET_XGMI_LINK_WIDTH, num_args =3D 1, response_sz =3D 0 - * input: args[0] =3D min link width[15:8] + max link width[7:0] + * HSMP_SET_XGMI_LINK_WIDTH, num_args =3D 1, response_sz =3D 0/1 + * input: args[0] =3D set/get XGMI Link width[31] + min link width[15:8] = + max link width[7:0] + * output: args[0] =3D current min link width[15:8] + current max link wi= dth[7:0] */ - {1, 0, HSMP_SET}, + {1, 1, HSMP_SET_GET}, =20 /* - * HSMP_SET_DF_PSTATE, num_args =3D 1, response_sz =3D 0 - * input: args[0] =3D df pstate[7:0] + * HSMP_SET_DF_PSTATE, num_args =3D 1, response_sz =3D 0/1 + * input: args[0] =3D set/get df pstate[31] + df pstate[7:0] + * output: args[0] =3D APB enabled/disabled[8] + current df pstate[7:0] */ - {1, 0, HSMP_SET}, + {1, 1, HSMP_SET_GET}, =20 /* HSMP_SET_AUTO_DF_PSTATE, num_args =3D 0, response_sz =3D 0 */ {0, 0, HSMP_SET}, @@ -305,16 +317,18 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table= [] {1, 1, HSMP_SET}, =20 /* - * HSMP_SET_POWER_MODE, num_args =3D 1, response_sz =3D 0 - * input: args[0] =3D power efficiency mode[2:0] + * HSMP_SET_POWER_MODE, num_args =3D 1, response_sz =3D 0/1 + * input: args[0] =3D set/get power mode[31] + power efficiency mode[2:0] + * output: args[0] =3D current power efficiency mode[2:0] */ {1, 1, HSMP_SET_GET}, =20 /* - * HSMP_SET_PSTATE_MAX_MIN, num_args =3D 1, response_sz =3D 0 - * input: args[0] =3D min df pstate[15:8] + max df pstate[7:0] + * HSMP_SET_PSTATE_MAX_MIN, num_args =3D 1, response_sz =3D 0/1 + * input: args[0] =3D set/get DF P-state range[31] + min df pstate[15:8] = + max df pstate[7:0] + * output: args[0] =3D min df pstate[15:8] + max df pstate[7:0] */ - {1, 0, HSMP_SET}, + {1, 1, HSMP_SET_GET}, =20 /* * HSMP_GET_METRIC_TABLE_VER, num_args =3D 0, response_sz =3D 1 @@ -335,10 +349,12 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table= [] {0, 2, HSMP_GET}, =20 /* - * HSMP_SET_XGMI_PSTATE_RANGE, num_args =3D 1, response_sz =3D 0 - * input: args[0] =3D min xGMI p-state[15:8] + max xGMI p-state[7:0] + * HSMP_SET_XGMI_PSTATE_RANGE, num_args =3D 1, response_sz =3D 0/1 + * input: args[0] =3D set/get XGMI pstate range[31] + min xGMI p-state[15= :8] + + * max xGMI p-state[7:0] + * output: args[0] =3D min xGMI p-state[15:8] + max xGMI p-state[7:0] */ - {1, 0, HSMP_SET}, + {1, 1, HSMP_SET_GET}, =20 /* * HSMP_CPU_RAIL_ISO_FREQ_POLICY, num_args =3D 1, response_sz =3D 1 @@ -355,9 +371,21 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table[] */ {1, 1, HSMP_SET_GET}, =20 - /* RESERVED(0x29-0x2f) */ - {0, 0, HSMP_RSVD}, - {0, 0, HSMP_RSVD}, + /* + * HSMP_PC6_ENABLE, num_args =3D 1, response_sz =3D 0/1 + * input: args[0] =3D set/get PC6 control[31] + disable/enable PC6[0] + * output: args[0] =3D current PC6 control status[0] + */ + {1, 1, HSMP_SET_GET}, + + /* + * HSMP_CC6_ENABLE, num_args =3D 1, response_sz =3D 0/1 + * input: args[0] =3D set/get CC6 control[31] + disable/enable CC6[0] + * output: args[0] =3D current CC6 control status[0] + */ + {1, 1, HSMP_SET_GET}, + + /* RESERVED(0x2B-0x2F) */ {0, 0, HSMP_RSVD}, {0, 0, HSMP_RSVD}, {0, 0, HSMP_RSVD}, @@ -385,6 +413,86 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table[] */ {0, 2, HSMP_GET}, =20 + /* + * HSMP_DIMM_SB_RD, num_args =3D 1, response_sz =3D 1 + * input: args[0] =3D + * Register space[23] + * Register offset in given reg space[22:12] + * LID of device[11:8] + * DIMM address[7:0] + * output: args[0] =3D [3:0] Read data byte + */ + {1, 1, HSMP_GET}, + + /* + * HSMP_READ_CCD_POWER, num_args =3D 1, response_sz =3D 1 + * input: args[0] =3D apic id of core[15:0] + * output: args[0] =3D CCD power(mWatts)[31:0] + */ + {1, 1, HSMP_GET}, + + /* + * HSMP_READ_TDELTA, num_args =3D 0, response_sz =3D 1 + * input: None + * output: args[0] =3D thermal behaviour[31:0] + */ + {0, 1, HSMP_GET}, + + /* + * HSMP_GET_SVI3_VR_CTRL_TEMP, num_args =3D 1, response_sz =3D 1 + * input: args[0] =3D SVI3 rail index[3:1] + Read SVI3 temperature data[0] + * output: args[0] =3D SVI3 rail index[30:28] + SVI3 rail temperature(deg= ree C)[27:0] + */ + {1, 1, HSMP_GET}, + + /* + * HSMP_GET_ENABLED_HSMP_CMDS, num_args =3D 1, response_sz =3D 3 + * input: args[0] =3D HSMP command mask[0] + * output: status of HSMP command =3D args[0], args[1], args[2] + */ + {1, 3, HSMP_GET}, + + /* + * HSMP_SET_GET_FLOOR_LIMIT, num_args =3D 1, response_sz =3D 1 + * input: args[0] =3D + * Set or Get[31:30] + * Set the Floor frequency per core =3D 00 + * Set the Floor frequency for all cores =3D 01 + * Get the Floor frequency of a core =3D 10 + * Get the Effective Floor frequency per core =3D 11 + * Reserved[29:28] + * Apic id / Reserved[27:16] + * args[27:16] is reserved if args[31:30] =3D 01 + * Floor frequency limit / Reserved[15:0] + * if args[31] =3D 0, Floor frequency limit, else reserved + * + * output: args[0] =3D + * Effective Floor frequency limit(MHz) / None / Floor frequency limit[15= :0] + * Effective Floor frequency if input args[31:30] =3D 11 + * None if input args[31] =3D 0 + * Floor frequency limit (MHz)[15:0] if args[31:30] =3D 10 + */ + {1, 1, HSMP_SET_GET}, + + /* + * HSMP_DIMM_SB_WR, num_args =3D 1, response_sz =3D 0 + * input: args[0] =3D + * Write Data[31:24] + * Register space[23] + * Register offset in given reg space[22:12] + * LID of device[11:8] + * DIMM address[7:0] + * output: None + */ + {1, 0, HSMP_SET}, + + /* + * HSMP_SDPS_LIMIT, num_args =3D 1, response_sz =3D 1 + * input: args[0] =3D Set/Get[31] + SDPS Limit[30:0] + * output: args[0] =3D SDPS Limit[30:0] + */ + {1, 1, HSMP_SET_GET}, + }; =20 /* Metrics table (supported only with proto version 6) */ diff --git a/drivers/platform/x86/amd/hsmp/hsmp.h b/drivers/platform/x86/am= d/hsmp/hsmp.h index 0509a442eaae..b153527e0a0d 100644 --- a/drivers/platform/x86/amd/hsmp/hsmp.h +++ b/drivers/platform/x86/amd/hsmp/hsmp.h @@ -27,7 +27,7 @@ #define HSMP_DEVNODE_NAME "hsmp" #define ACPI_HSMP_DEVICE_HID "AMDI0097" =20 -#define DRIVER_VERSION "2.5" +#define DRIVER_VERSION "2.6" =20 struct hsmp_mbaddr_info { u32 base_addr; --=20 2.34.1