From nobody Thu Apr 2 15:36:12 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BD372609EE for ; Thu, 5 Mar 2026 08:54:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772700896; cv=none; b=apO+p2S5i9INgygo+ueFlj5qUS/OPe/HdBsqGSyC8z3hYrWE9io9WgK3hJGLgJCO+4T29G4rzQSThy41Z0Rb3w8+LIcgUucU+BXBouXe7xgDMt1sSK36D0w95HKXDD2s6hxC54ww5x1noTWB/h2Ie3qIju8mURlc9AvbVTigppk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772700896; c=relaxed/simple; bh=uCDhRz/YziYy/ZVEBYIphoKDsEPiZhCr4o+SajIrYBE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hRXE/AT/NLHghE9bKxdWSKgkQ08ujqkt01GyHfwVRMGyGnNQ4ouKBM3RELnI12BTY6r63/BLxqpT5YMfFATuOeh7ESBvGeGibmZuUkfoOPqEXZwZ/qCtyGxZ/aLSof+Fu0DZ1U3/BXsOK/aRrdqQLbE95OSG392PCvxOEUSngOY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iWa6eYC8; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iWa6eYC8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772700894; x=1804236894; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uCDhRz/YziYy/ZVEBYIphoKDsEPiZhCr4o+SajIrYBE=; b=iWa6eYC811kZVggjpOvGvrQ9ykfpghACdAs9e0uXEKRV3xZ7ultsEwuf lU0W+MRJ2fmbQlkXaSgtB08Epf7qbx2i+g5XNYBIDOhBawMvFgldPByIv sFpryvO7hcFFwgRFJ4tbkHO/xWAzTnP89CpvdBM3U0sebR5TmX51mVgu/ GwZ+LI6qYTrOZZvkUoMlJydubxTJAbIbWW8cUI3UiwripXIJRKfUiwRlR wlJ/tCVo9q0Ksdi+H6nEct3Z+rTEdYGj1AL2/3pACkHasidfrX+Yms4F0 1RlaTNbd1yoGtVsOiIVgAmyb+Nni2Pjjc2UvU5ZE4ZeG/WbXU3DGfQbRh Q==; X-CSE-ConnectionGUID: +oeT/eHSQomR0eWU52Io1g== X-CSE-MsgGUID: Cq82saVgSC6E0GXOKfSHOw== X-IronPort-AV: E=McAfee;i="6800,10657,11719"; a="73687426" X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="73687426" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 00:54:53 -0800 X-CSE-ConnectionGUID: YJoJmXfuThK8fR1PVAxIsw== X-CSE-MsgGUID: Njl/CuhtQt694S2ELTb/Hg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="216425990" Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa007.fm.intel.com with ESMTP; 05 Mar 2026 00:54:51 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 5FA579B; Thu, 05 Mar 2026 09:54:50 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Mark Brown , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v6 3/3] regcache: Move HW readback after cache initialisation Date: Thu, 5 Mar 2026 09:53:02 +0100 Message-ID: <20260305085449.3184020-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> References: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Make sure that cache is initialised before calling any IO using regmap, this makes sure that we won't access NULL or invalid pointers in the cache which hasn't been initialised. As a side effect it also makes the ordering of cleaning up the resources in regcache_exit() to be the same (and correct) as in the error path of regcache_init(). This is not a problem right now as they do not have dependencies, but it makes code robust against potential changes in the future. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index e9d95aa63938..27616b05111c 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -200,14 +200,6 @@ int regcache_init(struct regmap *map, const struct reg= map_config *config) map->reg_defaults =3D kmalloc_objs(struct reg_default, count); if (!map->reg_defaults) return -ENOMEM; - - /* Some devices such as PMICs don't have cache defaults, - * we cope with this by reading back the HW registers and - * crafting the cache defaults by hand. - */ - ret =3D regcache_hw_init(map); - if (ret < 0) - goto err_free_reg_defaults; } =20 if (!map->max_register_is_set && map->num_reg_defaults_raw) { @@ -222,7 +214,18 @@ int regcache_init(struct regmap *map, const struct reg= map_config *config) ret =3D map->cache_ops->init(map); map->unlock(map->lock_arg); if (ret) - goto err_free; + goto err_free_reg_defaults; + } + + /* + * Some devices such as PMICs don't have cache defaults, + * we cope with this by reading back the HW registers and + * crafting the cache defaults by hand. + */ + if (count) { + ret =3D regcache_hw_init(map); + if (ret) + goto err_exit; } =20 if (map->cache_ops->populate && @@ -232,10 +235,12 @@ int regcache_init(struct regmap *map, const struct re= gmap_config *config) ret =3D map->cache_ops->populate(map); map->unlock(map->lock_arg); if (ret) - goto err_exit; + goto err_free; } return 0; =20 +err_free: + regcache_hw_exit(map); err_exit: if (map->cache_ops->exit) { dev_dbg(map->dev, "Destroying %s cache\n", map->cache_ops->name); @@ -243,8 +248,6 @@ int regcache_init(struct regmap *map, const struct regm= ap_config *config) ret =3D map->cache_ops->exit(map); map->unlock(map->lock_arg); } -err_free: - regcache_hw_exit(map); err_free_reg_defaults: kfree(map->reg_defaults); =20 --=20 2.50.1