From nobody Thu Apr 2 14:10:29 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A9631DF742 for ; Thu, 5 Mar 2026 08:54:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772700895; cv=none; b=XR4zQCewp9ZyhvROO+u5j5L1gi+19C5GxDExdOV7I2ph4o5c1YOPayO44PkEUpM5KsYUniXf/SbUR2NfSvhxEh5/+ojBNdgXt4MqGwGc8BKENgGSud62JnoSNTU0FA2ZKITGe/kADUWc1ICXqVhZkO9YfM6gs7N/QsWYVh2JHBc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772700895; c=relaxed/simple; bh=kXH9K9ZBKw/KaO+pgZt2pJn2cuQwBKJxPFo+0T/rU88=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uCmjhcon2VrJZ+oibaghXDtfVy2HRKmKuLDCML+9nDg8abZUNAoSJsgQoKSylaiU5QPtPbMOIJwkQvmJ7KA8hoH9ibO5pX+m4A4CveHETmjOd2W+JiZXbQNPlG2VUydR6/0cU6xs/BB6oJbiV1u489uVfx8CsMwJVmctFx2hRl0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EgIzYJis; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EgIzYJis" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772700895; x=1804236895; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kXH9K9ZBKw/KaO+pgZt2pJn2cuQwBKJxPFo+0T/rU88=; b=EgIzYJisrNmr2wldVEwZDf3bnYLVk8xWjpjQcfwJd8jzmEg7URs4pSLv LNCmkr3H98akRMJPwLB/m+Qd033fMT7+Ru+UUS082FUzRoffXpVDm3BKE uuqxvRBURpot7XkF1i6TSPZUc3dQgOG69PYzYz3EKOQrwWAulZjA/R4gK QObCea8Ktlq6BN6YOsCiFOmoSnZxTAokUZ4FtTBiKU1nTQT8cJIY5E4Y/ nyQ4CaLm0h93JoZ3qRrBQPVH3MHM6Dzdnc5OHxIiYc+vsNr1qaJWH7/Qs WDoCafJjBoHJjPdBzzdUmawrIFR+H0vKAVSrgbgyKexLJP2Nw8rQey9Am Q==; X-CSE-ConnectionGUID: KeM08FB2SSqFCQbf50oddQ== X-CSE-MsgGUID: N71lhglzRK2PAbt98bdUzA== X-IronPort-AV: E=McAfee;i="6800,10657,11719"; a="73694917" X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="73694917" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 00:54:54 -0800 X-CSE-ConnectionGUID: vzjuRr4nRCieZIyJDCGj6g== X-CSE-MsgGUID: Jo8pUf7JQQOdEwPcx4lcBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="222769271" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa003.jf.intel.com with ESMTP; 05 Mar 2026 00:54:52 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 5755198; Thu, 05 Mar 2026 09:54:50 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Mark Brown , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v6 1/3] regcache: Move count check and cache_bypass assignment to the caller Date: Thu, 5 Mar 2026 09:53:00 +0100 Message-ID: <20260305085449.3184020-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> References: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Make regcache_count_cacheable_registers() just a counting routine without any side effects by moving count check and cache_bypass assignment to the caller. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 329cdee1ae1c..b73de70bbf3f 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -53,10 +53,6 @@ static int regcache_count_cacheable_registers(struct reg= map *map) !regmap_volatile(map, i * map->reg_stride)) count++; =20 - /* all registers are unreadable or volatile, so just bypass */ - if (!count) - map->cache_bypass =3D true; - return count; } =20 @@ -206,6 +202,10 @@ int regcache_init(struct regmap *map, const struct reg= map_config *config) map->reg_defaults =3D tmp_buf; } else if (map->num_reg_defaults_raw) { count =3D regcache_count_cacheable_registers(map); + if (!count) + map->cache_bypass =3D true; + + /* All registers are unreadable or volatile, so just bypass */ if (map->cache_bypass) return 0; =20 --=20 2.50.1 From nobody Thu Apr 2 14:10:29 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E810B376477 for ; Thu, 5 Mar 2026 08:54:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772700898; cv=none; b=KQ1DnNSllZijgfN+9R4Y01vlUD1IvI6LAOVv77WUL6I7FCHyUi9HtHcwfaG42ySvuO9x7iMiUQAz1U9QMYyHyQX4vKIV0brn59l4A+Iy/IsWcl5mfRPrgY6fO861NRGa1BKHko3jhYCgooU6R7CNAf/wvKeNhDlsDzVssMvwTUU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772700898; c=relaxed/simple; bh=9P5dpYxQuWcUjFjd+RUZceybv8gUSEaT/oC+QYdlkBE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qZVLf7HSR9GhZYlefMno3eJA+tEXu8whVy29zNBaJAY9QtibQlWqifvZoy0f+9ldE1ewiXYz7jLnndk07Yo1ek/1qFIcjyowNEAjAFC6GvysGiTdZr6xYqGPJixaUangVw4qw6v84MCCAxuAARrtk9Yk8i8nI03c8gomPaOXUPg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=IxKE+Sl9; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="IxKE+Sl9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1772700897; x=1804236897; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9P5dpYxQuWcUjFjd+RUZceybv8gUSEaT/oC+QYdlkBE=; b=IxKE+Sl9n9Zc7jBQsOKGI/hUERfRLaEnVvAckCTd9tn2wjJl9lYWFuOQ Qu69mfJOCEd6ELVvBwKq5qYQSycboTRtSxo31Vs7kDugkZj5apQy5ggkf qS4UxnDXxavpKXedJXnKudNlymc5AwX1/8CxCMwlKTyCegUxmXs2MQonP chVAGPs3zF1CIFCvX5UQKzh+mFNID27G6JCKC7VSj7WwV6Ubg+kmklW9p 7wQ/nOaxE0UYlaZEdrA8B7OtBmyWHP5QtOPdVaaVjbswkRKq9jU9UR7GU 6H4gw7+8wpH2ysMB91WXYWphU2a7t9QvoImFdOkDeh13hVNRBWX+ibaIs Q==; X-CSE-ConnectionGUID: TA9sUSvSTqmq2mCq7gwMnA== X-CSE-MsgGUID: Kjx5gHUcTBSSf7fd27p9ZQ== X-IronPort-AV: E=McAfee;i="6800,10657,11719"; a="73687434" X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="73687434" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 00:54:53 -0800 X-CSE-ConnectionGUID: Sbs7cjivR3Snq2Necac6cw== X-CSE-MsgGUID: 6fib0Z6YR8Cbez5VDyURew== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="216425988" Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa007.fm.intel.com with ESMTP; 05 Mar 2026 00:54:51 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 5B93999; Thu, 05 Mar 2026 09:54:50 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Mark Brown , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v6 2/3] regcache: Allocate and free reg_defaults on the same level Date: Thu, 5 Mar 2026 09:53:01 +0100 Message-ID: <20260305085449.3184020-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> References: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently reg_defaults buffer may be allocated on two different levels when the user provided them and we duplicate it in regcache_init() or when user wants us to read back from HW in regcache_hw_init(). This inconsistency makes code harder to follow and maintain. Allocate and free reg_defaults on the same level in regcache_init() to improve the readability and maintenance efforts. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index b73de70bbf3f..e9d95aa63938 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -56,17 +56,12 @@ static int regcache_count_cacheable_registers(struct re= gmap *map) return count; } =20 -static int regcache_hw_init(struct regmap *map, int count) +static int regcache_hw_init(struct regmap *map) { int ret; unsigned int reg, val; void *tmp_buf; =20 - map->num_reg_defaults =3D count; - map->reg_defaults =3D kmalloc_objs(struct reg_default, count); - if (!map->reg_defaults) - return -ENOMEM; - if (!map->reg_defaults_raw) { bool cache_bypass =3D map->cache_bypass; dev_dbg(map->dev, "No cache defaults, reading back from HW\n"); @@ -74,10 +69,8 @@ static int regcache_hw_init(struct regmap *map, int coun= t) /* Bypass the cache access till data read from HW */ map->cache_bypass =3D true; tmp_buf =3D kmalloc(map->cache_size_raw, GFP_KERNEL); - if (!tmp_buf) { - ret =3D -ENOMEM; - goto err_free; - } + if (!tmp_buf) + return -ENOMEM; ret =3D regmap_raw_read(map, 0, tmp_buf, map->cache_size_raw); map->cache_bypass =3D cache_bypass; @@ -110,7 +103,7 @@ static int regcache_hw_init(struct regmap *map, int cou= nt) if (ret !=3D 0) { dev_err(map->dev, "Failed to read %x: %d\n", reg, ret); - goto err_free; + return ret; } } =20 @@ -120,16 +113,10 @@ static int regcache_hw_init(struct regmap *map, int c= ount) } =20 return 0; - -err_free: - kfree(map->reg_defaults); - - return ret; } =20 static void regcache_hw_exit(struct regmap *map) { - kfree(map->reg_defaults); if (map->cache_free) kfree(map->reg_defaults_raw); } @@ -209,13 +196,18 @@ int regcache_init(struct regmap *map, const struct re= gmap_config *config) if (map->cache_bypass) return 0; =20 + map->num_reg_defaults =3D count; + map->reg_defaults =3D kmalloc_objs(struct reg_default, count); + if (!map->reg_defaults) + return -ENOMEM; + /* Some devices such as PMICs don't have cache defaults, * we cope with this by reading back the HW registers and * crafting the cache defaults by hand. */ - ret =3D regcache_hw_init(map, count); + ret =3D regcache_hw_init(map); if (ret < 0) - return ret; + goto err_free_reg_defaults; } =20 if (!map->max_register_is_set && map->num_reg_defaults_raw) { @@ -253,6 +245,8 @@ int regcache_init(struct regmap *map, const struct regm= ap_config *config) } err_free: regcache_hw_exit(map); +err_free_reg_defaults: + kfree(map->reg_defaults); =20 return ret; } @@ -273,6 +267,8 @@ void regcache_exit(struct regmap *map) map->cache_ops->exit(map); map->unlock(map->lock_arg); } + + kfree(map->reg_defaults); } =20 /** --=20 2.50.1 From nobody Thu Apr 2 14:10:29 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BD372609EE for ; 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X-CSE-ConnectionGUID: +oeT/eHSQomR0eWU52Io1g== X-CSE-MsgGUID: Cq82saVgSC6E0GXOKfSHOw== X-IronPort-AV: E=McAfee;i="6800,10657,11719"; a="73687426" X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="73687426" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Mar 2026 00:54:53 -0800 X-CSE-ConnectionGUID: YJoJmXfuThK8fR1PVAxIsw== X-CSE-MsgGUID: Njl/CuhtQt694S2ELTb/Hg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,325,1763452800"; d="scan'208";a="216425990" Received: from black.igk.intel.com ([10.91.253.5]) by fmviesa007.fm.intel.com with ESMTP; 05 Mar 2026 00:54:51 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id 5FA579B; Thu, 05 Mar 2026 09:54:50 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-kernel@vger.kernel.org, driver-core@lists.linux.dev Cc: Mark Brown , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich Subject: [PATCH v6 3/3] regcache: Move HW readback after cache initialisation Date: Thu, 5 Mar 2026 09:53:02 +0100 Message-ID: <20260305085449.3184020-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> References: <20260305085449.3184020-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Make sure that cache is initialised before calling any IO using regmap, this makes sure that we won't access NULL or invalid pointers in the cache which hasn't been initialised. As a side effect it also makes the ordering of cleaning up the resources in regcache_exit() to be the same (and correct) as in the error path of regcache_init(). This is not a problem right now as they do not have dependencies, but it makes code robust against potential changes in the future. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index e9d95aa63938..27616b05111c 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -200,14 +200,6 @@ int regcache_init(struct regmap *map, const struct reg= map_config *config) map->reg_defaults =3D kmalloc_objs(struct reg_default, count); if (!map->reg_defaults) return -ENOMEM; - - /* Some devices such as PMICs don't have cache defaults, - * we cope with this by reading back the HW registers and - * crafting the cache defaults by hand. - */ - ret =3D regcache_hw_init(map); - if (ret < 0) - goto err_free_reg_defaults; } =20 if (!map->max_register_is_set && map->num_reg_defaults_raw) { @@ -222,7 +214,18 @@ int regcache_init(struct regmap *map, const struct reg= map_config *config) ret =3D map->cache_ops->init(map); map->unlock(map->lock_arg); if (ret) - goto err_free; + goto err_free_reg_defaults; + } + + /* + * Some devices such as PMICs don't have cache defaults, + * we cope with this by reading back the HW registers and + * crafting the cache defaults by hand. + */ + if (count) { + ret =3D regcache_hw_init(map); + if (ret) + goto err_exit; } =20 if (map->cache_ops->populate && @@ -232,10 +235,12 @@ int regcache_init(struct regmap *map, const struct re= gmap_config *config) ret =3D map->cache_ops->populate(map); map->unlock(map->lock_arg); if (ret) - goto err_exit; + goto err_free; } return 0; =20 +err_free: + regcache_hw_exit(map); err_exit: if (map->cache_ops->exit) { dev_dbg(map->dev, "Destroying %s cache\n", map->cache_ops->name); @@ -243,8 +248,6 @@ int regcache_init(struct regmap *map, const struct regm= ap_config *config) ret =3D map->cache_ops->exit(map); map->unlock(map->lock_arg); } -err_free: - regcache_hw_exit(map); err_free_reg_defaults: kfree(map->reg_defaults); =20 --=20 2.50.1