From nobody Thu Apr 9 16:33:39 2026 Received: from mx0a-0064b401.pphosted.com (mx0a-0064b401.pphosted.com [205.220.166.238]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 746AD286A4; Thu, 5 Mar 2026 04:35:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=205.220.166.238 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772685325; cv=fail; b=uyUohyAXls4mPV9mRVrEKmlo5y73gUYCFKQ+QOwZzWNBuC3kusA8tqWeTpwLK2Da8IwNQhC30EtI7h7q+F5iN/huD28wfxcM2ocIKKsvdauP/izGCxUVKe/ml2leluprFTtaAk/KTgPCrG7Xz9HZMZfMnxOai9Ydt2l6WXdB2pU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772685325; c=relaxed/simple; bh=FysxBulDvJWctJ4gnCRYJDJey7KW/Q+lag66+yNqODc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=ZfcgcpQ0RIDXsFCEjVxdptT0kIegtiXHV6LJbJi8tlAA490Tr7aMMx5DQbeA+yWMirm55ohlw3E5Spqp5O+i4dqfdTYWFIlI03EO3IcGViBCqw7QlAh2V1YWoLWE0LuktW6Y5ZvoYS6dkARbJD4KOJs3Jy2MH0EpXlQroVhoKs4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com; spf=pass smtp.mailfrom=windriver.com; dkim=pass (2048-bit key) header.d=windriver.com header.i=@windriver.com header.b=ZVR3zgJ4; arc=fail smtp.client-ip=205.220.166.238 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=windriver.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=windriver.com header.i=@windriver.com header.b="ZVR3zgJ4" Received: from pps.filterd (m0250810.ppops.net [127.0.0.1]) by mx0a-0064b401.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6251G5kB018028; Wed, 4 Mar 2026 20:34:20 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=windriver.com; h=cc:content-transfer-encoding:content-type:date:from :in-reply-to:message-id:mime-version:references:subject:to; s= PPS06212021; bh=JS0l2cL9t0DJO6wXgLz73do8DMNeF55S3oCw+fnrXPw=; b= ZVR3zgJ4HYAsYTfoax7luZH1vK+no7ma9VKq8jPwEpbr7rfh0gd54wL6Ifoq0L3f YPljexK0XZ13RQjyagQfVljq7pim5krEb9KHvIyDVVOGY+TIoXv7q8CFYXZOVF9z JzE5x2gTQv2GHc9iasRu6VyaOqwKNi8671anUYKZ5eJIPSeGwU03QRJuqm9FhDya rimpdII4Wfn+nHgty+tkNebii8032s1oPhiKDDFSsdeuXb4skfPOd/7eCdJ+EiG5 0qemLy97zITZ1VYtJh6RP+ixelxqxcRtgH9Ai7aPhp7QUhOzNgUvQG5t6/f35vbR nW3fuugg6Hykwb6V0sk6RQ== Received: from cy7pr03cu001.outbound.protection.outlook.com (mail-westcentralusazon11010065.outbound.protection.outlook.com [40.93.198.65]) by mx0a-0064b401.pphosted.com (PPS) with ESMTPS id 4ckvh45nf6-1 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Wed, 04 Mar 2026 20:34:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=syRz4PQPyvw088nFe+JeiCh1M5OtYVwg0ga2uJ4rLQZZxaNyHb8DOLZ14Spv/1cIfjy/NEujlgROVUM8gVX4wGPQ+Nv3hEXFfuJr9DHmvTg9aalalGzDzrEcqxpSRBN0p2kdDUfnQw+LAXjOpRaHijVhKxLE9azayVwoOeLrm4HcqSwKdgd3/LWgmiktdn8qKNp+SO0vF8UlzNpN6MjT+4/zjtUTZOeB4ZA7wFvYon0g0mpN97yuCVbNhcBxclcqoqAqh0kui4y6sLzgGjQhFmM5+nwHU4jjfKrxU2CmLkuS08irSSkXJIEuFbDWLefVSHAPqUmBADolscsOCezKdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=JS0l2cL9t0DJO6wXgLz73do8DMNeF55S3oCw+fnrXPw=; b=XK9eqXFfjfB96wi4YOkol/XRpzbez7kcJ1uy6K1dW4l1aWW0wNZ0dQDkjhM779rB9Lun+X8qjGHcV7OLFNF0O+S2pE10t/vF525dAx6sv5nc4sWFUvteHivbOvT0DRAjT9xI7Tig4uBAd8AlG/OtdGzY9yUZFCPaZ19+7BQtizWx4NtDJvyB5RJ0FRlamGxqZed3aLCJjIx0OUFEIYAnSjakidtEqE7ssBKRQS1URFSxQpyEuFL7KAGBH4wwc/fN0ckJFrvm7kc/eP1g/+nGJZF6Q8aolcpEu63MZdMV1GbNWcjcXVTExbjklFi0l2NDc4e/C7D5DlwI4XHwuuVoQQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=windriver.com; dmarc=pass action=none header.from=windriver.com; dkim=pass header.d=windriver.com; arc=none Received: from DS4PPFD667CEBB6.namprd11.prod.outlook.com (2603:10b6:f:fc02::53) by SJ2PR11MB8347.namprd11.prod.outlook.com (2603:10b6:a03:544::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9678.18; Thu, 5 Mar 2026 04:34:17 +0000 Received: from DS4PPFD667CEBB6.namprd11.prod.outlook.com ([fe80::5f46:caa4:60d4:f669]) by DS4PPFD667CEBB6.namprd11.prod.outlook.com ([fe80::5f46:caa4:60d4:f669%2]) with mapi id 15.20.9654.022; Thu, 5 Mar 2026 04:34:17 +0000 From: Xiaolei Wang To: sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, tarang.raval@siliconsignals.io, jacopo@jmondi.org, mchehab@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, hverkuil+cisco@kernel.org, johannes.goede@oss.qualcomm.com, hverkuil-cisco@xs4all.nl, jai.luthra@ideasonboard.com, dave.stevenson@raspberrypi.com, Xiaolei.Wang@windriver.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/3] media: i2c: ov9282: Convert to CCI register access helpers Date: Thu, 5 Mar 2026 12:33:48 +0800 Message-ID: <20260305043350.2151936-2-xiaolei.wang@windriver.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260305043350.2151936-1-xiaolei.wang@windriver.com> References: <20260305043350.2151936-1-xiaolei.wang@windriver.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SG2PR02CA0032.apcprd02.prod.outlook.com (2603:1096:3:18::20) To DS4PPFD667CEBB6.namprd11.prod.outlook.com (2603:10b6:f:fc02::53) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS4PPFD667CEBB6:EE_|SJ2PR11MB8347:EE_ X-MS-Office365-Filtering-Correlation-Id: 1d9daa62-7629-492e-5f32-08de7a707637 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|52116014|376014|1800799024|366016|38350700014|921020; X-Microsoft-Antispam-Message-Info: 0lRRJJKRxryfunWYSsF71JFULb/NoeRoKZaFbHBHS+YowopkmWbKomUG2PS1Q34rzVeunoSrlHXG/LYrZKJF1O6FEbmQ3W/0W4rCXq0zakRr0EvoScah/VJCkNmzZGe7gH58WdSBKWJmd8AcI7x0jdAYxsSGQcOOAlvAE48bPxjmU5dcWUQIUiYE/wxhEJ2IBn8MtG14fge2kMjtenWOtnlDYus/fG8em2RCEkW5gdCDF9u47Ctvd/j8FO1ofgKuHxKt8oy8TFDq0uxGHFiaBOuQlq1ETYxxPX72D4nW/xg96AxtENpIQuN3jvhv0fThLiCA+f2LpDKMFQv+gruJ3ZCDuG0kFKQ/RFleAWjl00mHJXaozqkE5Yl+3G9qTcUBDephYta2YKpLIZGmzur7JEgr2uZyBzSDjEteki72NzSs1ScedYuvmTwQ1VuMyrIyS1dtaSFcnBjopomht/MNu89+LRt8mIo3MHnN7t777KRioHUb48H+RDJwsrwGTXCVjdF4TwFSql8qEIClG5yzd8zonCVrKQmGcqQ4CuWe6TZm5vseNwLpxL2oqRYFwyMwhi3/q2XAYP/cakthmaounXS/5iwZWL2uqvmmrToUczXCFrufEcWDe5XS2lxKjUbadqp5e4aZKyhLHW2nziDm3R15uNnb6Ny9rgCjurXeDMET54CJ7eGvsTvOIHQGKdEw+XaI6K85dzzvcFW/J8X6JDO3yaERyjLlJtwlpKglxw24BrY5kXdyI4n159sDHGwV7NesA9zA7pgXUymglheY+slVrPC3kjCHevk81V38jjRE0WgkHsd8tGxTFUUsv5zS X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DS4PPFD667CEBB6.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(7416014)(52116014)(376014)(1800799024)(366016)(38350700014)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?K//1INKVYMFmKSV6dkwZ8Ox4Hnc0Y5jV7jCm9FmXmAD2Jh6NeQ89dIZZc0sM?= =?us-ascii?Q?69ChxmHQXHmL4vhAKEby45k492CzFt8hZSN5R7sAiQxKDb9MaVZSlPr/oS2v?= =?us-ascii?Q?YJYxUc5zXshiUrncKSIB71AdajTNDLXB4j5Um1355ByGbDLJPh5lDX/ajHzh?= =?us-ascii?Q?T+i9UDX+QRa0DN80miGQh4MQBg8/F5MfJfRwwwQz7Ys2M/pN/KcabRbsuIYT?= =?us-ascii?Q?7cH2pcY7CKFsWJ0nyGcgAVdWKrSXzT+CVhbkYlXda2adr04FzrjsA/Jwg26s?= =?us-ascii?Q?LXOGlXDf/sdwc0d03G7Mu61nhTrYQZQ//g9R5DTI1AibQJUejChiNs85l1G3?= =?us-ascii?Q?sLpgQvTCYKjVEs7/G7TsIoNWDNo85oNvrLXoY7PdieeyhPGtCIz9fI7sgg8f?= =?us-ascii?Q?diO7ZlVzIVISK8FwE3TIfBy1g5IkuWpPUolDzEBeLH87X8CV4vAPRFveOgU5?= =?us-ascii?Q?KPv05xasemKwy1sOQZ1/57TkK9R32OvIfIUFOpta8exY+N3JPl2v50ghzWPd?= =?us-ascii?Q?cu9wZHVHdjTr4YHbDhMh3HeewLOoQkSgibEW5kC5tsfCj2owLsxhcirN4qxJ?= =?us-ascii?Q?PxlgNedK92MPtKxUhSmLh8c6sDC/lbT4o7w6+a2EmntIXytXpvyWXXhm8Pwd?= =?us-ascii?Q?vkxlSSnHUmJPpsOgBSoYHQk2fFCYHdsmSf7ktZ9emDqVZodbXgOHeB7eHJMq?= =?us-ascii?Q?+uGD5PzdZK6rU65+wLGvMMSk5/AzgPlsUHACgcdwVcjyr2UoGuQ64a7Z2BwZ?= =?us-ascii?Q?H4mGSjCH1p+SE5t+ht0ZbFDPuyLkt9comrHpa0D7DfJlWQoeVZkOu5Atz1QC?= =?us-ascii?Q?7TMf7sqDllITYDHXMWbX8rEKM8QlnxXIlkzVm+JzVYaOKfysFvitM6VVQ3s3?= =?us-ascii?Q?3eyRcpVCU1Sz07bRC9FyefZxAncxH5uPndo2/0OoDYdpbyx5OVbnpJoY5Myh?= =?us-ascii?Q?cZ2ejmIafOYlU1/aBZ9QS6xbqJI0WQEiDwSkKM5D3jQyKWV9bUILKlO3fGw0?= =?us-ascii?Q?9I9sga3jg1gOvoa2iQUk6W0bRqkEmXakdKYU/LPz+z0VVYTct590twRIi4xX?= =?us-ascii?Q?vf1rxKcvwmVtEgi0DuddLD6A1O3mS6keJQ1PqmCRkoo2yoSw8UZuWVm9HJwD?= =?us-ascii?Q?53o71kz/kMaCqGfBxostIfZeTTu4+ksQ/T5rL2tgMbG2LOw9mtMfiKR6K7BJ?= =?us-ascii?Q?JCfhAxQkCdL4NVmm9GNdOc67Fte+9BtiUkba4sjRlLFhnX8Sqhazvy3GSScF?= =?us-ascii?Q?zvFz7VJsNd7lQDNX+NlhuXcpnTrgJ/a/vrMYENN/dIgnXb4cdkbhB+WXHAmI?= =?us-ascii?Q?YKWGxAwq02PrwpCXgu46g04ja1Jvl7PJ1iAXpDVDVfvn4oVB4OKymucr90pr?= =?us-ascii?Q?1QlQrqBB4nNsSbk5FKoXWSbXJnVZ47EOBJDc/oVc5MTrPccsRohPJDYxDXyG?= =?us-ascii?Q?5dHGpLSLWJOlOAmMuUeS/V2/sheFBsdrpUm1+0N/DEGwlB2xHlFB2ulnM4VF?= =?us-ascii?Q?8qVrs4BUfvEol1pUkGPWvjKhLQZB1xRqLxJhXLRzyxb1ptIzLJGSp4b+2K43?= =?us-ascii?Q?FfklvjKphH7yWXM5LCC9A6sWRAvvahCaEPbHzRBofdiErbk0XUOuvLbosX5w?= =?us-ascii?Q?YVMslUEZ1NcDVhCkipdSjohgxdcu8KTICj5X417ipwILYTD77FedCPJocsi7?= =?us-ascii?Q?/LorlPQLiCB2P7fcy9VSc61heLlxd7gcn9er4sQgVPWdxRzNi3ZZ05rmA6EV?= =?us-ascii?Q?G76CZwWMIcksvOObp5nVU4uW4vvQYLQ=3D?= X-OriginatorOrg: windriver.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1d9daa62-7629-492e-5f32-08de7a707637 X-MS-Exchange-CrossTenant-AuthSource: DS4PPFD667CEBB6.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2026 04:34:17.5762 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8ddb2873-a1ad-4a18-ae4e-4644631433be X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: d0GbIcFj4DPNeOi0NEvtrgmk6e/h4+0K7cp8gVv4h/XMw+jWgcvfeM47e/ElyUJRZ5yWT/cMA6GXzX+EVNEub+zi53JN1xThk4yGePfG6jo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR11MB8347 X-Proofpoint-ORIG-GUID: J5z65ouTF17J4c5IUJK-TT7H2643dsfV X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA1MDAzMiBTYWx0ZWRfX2sA67X7bTUn7 OBZ6fJENT2ORJNJiMTk1TINjTutUMPygTJAetfoXqATdZodnS/TuBQepGCpvyyH1mYdNZOHR69H OLKVFKDQ6xdKX3v3VEbb6snF8CkknK1WYXi1k+9Rs8lhh0yW1Mf0iIRYpHmOObcUm8bADDPSOln WCOsKDQ7Q+UikTjMNAhjxCCw69SFxWZx+tKLnjd0fkc+plDCA8rrJkrqx0FBDNyTy8Ve40cYqC5 YgyLZnTLM87Ny8BW0zjuSpNstRIkZYmWLJg/+7LQ1RAPWCCQx+T3eLmVLNudcI6KsTpyZlnZn7w tqUXiFUOLCbEDyI9YuHOxDeI9LQDxgfZ3RpirNqP+jnBHYXe5QBs2SFiicaji3pzIsIcTngRtku sEcdfdNIi+Lm2LdBAEm6pI2FMCwKqeOhydW0yvPttv9m7QmA9rJYFW+xYgVFlRWrpQni+ddFg9e 6vqPNRKWG5TeaaCS5KQ== X-Proofpoint-GUID: J5z65ouTF17J4c5IUJK-TT7H2643dsfV X-Authority-Analysis: v=2.4 cv=Z/3h3XRA c=1 sm=1 tr=0 ts=69a907cb cx=c_pps a=zsOV+8tnETx+K6VwtxJO8A==:117 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=bi6dqmuHe4P4UrxVR6um:22 a=HK-ge7EqtdluswH-FwHe:22 a=t7CeM3EgAAAA:8 a=5nzG_WlsDGRH9K1yH5EA:9 a=FdTzh2GWekK77mhwV6Dw:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-04_09,2026-03-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 priorityscore=1501 adultscore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 spamscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603050032 Content-Type: text/plain; charset="utf-8" Use the new common CCI register access helpers to replace the private register access helpers in the ov9282 driver. This simplifies the driver by reducing the amount of code. Signed-off-by: Xiaolei Wang Reviewed-by: Tarang Raval Reviewed-by: Dave Stevenson --- drivers/media/i2c/Kconfig | 1 + drivers/media/i2c/ov9282.c | 561 +++++++++++++------------------------ 2 files changed, 198 insertions(+), 364 deletions(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 5eb1e0e0a87a..3027e71fd8fb 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -690,6 +690,7 @@ config VIDEO_OV8865 config VIDEO_OV9282 tristate "OmniVision OV9282 sensor support" depends on OF_GPIO + select V4L2_CCI_I2C help This is a Video4Linux2 sensor driver for the OmniVision OV9282 camera sensor. diff --git a/drivers/media/i2c/ov9282.c b/drivers/media/i2c/ov9282.c index ded9b2044ff8..56f854a4d04f 100644 --- a/drivers/media/i2c/ov9282.c +++ b/drivers/media/i2c/ov9282.c @@ -12,38 +12,40 @@ #include #include #include +#include #include =20 +#include #include #include #include #include =20 /* Streaming Mode */ -#define OV9282_REG_MODE_SELECT 0x0100 +#define OV9282_REG_MODE_SELECT CCI_REG8(0x0100) #define OV9282_MODE_STANDBY 0x00 #define OV9282_MODE_STREAMING 0x01 =20 -#define OV9282_REG_PLL_CTRL_0D 0x030d +#define OV9282_REG_PLL_CTRL_0D CCI_REG8(0x030d) #define OV9282_PLL_CTRL_0D_RAW8 0x60 #define OV9282_PLL_CTRL_0D_RAW10 0x50 =20 -#define OV9282_REG_TIMING_HTS 0x380c +#define OV9282_REG_TIMING_HTS CCI_REG16(0x380c) #define OV9282_TIMING_HTS_MAX 0x7fff =20 /* Lines per frame */ -#define OV9282_REG_LPFR 0x380e +#define OV9282_REG_LPFR CCI_REG16(0x380e) =20 /* Chip ID */ -#define OV9282_REG_ID 0x300a +#define OV9282_REG_ID CCI_REG16(0x300a) #define OV9282_ID 0x9281 =20 /* Output enable registers */ -#define OV9282_REG_OUTPUT_ENABLE4 0x3004 +#define OV9282_REG_OUTPUT_ENABLE4 CCI_REG8(0x3004) #define OV9282_OUTPUT_ENABLE4_GPIO2 BIT(1) #define OV9282_OUTPUT_ENABLE4_D9 BIT(0) =20 -#define OV9282_REG_OUTPUT_ENABLE5 0x3005 +#define OV9282_REG_OUTPUT_ENABLE5 CCI_REG8(0x3005) #define OV9282_OUTPUT_ENABLE5_D8 BIT(7) #define OV9282_OUTPUT_ENABLE5_D7 BIT(6) #define OV9282_OUTPUT_ENABLE5_D6 BIT(5) @@ -53,7 +55,7 @@ #define OV9282_OUTPUT_ENABLE5_D2 BIT(1) #define OV9282_OUTPUT_ENABLE5_D1 BIT(0) =20 -#define OV9282_REG_OUTPUT_ENABLE6 0x3006 +#define OV9282_REG_OUTPUT_ENABLE6 CCI_REG8(0x3006) #define OV9282_OUTPUT_ENABLE6_D0 BIT(7) #define OV9282_OUTPUT_ENABLE6_PCLK BIT(6) #define OV9282_OUTPUT_ENABLE6_HREF BIT(5) @@ -62,14 +64,14 @@ #define OV9282_OUTPUT_ENABLE6_VSYNC BIT(1) =20 /* Exposure control */ -#define OV9282_REG_EXPOSURE 0x3500 +#define OV9282_REG_EXPOSURE CCI_REG24(0x3500) #define OV9282_EXPOSURE_MIN 1 #define OV9282_EXPOSURE_OFFSET 25 #define OV9282_EXPOSURE_STEP 1 #define OV9282_EXPOSURE_DEFAULT 0x0282 =20 /* AEC/AGC manual */ -#define OV9282_REG_AEC_MANUAL 0x3503 +#define OV9282_REG_AEC_MANUAL CCI_REG8(0x3503) #define OV9282_DIGFRAC_GAIN_DELAY BIT(6) #define OV9282_GAIN_CHANGE_DELAY BIT(5) #define OV9282_GAIN_DELAY BIT(4) @@ -78,28 +80,28 @@ #define OV9282_AEC_MANUAL_DEFAULT 0x00 =20 /* Analog gain control */ -#define OV9282_REG_AGAIN 0x3509 +#define OV9282_REG_AGAIN CCI_REG8(0x3509) #define OV9282_AGAIN_MIN 0x10 #define OV9282_AGAIN_MAX 0xff #define OV9282_AGAIN_STEP 1 #define OV9282_AGAIN_DEFAULT 0x10 =20 /* Group hold register */ -#define OV9282_REG_HOLD 0x3308 +#define OV9282_REG_HOLD CCI_REG8(0x3308) =20 -#define OV9282_REG_ANA_CORE_2 0x3662 +#define OV9282_REG_ANA_CORE_2 CCI_REG8(0x3662) #define OV9282_ANA_CORE2_RAW8 0x07 #define OV9282_ANA_CORE2_RAW10 0x05 =20 -#define OV9282_REG_TIMING_FORMAT_1 0x3820 -#define OV9282_REG_TIMING_FORMAT_2 0x3821 +#define OV9282_REG_TIMING_FORMAT_1 CCI_REG8(0x3820) +#define OV9282_REG_TIMING_FORMAT_2 CCI_REG8(0x3821) #define OV9282_FLIP_BIT BIT(2) =20 -#define OV9282_REG_MIPI_CTRL00 0x4800 +#define OV9282_REG_MIPI_CTRL00 CCI_REG8(0x4800) #define OV9282_GATED_CLOCK BIT(5) =20 /* Flash/Strobe control registers */ -#define OV9282_REG_STROBE_FRAME_SPAN 0x3925 +#define OV9282_REG_STROBE_FRAME_SPAN CCI_REG32(0x3925) #define OV9282_STROBE_FRAME_SPAN_DEFAULT 0x0000001a =20 /* Input clock rate */ @@ -139,16 +141,6 @@ static const char * const ov9282_supply_names[] =3D { =20 #define OV9282_NUM_SUPPLIES ARRAY_SIZE(ov9282_supply_names) =20 -/** - * struct ov9282_reg - ov9282 sensor register - * @address: Register address - * @val: Register value - */ -struct ov9282_reg { - u16 address; - u8 val; -}; - /** * struct ov9282_reg_list - ov9282 sensor register list * @num_of_regs: Number of registers in the list @@ -156,7 +148,7 @@ struct ov9282_reg { */ struct ov9282_reg_list { u32 num_of_regs; - const struct ov9282_reg *regs; + const struct cci_reg_sequence *regs; }; =20 /** @@ -188,6 +180,7 @@ struct ov9282_mode { * struct ov9282 - ov9282 sensor device structure * @dev: Pointer to generic device * @sd: V4L2 sub-device + * @regmap: Regmap for sensor register access * @pad: Media pad. Only one pad supported * @reset_gpio: Sensor reset gpio * @inclk: Sensor input clock @@ -209,6 +202,7 @@ struct ov9282_mode { struct ov9282 { struct device *dev; struct v4l2_subdev sd; + struct regmap *regmap; struct media_pad pad; struct gpio_desc *reset_gpio; struct clk *inclk; @@ -241,73 +235,68 @@ static const s64 link_freq[] =3D { * register arrays as some settings are written as part of ov9282_power_on, * and the reset will clear them. */ -static const struct ov9282_reg common_regs[] =3D { - {0x0302, 0x32}, - {0x030e, 0x02}, - {0x3001, 0x00}, +static const struct cci_reg_sequence common_regs[] =3D { + {CCI_REG8(0x0302), 0x32}, + {CCI_REG8(0x030e), 0x02}, + {CCI_REG8(0x3001), 0x00}, {OV9282_REG_OUTPUT_ENABLE4, 0x00}, {OV9282_REG_OUTPUT_ENABLE5, 0x00}, {OV9282_REG_OUTPUT_ENABLE6, OV9282_OUTPUT_ENABLE6_ILPWM}, - {0x3011, 0x0a}, - {0x3013, 0x18}, - {0x301c, 0xf0}, - {0x3022, 0x01}, - {0x3030, 0x10}, - {0x3039, 0x32}, - {0x303a, 0x00}, + {CCI_REG8(0x3011), 0x0a}, + {CCI_REG8(0x3013), 0x18}, + {CCI_REG8(0x301c), 0xf0}, + {CCI_REG8(0x3022), 0x01}, + {CCI_REG8(0x3030), 0x10}, + {CCI_REG8(0x3039), 0x32}, + {CCI_REG8(0x303a), 0x00}, {OV9282_REG_AEC_MANUAL, OV9282_GAIN_PREC16_EN}, - {0x3505, 0x8c}, - {0x3507, 0x03}, - {0x3508, 0x00}, - {0x3610, 0x80}, - {0x3611, 0xa0}, - {0x3620, 0x6e}, - {0x3632, 0x56}, - {0x3633, 0x78}, - {0x3666, 0x00}, - {0x366f, 0x5a}, - {0x3680, 0x84}, - {0x3712, 0x80}, - {0x372d, 0x22}, - {0x3731, 0x80}, - {0x3732, 0x30}, - {0x377d, 0x22}, - {0x3788, 0x02}, - {0x3789, 0xa4}, - {0x378a, 0x00}, - {0x378b, 0x4a}, - {0x3799, 0x20}, - {0x3881, 0x42}, - {0x38a8, 0x02}, - {0x38a9, 0x80}, - {0x38b1, 0x00}, - {0x38c4, 0x00}, - {0x38c5, 0xc0}, - {0x38c6, 0x04}, - {0x38c7, 0x80}, - {0x3920, 0xff}, - {0x4010, 0x40}, - {0x4043, 0x40}, - {0x4307, 0x30}, - {0x4317, 0x00}, - {0x4501, 0x00}, - {0x450a, 0x08}, - {0x4601, 0x04}, - {0x470f, 0x00}, - {0x4f07, 0x00}, - {0x5000, 0x9f}, - {0x5001, 0x00}, - {0x5e00, 0x00}, - {0x5d00, 0x07}, - {0x5d01, 0x00}, - {0x0101, 0x01}, - {0x1000, 0x03}, - {0x5a08, 0x84}, -}; - -static struct ov9282_reg_list common_regs_list =3D { - .num_of_regs =3D ARRAY_SIZE(common_regs), - .regs =3D common_regs, + {CCI_REG8(0x3505), 0x8c}, + {CCI_REG8(0x3507), 0x03}, + {CCI_REG8(0x3508), 0x00}, + {CCI_REG8(0x3610), 0x80}, + {CCI_REG8(0x3611), 0xa0}, + {CCI_REG8(0x3620), 0x6e}, + {CCI_REG8(0x3632), 0x56}, + {CCI_REG8(0x3633), 0x78}, + {CCI_REG8(0x3666), 0x00}, + {CCI_REG8(0x366f), 0x5a}, + {CCI_REG8(0x3680), 0x84}, + {CCI_REG8(0x3712), 0x80}, + {CCI_REG8(0x372d), 0x22}, + {CCI_REG8(0x3731), 0x80}, + {CCI_REG8(0x3732), 0x30}, + {CCI_REG8(0x377d), 0x22}, + {CCI_REG8(0x3788), 0x02}, + {CCI_REG8(0x3789), 0xa4}, + {CCI_REG8(0x378a), 0x00}, + {CCI_REG8(0x378b), 0x4a}, + {CCI_REG8(0x3799), 0x20}, + {CCI_REG8(0x3881), 0x42}, + {CCI_REG8(0x38a8), 0x02}, + {CCI_REG8(0x38a9), 0x80}, + {CCI_REG8(0x38b1), 0x00}, + {CCI_REG8(0x38c4), 0x00}, + {CCI_REG8(0x38c5), 0xc0}, + {CCI_REG8(0x38c6), 0x04}, + {CCI_REG8(0x38c7), 0x80}, + {CCI_REG8(0x3920), 0xff}, + {CCI_REG8(0x4010), 0x40}, + {CCI_REG8(0x4043), 0x40}, + {CCI_REG8(0x4307), 0x30}, + {CCI_REG8(0x4317), 0x00}, + {CCI_REG8(0x4501), 0x00}, + {CCI_REG8(0x450a), 0x08}, + {CCI_REG8(0x4601), 0x04}, + {CCI_REG8(0x470f), 0x00}, + {CCI_REG8(0x4f07), 0x00}, + {CCI_REG8(0x5000), 0x9f}, + {CCI_REG8(0x5001), 0x00}, + {CCI_REG8(0x5e00), 0x00}, + {CCI_REG8(0x5d00), 0x07}, + {CCI_REG8(0x5d01), 0x00}, + {CCI_REG8(0x0101), 0x01}, + {CCI_REG8(0x1000), 0x03}, + {CCI_REG8(0x5a08), 0x84}, }; =20 #define MODE_1280_800 0 @@ -317,96 +306,96 @@ static struct ov9282_reg_list common_regs_list =3D { #define DEFAULT_MODE MODE_1280_720 =20 /* Sensor mode registers */ -static const struct ov9282_reg mode_1280x800_regs[] =3D { - {0x3778, 0x00}, - {0x3800, 0x00}, - {0x3801, 0x00}, - {0x3802, 0x00}, - {0x3803, 0x00}, - {0x3804, 0x05}, - {0x3805, 0x0f}, - {0x3806, 0x03}, - {0x3807, 0x2f}, - {0x3808, 0x05}, - {0x3809, 0x00}, - {0x380a, 0x03}, - {0x380b, 0x20}, - {0x3810, 0x00}, - {0x3811, 0x08}, - {0x3812, 0x00}, - {0x3813, 0x08}, - {0x3814, 0x11}, - {0x3815, 0x11}, +static const struct cci_reg_sequence mode_1280x800_regs[] =3D { + {CCI_REG8(0x3778), 0x00}, + {CCI_REG8(0x3800), 0x00}, + {CCI_REG8(0x3801), 0x00}, + {CCI_REG8(0x3802), 0x00}, + {CCI_REG8(0x3803), 0x00}, + {CCI_REG8(0x3804), 0x05}, + {CCI_REG8(0x3805), 0x0f}, + {CCI_REG8(0x3806), 0x03}, + {CCI_REG8(0x3807), 0x2f}, + {CCI_REG8(0x3808), 0x05}, + {CCI_REG8(0x3809), 0x00}, + {CCI_REG8(0x380a), 0x03}, + {CCI_REG8(0x380b), 0x20}, + {CCI_REG8(0x3810), 0x00}, + {CCI_REG8(0x3811), 0x08}, + {CCI_REG8(0x3812), 0x00}, + {CCI_REG8(0x3813), 0x08}, + {CCI_REG8(0x3814), 0x11}, + {CCI_REG8(0x3815), 0x11}, {OV9282_REG_TIMING_FORMAT_1, 0x40}, {OV9282_REG_TIMING_FORMAT_2, 0x00}, - {0x4003, 0x40}, - {0x4008, 0x04}, - {0x4009, 0x0b}, - {0x400c, 0x00}, - {0x400d, 0x07}, - {0x4507, 0x00}, - {0x4509, 0x00}, + {CCI_REG8(0x4003), 0x40}, + {CCI_REG8(0x4008), 0x04}, + {CCI_REG8(0x4009), 0x0b}, + {CCI_REG8(0x400c), 0x00}, + {CCI_REG8(0x400d), 0x07}, + {CCI_REG8(0x4507), 0x00}, + {CCI_REG8(0x4509), 0x00}, }; =20 -static const struct ov9282_reg mode_1280x720_regs[] =3D { - {0x3778, 0x00}, - {0x3800, 0x00}, - {0x3801, 0x00}, - {0x3802, 0x00}, - {0x3803, 0x00}, - {0x3804, 0x05}, - {0x3805, 0x0f}, - {0x3806, 0x02}, - {0x3807, 0xdf}, - {0x3808, 0x05}, - {0x3809, 0x00}, - {0x380a, 0x02}, - {0x380b, 0xd0}, - {0x3810, 0x00}, - {0x3811, 0x08}, - {0x3812, 0x00}, - {0x3813, 0x08}, - {0x3814, 0x11}, - {0x3815, 0x11}, +static const struct cci_reg_sequence mode_1280x720_regs[] =3D { + {CCI_REG8(0x3778), 0x00}, + {CCI_REG8(0x3800), 0x00}, + {CCI_REG8(0x3801), 0x00}, + {CCI_REG8(0x3802), 0x00}, + {CCI_REG8(0x3803), 0x00}, + {CCI_REG8(0x3804), 0x05}, + {CCI_REG8(0x3805), 0x0f}, + {CCI_REG8(0x3806), 0x02}, + {CCI_REG8(0x3807), 0xdf}, + {CCI_REG8(0x3808), 0x05}, + {CCI_REG8(0x3809), 0x00}, + {CCI_REG8(0x380a), 0x02}, + {CCI_REG8(0x380b), 0xd0}, + {CCI_REG8(0x3810), 0x00}, + {CCI_REG8(0x3811), 0x08}, + {CCI_REG8(0x3812), 0x00}, + {CCI_REG8(0x3813), 0x08}, + {CCI_REG8(0x3814), 0x11}, + {CCI_REG8(0x3815), 0x11}, {OV9282_REG_TIMING_FORMAT_1, 0x3c}, {OV9282_REG_TIMING_FORMAT_2, 0x84}, - {0x4003, 0x40}, - {0x4008, 0x02}, - {0x4009, 0x05}, - {0x400c, 0x00}, - {0x400d, 0x03}, - {0x4507, 0x00}, - {0x4509, 0x80}, + {CCI_REG8(0x4003), 0x40}, + {CCI_REG8(0x4008), 0x02}, + {CCI_REG8(0x4009), 0x05}, + {CCI_REG8(0x400c), 0x00}, + {CCI_REG8(0x400d), 0x03}, + {CCI_REG8(0x4507), 0x00}, + {CCI_REG8(0x4509), 0x80}, }; =20 -static const struct ov9282_reg mode_640x400_regs[] =3D { - {0x3778, 0x10}, - {0x3800, 0x00}, - {0x3801, 0x00}, - {0x3802, 0x00}, - {0x3803, 0x00}, - {0x3804, 0x05}, - {0x3805, 0x0f}, - {0x3806, 0x03}, - {0x3807, 0x2f}, - {0x3808, 0x02}, - {0x3809, 0x80}, - {0x380a, 0x01}, - {0x380b, 0x90}, - {0x3810, 0x00}, - {0x3811, 0x04}, - {0x3812, 0x00}, - {0x3813, 0x04}, - {0x3814, 0x31}, - {0x3815, 0x22}, +static const struct cci_reg_sequence mode_640x400_regs[] =3D { + {CCI_REG8(0x3778), 0x10}, + {CCI_REG8(0x3800), 0x00}, + {CCI_REG8(0x3801), 0x00}, + {CCI_REG8(0x3802), 0x00}, + {CCI_REG8(0x3803), 0x00}, + {CCI_REG8(0x3804), 0x05}, + {CCI_REG8(0x3805), 0x0f}, + {CCI_REG8(0x3806), 0x03}, + {CCI_REG8(0x3807), 0x2f}, + {CCI_REG8(0x3808), 0x02}, + {CCI_REG8(0x3809), 0x80}, + {CCI_REG8(0x380a), 0x01}, + {CCI_REG8(0x380b), 0x90}, + {CCI_REG8(0x3810), 0x00}, + {CCI_REG8(0x3811), 0x04}, + {CCI_REG8(0x3812), 0x00}, + {CCI_REG8(0x3813), 0x04}, + {CCI_REG8(0x3814), 0x31}, + {CCI_REG8(0x3815), 0x22}, {OV9282_REG_TIMING_FORMAT_1, 0x60}, {OV9282_REG_TIMING_FORMAT_2, 0x01}, - {0x4008, 0x02}, - {0x4009, 0x05}, - {0x400c, 0x00}, - {0x400d, 0x03}, - {0x4507, 0x03}, - {0x4509, 0x80}, + {CCI_REG8(0x4008), 0x02}, + {CCI_REG8(0x4009), 0x05}, + {CCI_REG8(0x400c), 0x00}, + {CCI_REG8(0x400d), 0x03}, + {CCI_REG8(0x4507), 0x03}, + {CCI_REG8(0x4509), 0x80}, }; =20 /* Supported sensor mode configurations */ @@ -485,97 +474,6 @@ static inline struct ov9282 *to_ov9282(struct v4l2_sub= dev *subdev) return container_of(subdev, struct ov9282, sd); } =20 -/** - * ov9282_read_reg() - Read registers. - * @ov9282: pointer to ov9282 device - * @reg: register address - * @len: length of bytes to read. Max supported bytes is 4 - * @val: pointer to register value to be filled. - * - * Return: 0 if successful, error code otherwise. - */ -static int ov9282_read_reg(struct ov9282 *ov9282, u16 reg, u32 len, u32 *v= al) -{ - struct i2c_client *client =3D v4l2_get_subdevdata(&ov9282->sd); - struct i2c_msg msgs[2] =3D {0}; - u8 addr_buf[2] =3D {0}; - u8 data_buf[4] =3D {0}; - int ret; - - if (WARN_ON(len > 4)) - return -EINVAL; - - put_unaligned_be16(reg, addr_buf); - - /* Write register address */ - msgs[0].addr =3D client->addr; - msgs[0].flags =3D 0; - msgs[0].len =3D ARRAY_SIZE(addr_buf); - msgs[0].buf =3D addr_buf; - - /* Read data from register */ - msgs[1].addr =3D client->addr; - msgs[1].flags =3D I2C_M_RD; - msgs[1].len =3D len; - msgs[1].buf =3D &data_buf[4 - len]; - - ret =3D i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); - if (ret !=3D ARRAY_SIZE(msgs)) - return -EIO; - - *val =3D get_unaligned_be32(data_buf); - - return 0; -} - -/** - * ov9282_write_reg() - Write register - * @ov9282: pointer to ov9282 device - * @reg: register address - * @len: length of bytes. Max supported bytes is 4 - * @val: register value - * - * Return: 0 if successful, error code otherwise. - */ -static int ov9282_write_reg(struct ov9282 *ov9282, u16 reg, u32 len, u32 v= al) -{ - struct i2c_client *client =3D v4l2_get_subdevdata(&ov9282->sd); - u8 buf[6] =3D {0}; - - if (WARN_ON(len > 4)) - return -EINVAL; - - put_unaligned_be16(reg, buf); - put_unaligned_be32(val << (8 * (4 - len)), buf + 2); - if (i2c_master_send(client, buf, len + 2) !=3D len + 2) - return -EIO; - - return 0; -} - -/** - * ov9282_write_regs() - Write a list of registers - * @ov9282: pointer to ov9282 device - * @regs: list of registers to be written - * @len: length of registers array - * - * Return: 0 if successful, error code otherwise. - */ -static int ov9282_write_regs(struct ov9282 *ov9282, - const struct ov9282_reg *regs, u32 len) -{ - unsigned int i; - int ret; - - for (i =3D 0; i < len; i++) { - ret =3D ov9282_write_reg(ov9282, regs[i].address, 1, regs[i].val); - if (ret) - return ret; - } - - return 0; -} - /** * ov9282_update_controls() - Update control ranges based on streaming mode * @ov9282: pointer to ov9282 device @@ -639,15 +537,15 @@ static int ov9282_update_exp_gain(struct ov9282 *ov92= 82, u32 exposure, u32 gain) dev_dbg(ov9282->dev, "Set exp %u (~%u us), analog gain %u", exposure, exposure_us, gain); =20 - ret =3D ov9282_write_reg(ov9282, OV9282_REG_HOLD, 1, 1); + ret =3D cci_write(ov9282->regmap, OV9282_REG_HOLD, 0x01, NULL); if (ret) return ret; =20 - ret =3D ov9282_write_reg(ov9282, OV9282_REG_EXPOSURE, 3, exposure << 4); + ret =3D cci_write(ov9282->regmap, OV9282_REG_EXPOSURE, exposure << 4, NUL= L); if (ret) goto error_release_group_hold; =20 - ret =3D ov9282_write_reg(ov9282, OV9282_REG_AGAIN, 1, gain); + ret =3D cci_write(ov9282->regmap, OV9282_REG_AGAIN, gain, NULL); if (ret) goto error_release_group_hold; =20 @@ -656,60 +554,9 @@ static int ov9282_update_exp_gain(struct ov9282 *ov928= 2, u32 exposure, u32 gain) OV9282_STROBE_FRAME_SPAN_DEFAULT); =20 error_release_group_hold: - ov9282_write_reg(ov9282, OV9282_REG_HOLD, 1, 0); - - return ret; -} - -static int ov9282_set_ctrl_hflip(struct ov9282 *ov9282, int value) -{ - u32 current_val; - int ret =3D ov9282_read_reg(ov9282, OV9282_REG_TIMING_FORMAT_2, 1, - ¤t_val); - if (ret) - return ret; + int ret_hold =3D cci_write(ov9282->regmap, OV9282_REG_HOLD, 0, NULL); =20 - if (value) - current_val |=3D OV9282_FLIP_BIT; - else - current_val &=3D ~OV9282_FLIP_BIT; - - return ov9282_write_reg(ov9282, OV9282_REG_TIMING_FORMAT_2, 1, - current_val); -} - -static int ov9282_set_ctrl_vflip(struct ov9282 *ov9282, int value) -{ - u32 current_val; - int ret =3D ov9282_read_reg(ov9282, OV9282_REG_TIMING_FORMAT_1, 1, - ¤t_val); - if (ret) - return ret; - - if (value) - current_val |=3D OV9282_FLIP_BIT; - else - current_val &=3D ~OV9282_FLIP_BIT; - - return ov9282_write_reg(ov9282, OV9282_REG_TIMING_FORMAT_1, 1, - current_val); -} - -static int ov9282_set_ctrl_flash_strobe_oe(struct ov9282 *ov9282, bool ena= ble) -{ - u32 current_val; - int ret; - - ret =3D ov9282_read_reg(ov9282, OV9282_REG_OUTPUT_ENABLE6, 1, ¤t_va= l); - if (ret) - return ret; - - if (enable) - current_val |=3D OV9282_OUTPUT_ENABLE6_STROBE; - else - current_val &=3D ~OV9282_OUTPUT_ENABLE6_STROBE; - - return ov9282_write_reg(ov9282, OV9282_REG_OUTPUT_ENABLE6, 1, current_val= ); + return ret ? ret : ret_hold; } =20 static u32 ov9282_us_to_flash_duration(struct ov9282 *ov9282, u32 value) @@ -740,30 +587,6 @@ static u32 ov9282_flash_duration_to_us(struct ov9282 *= ov9282, u32 value) return DIV_ROUND_UP(value * frame_width, OV9282_STROBE_SPAN_FACTOR); } =20 -static int ov9282_set_ctrl_flash_duration(struct ov9282 *ov9282, u32 value) -{ - u32 val =3D ov9282_us_to_flash_duration(ov9282, value); - int ret; - - ret =3D ov9282_write_reg(ov9282, OV9282_REG_STROBE_FRAME_SPAN, 1, - (val >> 24) & 0xff); - if (ret) - return ret; - - ret =3D ov9282_write_reg(ov9282, OV9282_REG_STROBE_FRAME_SPAN + 1, 1, - (val >> 16) & 0xff); - if (ret) - return ret; - - ret =3D ov9282_write_reg(ov9282, OV9282_REG_STROBE_FRAME_SPAN + 2, 1, - (val >> 8) & 0xff); - if (ret) - return ret; - - return ov9282_write_reg(ov9282, OV9282_REG_STROBE_FRAME_SPAN + 3, 1, - val & 0xff); -} - /** * ov9282_set_ctrl() - Set subdevice control * @ctrl: pointer to v4l2_ctrl structure @@ -818,23 +641,27 @@ static int ov9282_set_ctrl(struct v4l2_ctrl *ctrl) break; case V4L2_CID_VBLANK: lpfr =3D ov9282->vblank + ov9282->cur_mode->height; - ret =3D ov9282_write_reg(ov9282, OV9282_REG_LPFR, 2, lpfr); + ret =3D cci_write(ov9282->regmap, OV9282_REG_LPFR, lpfr, NULL); break; case V4L2_CID_HFLIP: - ret =3D ov9282_set_ctrl_hflip(ov9282, ctrl->val); + ret =3D cci_update_bits(ov9282->regmap, OV9282_REG_TIMING_FORMAT_2, + OV9282_FLIP_BIT, ctrl->val ? OV9282_FLIP_BIT : 0, NULL); break; case V4L2_CID_VFLIP: - ret =3D ov9282_set_ctrl_vflip(ov9282, ctrl->val); + ret =3D cci_update_bits(ov9282->regmap, OV9282_REG_TIMING_FORMAT_1, + OV9282_FLIP_BIT, ctrl->val ? OV9282_FLIP_BIT : 0, NULL); break; case V4L2_CID_HBLANK: - ret =3D ov9282_write_reg(ov9282, OV9282_REG_TIMING_HTS, 2, - (ctrl->val + ov9282->cur_mode->width) >> 1); + ret =3D cci_write(ov9282->regmap, OV9282_REG_TIMING_HTS, + (ctrl->val + ov9282->cur_mode->width) >> 1, NULL); break; case V4L2_CID_FLASH_STROBE_OE: - ret =3D ov9282_set_ctrl_flash_strobe_oe(ov9282, ctrl->val); + ret =3D cci_update_bits(ov9282->regmap, OV9282_REG_OUTPUT_ENABLE6, + OV9282_OUTPUT_ENABLE6_STROBE, + ctrl->val ? OV9282_OUTPUT_ENABLE6_STROBE : 0, NULL); break; case V4L2_CID_FLASH_DURATION: - ret =3D ov9282_set_ctrl_flash_duration(ov9282, ctrl->val); + ret =3D cci_write(ov9282->regmap, OV9282_REG_STROBE_FRAME_SPAN, ctrl->va= l, NULL); break; default: dev_err(ov9282->dev, "Invalid control %d", ctrl->id); @@ -1114,7 +941,7 @@ static int ov9282_get_selection(struct v4l2_subdev *sd, */ static int ov9282_start_streaming(struct ov9282 *ov9282) { - const struct ov9282_reg bitdepth_regs[2][2] =3D { + const struct cci_reg_sequence bitdepth_regs[2][2] =3D { { {OV9282_REG_PLL_CTRL_0D, OV9282_PLL_CTRL_0D_RAW10}, {OV9282_REG_ANA_CORE_2, OV9282_ANA_CORE2_RAW10}, @@ -1128,15 +955,16 @@ static int ov9282_start_streaming(struct ov9282 *ov9= 282) int ret; =20 /* Write common registers */ - ret =3D ov9282_write_regs(ov9282, common_regs_list.regs, - common_regs_list.num_of_regs); + ret =3D cci_multi_reg_write(ov9282->regmap, common_regs, + ARRAY_SIZE(common_regs), NULL); if (ret) { dev_err(ov9282->dev, "fail to write common registers"); return ret; } =20 bitdepth_index =3D ov9282->code =3D=3D MEDIA_BUS_FMT_Y10_1X10 ? 0 : 1; - ret =3D ov9282_write_regs(ov9282, bitdepth_regs[bitdepth_index], 2); + ret =3D cci_multi_reg_write(ov9282->regmap, + bitdepth_regs[bitdepth_index], 2, NULL); if (ret) { dev_err(ov9282->dev, "fail to write bitdepth regs"); return ret; @@ -1144,7 +972,8 @@ static int ov9282_start_streaming(struct ov9282 *ov928= 2) =20 /* Write sensor mode registers */ reg_list =3D &ov9282->cur_mode->reg_list; - ret =3D ov9282_write_regs(ov9282, reg_list->regs, reg_list->num_of_regs); + ret =3D cci_multi_reg_write(ov9282->regmap, reg_list->regs, + reg_list->num_of_regs, NULL); if (ret) { dev_err(ov9282->dev, "fail to write initial registers"); return ret; @@ -1158,8 +987,8 @@ static int ov9282_start_streaming(struct ov9282 *ov928= 2) } =20 /* Start streaming */ - ret =3D ov9282_write_reg(ov9282, OV9282_REG_MODE_SELECT, - 1, OV9282_MODE_STREAMING); + ret =3D cci_write(ov9282->regmap, OV9282_REG_MODE_SELECT, + OV9282_MODE_STREAMING, NULL); if (ret) { dev_err(ov9282->dev, "fail to start streaming"); return ret; @@ -1176,8 +1005,8 @@ static int ov9282_start_streaming(struct ov9282 *ov92= 82) */ static int ov9282_stop_streaming(struct ov9282 *ov9282) { - return ov9282_write_reg(ov9282, OV9282_REG_MODE_SELECT, - 1, OV9282_MODE_STANDBY); + return cci_write(ov9282->regmap, OV9282_REG_MODE_SELECT, + OV9282_MODE_STANDBY, NULL); } =20 /** @@ -1228,14 +1057,14 @@ static int ov9282_set_stream(struct v4l2_subdev *sd= , int enable) static int ov9282_detect(struct ov9282 *ov9282) { int ret; - u32 val; + u64 val; =20 - ret =3D ov9282_read_reg(ov9282, OV9282_REG_ID, 2, &val); + ret =3D cci_read(ov9282->regmap, OV9282_REG_ID, &val, NULL); if (ret) return ret; =20 if (val !=3D OV9282_ID) { - dev_err(ov9282->dev, "chip id mismatch: %x!=3D%x", + dev_err(ov9282->dev, "chip id mismatch: %x!=3D%llx", OV9282_ID, val); return -ENXIO; } @@ -1397,9 +1226,8 @@ static int ov9282_power_on(struct device *dev) =20 usleep_range(400, 600); =20 - ret =3D ov9282_write_reg(ov9282, OV9282_REG_MIPI_CTRL00, 1, - ov9282->noncontinuous_clock ? - OV9282_GATED_CLOCK : 0); + ret =3D cci_write(ov9282->regmap, OV9282_REG_MIPI_CTRL00, + ov9282->noncontinuous_clock ? OV9282_GATED_CLOCK : 0, NULL); if (ret) { dev_err(ov9282->dev, "fail to write MIPI_CTRL00"); goto error_clk; @@ -1576,6 +1404,11 @@ static int ov9282_probe(struct i2c_client *client) return ret; } =20 + ov9282->regmap =3D devm_cci_regmap_init_i2c(client, 16); + if (IS_ERR(ov9282->regmap)) + return dev_err_probe(ov9282->dev, PTR_ERR(ov9282->regmap), + "Failed to init CCI\n"); + mutex_init(&ov9282->mutex); =20 ret =3D ov9282_power_on(ov9282->dev); --=20 2.43.0 From nobody Thu Apr 9 16:33:39 2026 Received: from mx0a-0064b401.pphosted.com (mx0a-0064b401.pphosted.com [205.220.166.238]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E598286400; Thu, 5 Mar 2026 04:35:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=205.220.166.238 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772685326; cv=fail; b=GTReOVlQA+KuNQW7w7Ptamh3SpMNTX7NimtX4cXxHqqy+SiOHr9Sz92gnLg55Igk02Qfn0ju9YxzpYmLJrAbn3/X/5EhYRtNwWgdO9vysgb4LvpHo1hzD9qeCIy7DALFBQ0X+oVnYZMvUnyimJPiRq9uWqdV/l74bowbQkXwJ2s= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772685326; c=relaxed/simple; bh=/lqBUnIFKFmMavSAX2+xgXKqBtAHBi8ZSnaWBXDsUAU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=UJONlHd9wz0D3U8dS6GXdDtt1wf3rAcXFFdL9jsL3BKkRWakQez6mCqtnKsFZP8RBEl37spZvATmStNcsToHpXUlguEDe6N1ahighn360meGxxabEF0rU20eBxPyuK4uGHM6YjyIrTqQhrJBKhrTg2Ay3uHw0vlWUXUmH94InSk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com; spf=pass smtp.mailfrom=windriver.com; dkim=pass (2048-bit key) header.d=windriver.com header.i=@windriver.com header.b=ekUPBfKE; arc=fail smtp.client-ip=205.220.166.238 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=windriver.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=windriver.com header.i=@windriver.com header.b="ekUPBfKE" Received: from pps.filterd (m0250809.ppops.net [127.0.0.1]) by mx0a-0064b401.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6254Hd0U513153; Wed, 4 Mar 2026 20:34:24 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=windriver.com; h=cc:content-transfer-encoding:content-type:date:from :in-reply-to:message-id:mime-version:references:subject:to; s= PPS06212021; bh=6lBLeAmE9Nju177Bih1cgna2MZqkoAL+xQBK8E9yjwg=; b= ekUPBfKERSxeyEXqpg1kYniA/vQuipASF+w9llQHinbJR4WGR48xdGdjnXKANY+O RFs51woRdA8VDAJok0uETCf3YOmqnO/HLpC4OByLBCyeOnO1jvggmdfZjGXIf3eD ZUus2fazUWKszb3aB6FABYjYjTmtwjDpRti7Gdb+CrKBUVziwrVYcrYYVjK/dF8w OYZTzpQT8kUawLx6xiTzMEgJGBY0drYlF6w3Y8eJXtS0Vtr3wNsBnqvO+IYSIRvB r9rQET1gVQ4DMhGpUbp+LYL6ifLau79DQPcm2CiBQ7oLpx9fcFRvJXUMgio7Szgv nBrvy1YY6BcO1oSBq2pPsg== Received: from cy7pr03cu001.outbound.protection.outlook.com (mail-westcentralusazon11010051.outbound.protection.outlook.com [40.93.198.51]) by mx0a-0064b401.pphosted.com (PPS) with ESMTPS id 4cm0rgnfp9-1 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Wed, 04 Mar 2026 20:34:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ddTDfrSBrJW3t3yPs2xxH9PMPOj9KbyQCi8xbXtgBCH3gaSgHOCHuARRgHK4V0/kd68qA2vNyi5eS5rQ+UTtJrJyL7TOlAqLog/wrL/i6Nwm2KV9W9W1X+aUCB45tDNupTp6myA0p9W+sRgm2D7LnwIGARsWi3+6h56VNljP2psAdq9TvqOFHKyXcQbHhv1WrXkWeCvaU4SQyJWd0Ysq31mbmp85lvRAcSKdNKpkyL5v+gYfs6gws4m//OT+L3hHfXM/XtwI6VZ/H13E2v0hd/qLthGCU6EsD1VTDrEbl4vyaKmsJumHM8dXwie3Up4HiQUxaq1LqvMK968JsJROWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6lBLeAmE9Nju177Bih1cgna2MZqkoAL+xQBK8E9yjwg=; b=j9ATQi4TtjZxAhFimDzDz/JbsC1USNvXDWlaK+2rY7Ghun206uJLVduIW/3MHBdIILPu7if3yzEggpN6PNi+b5XjIpTC9yIHVBV0B2pe6MFM8Ej4+/kHP66jHkFMxc7D1h0MojQEgN9CO6RH3dzpXOB1Jk63OW/VP1pRFKd89LJafR+EZ1F+zSZunKGiO0W52OhznsaCCqBwCcMc/h8fybPtVS9ChTwBEn8feoUwgcgV02AmXwEYvdfS75d+1Bf048x1T8y67vyDlxvEt6SnkaapQCrDJhwsO+z49PBc68x2FcCM6LAmm65SelDAg/FSPROG/GkGSiUdYizQ/xwjfQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=windriver.com; dmarc=pass action=none header.from=windriver.com; dkim=pass header.d=windriver.com; arc=none Received: from DS4PPFD667CEBB6.namprd11.prod.outlook.com (2603:10b6:f:fc02::53) by SJ2PR11MB8347.namprd11.prod.outlook.com (2603:10b6:a03:544::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9678.18; Thu, 5 Mar 2026 04:34:22 +0000 Received: from DS4PPFD667CEBB6.namprd11.prod.outlook.com ([fe80::5f46:caa4:60d4:f669]) by DS4PPFD667CEBB6.namprd11.prod.outlook.com ([fe80::5f46:caa4:60d4:f669%2]) with mapi id 15.20.9654.022; Thu, 5 Mar 2026 04:34:22 +0000 From: Xiaolei Wang To: sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, tarang.raval@siliconsignals.io, jacopo@jmondi.org, mchehab@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, hverkuil+cisco@kernel.org, johannes.goede@oss.qualcomm.com, hverkuil-cisco@xs4all.nl, jai.luthra@ideasonboard.com, dave.stevenson@raspberrypi.com, Xiaolei.Wang@windriver.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/3] media: i2c: ov9282: Switch to using the sub-device state lock Date: Thu, 5 Mar 2026 12:33:49 +0800 Message-ID: <20260305043350.2151936-3-xiaolei.wang@windriver.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260305043350.2151936-1-xiaolei.wang@windriver.com> References: <20260305043350.2151936-1-xiaolei.wang@windriver.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SG2PR02CA0032.apcprd02.prod.outlook.com (2603:1096:3:18::20) To DS4PPFD667CEBB6.namprd11.prod.outlook.com (2603:10b6:f:fc02::53) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS4PPFD667CEBB6:EE_|SJ2PR11MB8347:EE_ X-MS-Office365-Filtering-Correlation-Id: 96bceba6-40f5-4942-66b0-08de7a707935 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|52116014|376014|1800799024|366016|38350700014|921020; X-Microsoft-Antispam-Message-Info: ROXuezPY1fSRG3fOKAElczBHZxUXM1XRYL7F7WVCfW73iecBw9X0xPgMc8PLIrZOP1gM2mGNJ9PRqFGcqN/S8nylHD21KGwnKzy7HCkunTXWovStFGZVJn4cPXabPsCZIzjq+YkkJIxxxL0GtOk6v7XAMubbSu9/3q9tf6BkaK9gpnJfOLebFCxXg+sUak1CXyZIVv/yotf4D+lXl4HZZ6d8HcTaKcbBxfRNGextiJzW+xjx6xM8Q0Zm9CZcKUcYCsIyGSyWVUmBPXAmC5sboBfkmbl40uwUThXS8YPcv5kCMOK66BXblGXgqvMDlnAwJtSWua3OdfWpWE0UBaraLx3W7hPGhhKGPzW8vERC933Ouq/L6qogdJe25lNadzAzqz8A6/0oAET6kuxm5+8k6KyGFF8aNEJqXohNs3gGEjgAWgl6rDltdrqLxdoCNpOHG/sTY19JjDlAKh+vOGTScxqthTV/JzbS4siIHfMC944c0NK8NSWMFT1gJjfeDRc4EjPslCbGeyP3ey2Ox7ybwLWtWZ+N6wkTVIm7zj/VrW7XBqXemzJpKizHpUKeOVN0Bun1AM4YcpGfQ7dyL2zzEXn49rx4mYf+m/MgTcKBS1UZBB6j/QyYq2MueWfiVIjvuDr6z5OyuAdU4O2tUR6tgYTYUqQx72/u4c1vPkjzpqo0XdZ+Ee35Cne9jGBEQyHce/IW4W9NAqQRIFasXsiS36sDM4ZSAeu7SO/pYCNxS8DfocSAgH6n8GLOuV5P097MvpoyzDGmHDYfDx3j29h7VjoOOdjfldEv/p6JBkfd4daYyjrtEVYmSdBd7OVnRD6N X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DS4PPFD667CEBB6.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(7416014)(52116014)(376014)(1800799024)(366016)(38350700014)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?Wd/8VjcQhs6Gn9QlLuD0qXb76dl3M1606wrw0EBaubWDBpnhHuTkBkI/gUuO?= =?us-ascii?Q?ghwJRUvAu9mwW5TQl2OrsT2nsr7ucSpg8enr1rT88shtBNEfbduYGM3fsrPV?= =?us-ascii?Q?iRRwCw3UM2HMWKyohs/haGTv2qRKCokmiDjsBezzYxtHMtxnFxzgtsVEeuah?= =?us-ascii?Q?Cr3h74l5LwY+QcOb1pwygzNUtO2lavCdfBopWouA3FaOi5fjXSOne9JjeNKr?= =?us-ascii?Q?5R7KgiThzC50ALWrRJ7BjxDMYZ8tpml5AinckCNReD99mN0bWTh0xnX3lbtX?= =?us-ascii?Q?sRyjE9ckt15+nCLuKk28kvhd3hAeloB9T3zSS7/rcvVVthWjQ7xf94qYzUiZ?= =?us-ascii?Q?Lb1eL3B/UNv0y3So/rAk43Gb7iqXiea67AaEBGFIC/5GFh5t1ZNJU8pOi1Gu?= =?us-ascii?Q?g+Pwke8MolWtwmNUyZmv/GUnWwb6NPVA0btp/tGudU/emixp3DutYhJIWm1v?= =?us-ascii?Q?TKMIz3BhFeudjyrYpcPsqyWtJz0Oj6ZIijtpp64yvvJ/X4tRx+MX0jpoJADU?= =?us-ascii?Q?GeTMZPiqOyJwy8W93dORboW5AwiWTAhf9o+f9KinPbNEszs+gXENSeHNJDKf?= =?us-ascii?Q?WeVQ+ZC/fOxptnKMYfqO3eItnPf5NgwUMRNHqCvuQi436fA0SDiEKU0QVDid?= =?us-ascii?Q?rYUPq+E//Gow4LeaRli/krh1mbpX9Tbj5j8DV4ewO0milgZXGO+h07vsaYH/?= =?us-ascii?Q?ZGJX29HE9acAqL1YsVlQO6cg+scQiAimvCWPtlPHX84JjWpge9thdi6ALV2m?= =?us-ascii?Q?H9Z9m7iBRqKZKGoqX0vYcpkSfON895SlxefvVDDFtYEM5evilaxMPpcz7jiT?= =?us-ascii?Q?LYl332/IBQiyr86B/K9SH6trcuku/RdesMpuSqwaMwzcDVmCjTgaX5BkQ27h?= =?us-ascii?Q?TIcVGE7bT061q03zyZly0TF2GCxzb0eO/wn/ugeE6/4KXkjSv1IGjaOhdd0l?= =?us-ascii?Q?J61xYp7Qqbs/Y2gKpw7e7dOOcdtLvuGTCJ/9GnfeP/qk1qdlK9Jdwkxd4/3/?= =?us-ascii?Q?RC8u1E/EvKvhGmMOASfHKOTlQ0cl68J9S9i92uEvjObdZXjtKlHaM0HcwS/B?= =?us-ascii?Q?/QfQ+PtYudM28QmoMSZwFac7SL6NXNCDxnbMhN9IkNpbSSwSDVTHZ+4mi+i6?= =?us-ascii?Q?8/S/yDSdpK3iYxCYCfo7vTvBNpXKYBhxFcLP11xg+mOsKXRMO3RPacYMQHKN?= =?us-ascii?Q?HPFK1JX7HA5HTy55YFGdFnOqMugeYdWHCHRImvAQZBn0MewyM9osviX11nw0?= =?us-ascii?Q?DdwkEUF+542Ov2x3mWIoUoPXNjZOACspOk+zebYoxjsU/+ZiDzDwpDyIB8YV?= =?us-ascii?Q?ZExxGPi901/7aPC3hsJjjKde6CiaC84hC0tIjktxmy4b9M01dhBGnXteai59?= =?us-ascii?Q?t/OAaP5HlPIflaOTZecQYt8lTepF3UOMJ12s1BBESlFX0giePZUnE60MoM2D?= =?us-ascii?Q?ZWbhBpxA0FGib5oAuDQHEqwAdnzfe9DRC7LtXIyqCW4U44T5FKk7ZLb9g9uk?= =?us-ascii?Q?GJZCaMiHhBn19Xujn/UzpOgt41TQADO2YL9LPsSYDMvNKtGX06xqDY6XH6O6?= =?us-ascii?Q?BgD9ugw1gIzM6bZwx+kjHnxwmNNrCWOzKIEpzSddNMO/U/5oq1SkQUQMggtA?= =?us-ascii?Q?bT3sg4+BoWouRh8dRjYCX9KORHVT4k126U2l0G4lKTkSiy1mwW49+7K68mUu?= =?us-ascii?Q?FKg+GdWfVggvYSnicsovt5hUMeChCHkX6RBpTSlegF7pQ+2CVx6A2dhcmsba?= =?us-ascii?Q?dybYpVlo1EqMGcaVooLgJQAhzfGxELU=3D?= X-OriginatorOrg: windriver.com X-MS-Exchange-CrossTenant-Network-Message-Id: 96bceba6-40f5-4942-66b0-08de7a707935 X-MS-Exchange-CrossTenant-AuthSource: DS4PPFD667CEBB6.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2026 04:34:22.3282 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8ddb2873-a1ad-4a18-ae4e-4644631433be X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6FaBGvCu/BFkcabhTjvl6Z23dcwDQaMZmocBiVquGqithV95bVKl9pXy0kbdO96pIZPcNaHEuHy9Dfw1uCTCp1Rr9YdKRl0usWNCFQVh+OQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR11MB8347 X-Proofpoint-GUID: i9-5skMpCoMBb41rPglQwcKb814QSELl X-Authority-Analysis: v=2.4 cv=Of+VzxTY c=1 sm=1 tr=0 ts=69a907d0 cx=c_pps a=PojWdYBvulneKNx6glcDcw==:117 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=bi6dqmuHe4P4UrxVR6um:22 a=iKiJcTA2PjBS6x5JeXcw:22 a=t7CeM3EgAAAA:8 a=b-pzV9cxAM0HHkGdTPcA:9 a=FdTzh2GWekK77mhwV6Dw:22 X-Proofpoint-ORIG-GUID: i9-5skMpCoMBb41rPglQwcKb814QSELl X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA1MDAzMiBTYWx0ZWRfX/04bQx5nLhbC SKHrcKlbMRaDyuTFo2SgDqIQ58W8zNOnMrE0nZIg4ir41UnkWDc/HtoCQ1GCS2jJ9lDGwvr89XD XjcgJw9avt1CrkTEb7oDgVSy+/mmruZOqgWoeWdHFXq5P5jfnJnkpQ/8I2Os7bbFqScmtIIJoiZ Ty0tJcbHGVKtWkbVnKgoQbXv3DqPL40ZFW2EPlsstLMXv2tp3rXbD8XtCj/vGm2azJYIKAJdGf/ pSkhH+cbdTkV0pTyq9es2CaAJFYBBJNqicDzfEdMY2RH6nwWxcsMavzU72BFP+P/OpTTVm4P1kH I28LUbrGkA5AlPXrnJvZbEYK3qk2ecKFjjn0a3yNA9vqCYS19yezrmmHlUfY2uKchLnTwMeQ53g Uwy6RBIB/qJgMnKl8okntBo1QnpfYuNmVlCQ9ZFbcWvC4otcSBBigyjLgMMPy92S34YSmw44uNd hTDI4xekZfYDBs772Lw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-04_09,2026-03-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 spamscore=0 impostorscore=0 malwarescore=0 adultscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603050032 Content-Type: text/plain; charset="utf-8" Switch to using the sub-device state lock and properly call v4l2_subdev_init_finalize() / v4l2_subdev_cleanup() on probe() / remove(). Signed-off-by: Xiaolei Wang Reviewed-by: Tarang Raval Reviewed-by: Dave Stevenson --- drivers/media/i2c/ov9282.c | 51 +++++++++++++++----------------------- 1 file changed, 20 insertions(+), 31 deletions(-) diff --git a/drivers/media/i2c/ov9282.c b/drivers/media/i2c/ov9282.c index 56f854a4d04f..98e0a0732ef7 100644 --- a/drivers/media/i2c/ov9282.c +++ b/drivers/media/i2c/ov9282.c @@ -221,7 +221,6 @@ struct ov9282 { bool noncontinuous_clock; const struct ov9282_mode *cur_mode; u32 code; - struct mutex mutex; }; =20 static const s64 link_freq[] =3D { @@ -795,8 +794,6 @@ static int ov9282_get_pad_format(struct v4l2_subdev *sd, { struct ov9282 *ov9282 =3D to_ov9282(sd); =20 - mutex_lock(&ov9282->mutex); - if (fmt->which =3D=3D V4L2_SUBDEV_FORMAT_TRY) { struct v4l2_mbus_framefmt *framefmt; =20 @@ -807,8 +804,6 @@ static int ov9282_get_pad_format(struct v4l2_subdev *sd, fmt); } =20 - mutex_unlock(&ov9282->mutex); - return 0; } =20 @@ -829,8 +824,6 @@ static int ov9282_set_pad_format(struct v4l2_subdev *sd, u32 code; int ret =3D 0; =20 - mutex_lock(&ov9282->mutex); - mode =3D v4l2_find_nearest_size(supported_modes, ARRAY_SIZE(supported_modes), width, height, @@ -856,8 +849,6 @@ static int ov9282_set_pad_format(struct v4l2_subdev *sd, } } =20 - mutex_unlock(&ov9282->mutex); - return ret; } =20 @@ -904,10 +895,8 @@ static int ov9282_get_selection(struct v4l2_subdev *sd, case V4L2_SEL_TGT_CROP: { struct ov9282 *ov9282 =3D to_ov9282(sd); =20 - mutex_lock(&ov9282->mutex); sel->r =3D *__ov9282_get_pad_crop(ov9282, sd_state, sel->pad, sel->which); - mutex_unlock(&ov9282->mutex); =20 return 0; } @@ -1019,9 +1008,10 @@ static int ov9282_stop_streaming(struct ov9282 *ov92= 82) static int ov9282_set_stream(struct v4l2_subdev *sd, int enable) { struct ov9282 *ov9282 =3D to_ov9282(sd); + struct v4l2_subdev_state *state; int ret; =20 - mutex_lock(&ov9282->mutex); + state =3D v4l2_subdev_lock_and_get_active_state(sd); =20 if (enable) { ret =3D pm_runtime_resume_and_get(ov9282->dev); @@ -1036,14 +1026,14 @@ static int ov9282_set_stream(struct v4l2_subdev *sd= , int enable) pm_runtime_put(ov9282->dev); } =20 - mutex_unlock(&ov9282->mutex); + v4l2_subdev_unlock_state(state); =20 return 0; =20 error_power_off: pm_runtime_put(ov9282->dev); error_unlock: - mutex_unlock(&ov9282->mutex); + v4l2_subdev_unlock_state(state); =20 return ret; } @@ -1285,9 +1275,6 @@ static int ov9282_init_controls(struct ov9282 *ov9282) if (ret) return ret; =20 - /* Serialize controls with sensor device */ - ctrl_hdlr->lock =3D &ov9282->mutex; - /* Initialize exposure and gain */ lpfr =3D mode->vblank + mode->height; ov9282->exp_ctrl =3D v4l2_ctrl_new_std(ctrl_hdlr, @@ -1409,13 +1396,10 @@ static int ov9282_probe(struct i2c_client *client) return dev_err_probe(ov9282->dev, PTR_ERR(ov9282->regmap), "Failed to init CCI\n"); =20 - mutex_init(&ov9282->mutex); - ret =3D ov9282_power_on(ov9282->dev); - if (ret) { - dev_err(ov9282->dev, "failed to power-on the sensor"); - goto error_mutex_destroy; - } + if (ret) + return dev_err_probe(ov9282->dev, ret, + "failed to power-on the sensor"); =20 /* Check module identity */ ret =3D ov9282_detect(ov9282); @@ -1448,27 +1432,34 @@ static int ov9282_probe(struct i2c_client *client) goto error_handler_free; } =20 - ret =3D v4l2_async_register_subdev_sensor(&ov9282->sd); + ov9282->sd.state_lock =3D ov9282->ctrl_handler.lock; + ret =3D v4l2_subdev_init_finalize(&ov9282->sd); if (ret < 0) { - dev_err(ov9282->dev, - "failed to register async subdev: %d", ret); + dev_err_probe(ov9282->dev, ret, "failed to init subdev\n"); goto error_media_entity; } =20 pm_runtime_set_active(ov9282->dev); pm_runtime_enable(ov9282->dev); + + ret =3D v4l2_async_register_subdev_sensor(&ov9282->sd); + if (ret < 0) + goto v4l2_subdev_cleanup; + pm_runtime_idle(ov9282->dev); =20 return 0; =20 +v4l2_subdev_cleanup: + v4l2_subdev_cleanup(&ov9282->sd); + pm_runtime_disable(ov9282->dev); + pm_runtime_set_suspended(ov9282->dev); error_media_entity: media_entity_cleanup(&ov9282->sd.entity); error_handler_free: v4l2_ctrl_handler_free(ov9282->sd.ctrl_handler); error_power_off: ov9282_power_off(ov9282->dev); -error_mutex_destroy: - mutex_destroy(&ov9282->mutex); =20 return ret; } @@ -1482,9 +1473,9 @@ static int ov9282_probe(struct i2c_client *client) static void ov9282_remove(struct i2c_client *client) { struct v4l2_subdev *sd =3D i2c_get_clientdata(client); - struct ov9282 *ov9282 =3D to_ov9282(sd); =20 v4l2_async_unregister_subdev(sd); + v4l2_subdev_cleanup(sd); media_entity_cleanup(&sd->entity); v4l2_ctrl_handler_free(sd->ctrl_handler); =20 @@ -1492,8 +1483,6 @@ static void ov9282_remove(struct i2c_client *client) if (!pm_runtime_status_suspended(&client->dev)) ov9282_power_off(&client->dev); pm_runtime_set_suspended(&client->dev); - - mutex_destroy(&ov9282->mutex); } =20 static const struct dev_pm_ops ov9282_pm_ops =3D { --=20 2.43.0 From nobody Thu Apr 9 16:33:39 2026 Received: from mx0b-0064b401.pphosted.com (mx0b-0064b401.pphosted.com [205.220.178.238]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D1160286A4; Thu, 5 Mar 2026 04:35:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=205.220.178.238 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772685314; cv=fail; b=Pi09vmAbnXmk14IP3BaesvMLYWQsEdeXE3AeKTSHmDnB0H5v/t9pU0WSGTRka5UrEorXlboOzygwkBet5j10XEGyGkb+wgQHYyRF7XnPiMGF70W7oYwh41/4QY1AM+ZGb+ZMwCuqJGbGKfoRSma/czobM7XrgDck0tNDroCsVg8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772685314; c=relaxed/simple; bh=E/gpd8buGKooo4XrQ3iesURJLI5sK+nMOE4PSpCfUzw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=dyJZjy5nsgztV3rfAyouEyulVQXfx1rv7PwaxbBuf6MDOCUVPU+LGcwNTWPJvpIimjC/Tvbe7+5qOmt+hlIfw7FzE6TX9Ttc4q5ZfrKP0Zek1biap2dlgUvy31uywe58OaP62BO0bM1VKwEHWrHaQBY3MuiPwaYTh0/bSTnHra4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com; spf=pass smtp.mailfrom=windriver.com; dkim=pass (2048-bit key) header.d=windriver.com header.i=@windriver.com header.b=fbxTzwkW; arc=fail smtp.client-ip=205.220.178.238 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=windriver.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=windriver.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=windriver.com header.i=@windriver.com header.b="fbxTzwkW" Received: from pps.filterd (m0250812.ppops.net [127.0.0.1]) by mx0a-0064b401.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6252U1Qq2001864; Thu, 5 Mar 2026 04:34:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=windriver.com; h=cc:content-transfer-encoding:content-type:date:from :in-reply-to:message-id:mime-version:references:subject:to; s= PPS06212021; bh=5GhiMyD/9HmU5VY7553WLZn7bkMmIjfSD5wqs9xXKM8=; b= fbxTzwkW0rs2JW5vyKYsSe1vtcroRtcSXrq47E86KtI8SceJdFMBojgBMGOEF2/M zCXXuu6rjVRz8cszH2ZkkFz9lkz9RkEpS8xBUK7OVLU0k0mvq3V/gRzCQagJwJu3 oMabTRsK+kqLZKw3+BZfdFS3paYtSg7+/gCJwudEMPwo7kKYIiEVIwegniOEyDdN myHYmxKPIKRoEo3GGskQvSi61hHJJu2RMUPmQeergu4baJ73cDEkIsXtgPXNt5Ff zYcqhmNSewiqaK4s/kCXXooWrjo92m/as8FJm3sYsNryGxoJiaMwYZhu9xhUIpKh rzsGtt/V3jACtulTYG7Y5Q== Received: from cy7pr03cu001.outbound.protection.outlook.com (mail-westcentralusazon11010056.outbound.protection.outlook.com [40.93.198.56]) by mx0a-0064b401.pphosted.com (PPS) with ESMTPS id 4ckqb4nxsh-1 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Thu, 05 Mar 2026 04:34:29 +0000 (GMT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=RriKIaRuIZTThkQx543dGbwWV0mAeQYrEIw0W0BgycLsBmpOT3NyGX8lV133pAhPp071Xh3fvzIMUQvBuZA4C8OWfIQlBq9nIUD7VygBgDlgvBgz+c2PZU4Q3VHMEXV08mxRShfAbH1+Ctq6Km1u7LUTqQAW2v/fqHoZeveque66/roTg37RqRZ6IccZs5psml+SVSxu6A85HPTQYNkIbc4IlUhDFQyY21bMRhYQLzYCxmj/ANkFuXGAYn9DHTJ50reB7JNwj5MB/oxjmmxI2La5Z62ZZEAiq45XTsF8e2nD9CCZrkHurv+jspnfIKZu1ChJvB9CcsTgLZABQ2k+3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=5GhiMyD/9HmU5VY7553WLZn7bkMmIjfSD5wqs9xXKM8=; b=dGV7cJ8XnZO1lgN/vz4XLuw7ukPVth9LJhhOxutV1WrNQOS3BAng/6/QxPfgWY1GeXMd0aBYJjojV5VnlnxPdWDa8WQF2mRybfPVYYwT+VMe1XuLlitiwMF1Wlvt28BORarziHjqRLTMLi7+hH5i9AmTYxDySUPxDUyggK3nV0qUo9cbfHAT3sz54AXfhE53Dj9L7zYiy7F6aIcKiUYtAmCMcZ/jdrgmBuomdvQcO6y8/0wMAHUoI+p4NKnRzEfaoHOjNoX/cVrgTlzwVMN7MJeW43w3iy7ciLTPhuN7XN9ZQf2nAjCsInl00h7UkglEliOfQNlUXI0bdvnkFUQ1Aw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=windriver.com; dmarc=pass action=none header.from=windriver.com; dkim=pass header.d=windriver.com; arc=none Received: from DS4PPFD667CEBB6.namprd11.prod.outlook.com (2603:10b6:f:fc02::53) by SJ2PR11MB8347.namprd11.prod.outlook.com (2603:10b6:a03:544::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9678.18; Thu, 5 Mar 2026 04:34:27 +0000 Received: from DS4PPFD667CEBB6.namprd11.prod.outlook.com ([fe80::5f46:caa4:60d4:f669]) by DS4PPFD667CEBB6.namprd11.prod.outlook.com ([fe80::5f46:caa4:60d4:f669%2]) with mapi id 15.20.9654.022; Thu, 5 Mar 2026 04:34:27 +0000 From: Xiaolei Wang To: sakari.ailus@linux.intel.com, laurent.pinchart@ideasonboard.com, tarang.raval@siliconsignals.io, jacopo@jmondi.org, mchehab@kernel.org, prabhakar.mahadev-lad.rj@bp.renesas.com, hverkuil+cisco@kernel.org, johannes.goede@oss.qualcomm.com, hverkuil-cisco@xs4all.nl, jai.luthra@ideasonboard.com, dave.stevenson@raspberrypi.com, Xiaolei.Wang@windriver.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/3] media: i2c: ov9282: switch to {enable,disable}_streams Date: Thu, 5 Mar 2026 12:33:50 +0800 Message-ID: <20260305043350.2151936-4-xiaolei.wang@windriver.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260305043350.2151936-1-xiaolei.wang@windriver.com> References: <20260305043350.2151936-1-xiaolei.wang@windriver.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SG2PR02CA0032.apcprd02.prod.outlook.com (2603:1096:3:18::20) To DS4PPFD667CEBB6.namprd11.prod.outlook.com (2603:10b6:f:fc02::53) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS4PPFD667CEBB6:EE_|SJ2PR11MB8347:EE_ X-MS-Office365-Filtering-Correlation-Id: 028e721a-889d-4647-246f-08de7a707c07 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|52116014|376014|1800799024|366016|38350700014|921020; X-Microsoft-Antispam-Message-Info: FBAjoES3UfT++zdhEdYz9Fhyn63apLY4N4K9PGtTMjOoZlIweOCn4oC9WKFfeX0a0lJDGHiW8Vs+uuryvXz1odmK3VjfGXZjHjUA9fz6t+65QxqRYZ+Cmu+ARypgvGZy+SGFUD8Pw5gx01le44Wk8GjPUtaiNyRX68EdAsOYFxUasEmPh8JiYsJVKx3+UVhSreLtvHXWhRSO+51Qokb/uBTB0vJO/OAHiEHO+QR39ZTlUf1Hhp2cKHjiA12wUc5Zr3oLz/6M3kMQBj3UYaTdm+T7gPLDBp6HNf2Lkw49iexSKaBg2vFvldn3QNx/U2lJPGqrE+lTOL07P1COFXWK+ARATN174MhGsy5/t0U/C1bq1RxjWcDke49hQQYc6TBK5HRM5m+9WBvWPaUh8PgPvX2/z+ec42ge6mPlUEh2VcozdjPF8VzFV5j6V6so6hi3kOFncY/g2aEanXmszCi1etQriHwfKdMJRmHD5wVUw9gjKAHgr6KdEZh5jFQKYgZKJrObxSukjv7ExVAeOdlMdEWicJz5voo3XSrOiMr1Hf1brvKLKCDy+56JOc0dfvw+8OydLTnphyZbj8CHsOTJ5N+12t5e3RQtwe4PXDvxshCezQNdwFNxCUBO16NG43nL8BjTwNVOVr0A/8459PJmutuiwIIVAkZelaLhLXSH/iqpkLMG5NnaQqM3Fzx+dcqHvwEghZuoyZkhdPUIGNUNQ7kPWNZCZ8VRUl+zpjHoVfSD8s1+BMCCAmyCOdNdMv6zn5PUGWeV7shSjDb7LCFudZKtoEh21DdIwKzKWtf4WxklQsJfSkcTUF18N8bWa0MX X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DS4PPFD667CEBB6.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(7416014)(52116014)(376014)(1800799024)(366016)(38350700014)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?QobkDWp0VGMamOacFblxvyUTBLtdPCuJCW1pfSfPLtijgEWV9PmJH1JAPR/G?= =?us-ascii?Q?cHh3/hr0cOqth4VKUiHiJVoKp+oOTKpPx+PXqN2RvLxkmJ8cLwATpiTuw1dc?= =?us-ascii?Q?l7FVQ1PGdbqB/k634E4/YB5s6MBRg3ry8/lQ4Xd67WVDusAw3xvahwhhys1r?= =?us-ascii?Q?CNlmEda+h6U3A2XtCRlXHWNBlAQUzaMGTHzrP1MEXPqA9Uei0y+dWfHy1d0B?= =?us-ascii?Q?Db6h3fm/8Do06sFxj+iplM9sFpKhunTMCZQIr5b64QJguny1KMAd2UujkFE2?= =?us-ascii?Q?N6EbqLGZZnfxQq7Zdtl5Xv1ibn7NmMHJK3Ffwdz40fREy4O8eKBvT0AZKvHf?= =?us-ascii?Q?v8irsHp8wnw7jpT+fVzZeieM7kL8Uy8sJu/GMR1PNIFHhawk5fgxZ12P7NQX?= =?us-ascii?Q?wrcJtz+yydSd6TfMH6IGv1OaCm/+exHMvjlq8ehbujDdkfHDnLtzBDGhkQqw?= =?us-ascii?Q?PP6aul2MEm7v4O8stlQOr2JkoGN4I8E1A24ZT9fk4ZhuzOWbpE1d0pLPUAYg?= =?us-ascii?Q?/PtBk48LRZzkKgfGe/v1/S8AF5kBSdDIwcRBGi4RBxvW9UPk8R0Bc2lQkHQZ?= =?us-ascii?Q?T4Fset1g02fE27a1m/D9ilnLwDz+LIFiGRzUffJGss5vEs36Mlns5Kg4x7TS?= =?us-ascii?Q?Hy+SGv/spz7pMX9sZIEr/UXIT3W1rNvFB+xHUow7RpBe8dCTKGzA/RTfNL59?= =?us-ascii?Q?mn0L717pQfCh8OHlKkxu0dy+vycn/KgYGqObi+/+1mhYfNYhkYqJa6G6XYMO?= =?us-ascii?Q?iZ1cvJOUCvtW1G+q197mYer9Vn57cbfhGOzWbEr+V62OusGwd4sOABn6Jd8w?= =?us-ascii?Q?/OyMnm/rmy8GLf0K78So5JJBr2wY8qAW+X7PmEMgxlGxJMvIK5AjNA6Gfjy/?= =?us-ascii?Q?5g2/u0dHHB9MQPXDtcvJX/ksrFtitl431OdBcT6y7XQcl8Wd1IXVphQwj1EC?= =?us-ascii?Q?Aqm732D3y53vgcMW3RWyevMU+8XbhKc2Z/Sa8KbRm+uDVlKUGf3tG1RkDE4V?= =?us-ascii?Q?yEbeoaqKQA3V79U31IIbIYGsmUjXepClwupzK9nnlfc66BvjM1TDsf3iCygc?= =?us-ascii?Q?hCINb4B8/kVbOhGSehIAPRJ3i7ZJy8eapLieKxHrOchEzlZAeS1qTGaTkmP0?= =?us-ascii?Q?q/9LQf33gjY07PpE74Kjxcm2tirhCP80tAdTLQDJ3g6GdY+25qoCS3vtV/TP?= =?us-ascii?Q?X4iF5FN49nushDcfycJNzIcvOs3mY65AEi8Jhwns5G0q0jOAJhErlBB0imBy?= =?us-ascii?Q?SNvgSzp3iNdni63YTF1DQehTsJUgksPSj61+W0kRXaDJf9JWnpcoSA+N2AWZ?= =?us-ascii?Q?CAvFTLeLIXwH8ldjzhtYNfoCYV5utVKGJRCaHPhzIe3dgysC0jYhBYJtxhZL?= =?us-ascii?Q?wdi/TPHmJjpOxFeGcMJygQ7X2dxRCYCfY8z6L7FpZANONKxFEG/0/kur6KAA?= =?us-ascii?Q?SGyOc3P1LqKFzohf3Ubd/1HJKZSMWMSs9jMjYCwH579rpFmjrWELAEQvE+eT?= =?us-ascii?Q?8DVhrN94CUXsQPxi45L9u8+q3ubKKGmt2ZINCQCkjjqsxrEHv3XL5BcyPMes?= =?us-ascii?Q?qzM5iNiIV9zLgQoHTyKFuTaoDXf/SV1lvk1fUXCFKGkmnZS2SYm3G9y6C52/?= =?us-ascii?Q?N082fwVzz9IIiLtrNPpfw0p0PNOjAg3m9DnwnrfsFY0IGBv8X6/1PoDimQBH?= =?us-ascii?Q?/CDzeMB73bLbbRBc0c04QX7YEgT1It1wiQPJgyHlGzK5d37KqL3/Gyc9b645?= =?us-ascii?Q?a93eFy/Z3NFMc45yZX6iCN0gPKrBzHY=3D?= X-OriginatorOrg: windriver.com X-MS-Exchange-CrossTenant-Network-Message-Id: 028e721a-889d-4647-246f-08de7a707c07 X-MS-Exchange-CrossTenant-AuthSource: DS4PPFD667CEBB6.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Mar 2026 04:34:27.3812 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8ddb2873-a1ad-4a18-ae4e-4644631433be X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: GG0TT+TElR4qcDfz5nE1ieBLqTf1QMmS69JPUUjA/VrBSEV9sZIm17KbND88zMm9IPXGYOeDxBXEVa6YfD0fnjMLC8KA6rSGgR88b7t/PW0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR11MB8347 X-Authority-Analysis: v=2.4 cv=LqWfC3dc c=1 sm=1 tr=0 ts=69a907d5 cx=c_pps a=8eopZEidgIdRxOfdJNpAuQ==:117 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=bi6dqmuHe4P4UrxVR6um:22 a=fTW__CHxibyLmBMfj2wP:22 a=t7CeM3EgAAAA:8 a=-DGD1vg1X50fszjQOB8A:9 a=FdTzh2GWekK77mhwV6Dw:22 X-Proofpoint-GUID: yf20hhmjoy9HOcCJG2KoWqw9AKHxLEMJ X-Proofpoint-ORIG-GUID: yf20hhmjoy9HOcCJG2KoWqw9AKHxLEMJ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA1MDAzMiBTYWx0ZWRfXxssUSqt+P83t 5uWj0OdpcGAiJONEZVEH7RjxLGNo3j4MIPRtYONZSfMMJEHbX9r/iKaQW95EfCXxkkl5s20c1kF t+kfBeEigjiVcHyAYLVMX3iIWAvrxi5y3xe/TOebAX+zU0rD6naxNo7zKvClcrCzygDCSNFIObp +IKJEqkX/xDrY61mIkrZT3O+6ES71Mt5HHlJuJGlkEYpnFiTxnzzixajpY781muMLI5XA+uqs7p kC01AQRUiPxvQctZLK9GS/71PsEjDzz2eg/lH5V8tr13TzKGiA+oDDdVFhQbLoF3NsvNndEkHZC B/FemMX1US1rPkReTAVVWMBxQqrVmCu4Y9O2iMVpLIg5mFZY3yG3bfcqzqhdtBFB/i6zJPPZ3kH GZbUK481v1huBFx61m/cWbgJDhqUD7yDbh+2IaIwYDrivwwhrDtAJUVNu6iHz8VmFVEYh9CEVBC AeBZCdJya/hfzm57A/A== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-04_09,2026-03-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603050032 Content-Type: text/plain; charset="utf-8" Switch from s_stream to enable_streams and disable_streams callbacks. Signed-off-by: Xiaolei Wang Reviewed-by: Tarang Raval Reviewed-by: Dave Stevenson Tested-by: Dave Stevenson --- drivers/media/i2c/ov9282.c | 79 ++++++++++++-------------------------- 1 file changed, 25 insertions(+), 54 deletions(-) diff --git a/drivers/media/i2c/ov9282.c b/drivers/media/i2c/ov9282.c index 98e0a0732ef7..22bea5cd6d14 100644 --- a/drivers/media/i2c/ov9282.c +++ b/drivers/media/i2c/ov9282.c @@ -922,13 +922,9 @@ static int ov9282_get_selection(struct v4l2_subdev *sd, return -EINVAL; } =20 -/** - * ov9282_start_streaming() - Start sensor stream - * @ov9282: pointer to ov9282 device - * - * Return: 0 if successful, error code otherwise. - */ -static int ov9282_start_streaming(struct ov9282 *ov9282) +static int ov9282_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) { const struct cci_reg_sequence bitdepth_regs[2][2] =3D { { @@ -939,16 +935,21 @@ static int ov9282_start_streaming(struct ov9282 *ov92= 82) {OV9282_REG_ANA_CORE_2, OV9282_ANA_CORE2_RAW8}, } }; + struct ov9282 *ov9282 =3D to_ov9282(sd); const struct ov9282_reg_list *reg_list; int bitdepth_index; int ret; =20 + ret =3D pm_runtime_resume_and_get(ov9282->dev); + if (ret) + return ret; + /* Write common registers */ ret =3D cci_multi_reg_write(ov9282->regmap, common_regs, ARRAY_SIZE(common_regs), NULL); if (ret) { dev_err(ov9282->dev, "fail to write common registers"); - return ret; + goto err_pm_put; } =20 bitdepth_index =3D ov9282->code =3D=3D MEDIA_BUS_FMT_Y10_1X10 ? 0 : 1; @@ -956,7 +957,7 @@ static int ov9282_start_streaming(struct ov9282 *ov9282) bitdepth_regs[bitdepth_index], 2, NULL); if (ret) { dev_err(ov9282->dev, "fail to write bitdepth regs"); - return ret; + goto err_pm_put; } =20 /* Write sensor mode registers */ @@ -965,14 +966,14 @@ static int ov9282_start_streaming(struct ov9282 *ov92= 82) reg_list->num_of_regs, NULL); if (ret) { dev_err(ov9282->dev, "fail to write initial registers"); - return ret; + goto err_pm_put; } =20 /* Setup handler will write actual exposure and gain */ ret =3D __v4l2_ctrl_handler_setup(ov9282->sd.ctrl_handler); if (ret) { dev_err(ov9282->dev, "fail to setup handler"); - return ret; + goto err_pm_put; } =20 /* Start streaming */ @@ -980,60 +981,28 @@ static int ov9282_start_streaming(struct ov9282 *ov92= 82) OV9282_MODE_STREAMING, NULL); if (ret) { dev_err(ov9282->dev, "fail to start streaming"); - return ret; + goto err_pm_put; } =20 return 0; -} =20 -/** - * ov9282_stop_streaming() - Stop sensor stream - * @ov9282: pointer to ov9282 device - * - * Return: 0 if successful, error code otherwise. - */ -static int ov9282_stop_streaming(struct ov9282 *ov9282) -{ - return cci_write(ov9282->regmap, OV9282_REG_MODE_SELECT, - OV9282_MODE_STANDBY, NULL); +err_pm_put: + pm_runtime_put(ov9282->dev); + + return ret; } =20 -/** - * ov9282_set_stream() - Enable sensor streaming - * @sd: pointer to ov9282 subdevice - * @enable: set to enable sensor streaming - * - * Return: 0 if successful, error code otherwise. - */ -static int ov9282_set_stream(struct v4l2_subdev *sd, int enable) +static int ov9282_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) { struct ov9282 *ov9282 =3D to_ov9282(sd); - struct v4l2_subdev_state *state; int ret; =20 - state =3D v4l2_subdev_lock_and_get_active_state(sd); - - if (enable) { - ret =3D pm_runtime_resume_and_get(ov9282->dev); - if (ret) - goto error_unlock; - - ret =3D ov9282_start_streaming(ov9282); - if (ret) - goto error_power_off; - } else { - ov9282_stop_streaming(ov9282); - pm_runtime_put(ov9282->dev); - } - - v4l2_subdev_unlock_state(state); - - return 0; + ret =3D cci_write(ov9282->regmap, OV9282_REG_MODE_SELECT, + OV9282_MODE_STANDBY, NULL); =20 -error_power_off: pm_runtime_put(ov9282->dev); -error_unlock: - v4l2_subdev_unlock_state(state); =20 return ret; } @@ -1165,7 +1134,7 @@ static const struct v4l2_subdev_core_ops ov9282_core_= ops =3D { }; =20 static const struct v4l2_subdev_video_ops ov9282_video_ops =3D { - .s_stream =3D ov9282_set_stream, + .s_stream =3D v4l2_subdev_s_stream_helper, }; =20 static const struct v4l2_subdev_pad_ops ov9282_pad_ops =3D { @@ -1174,6 +1143,8 @@ static const struct v4l2_subdev_pad_ops ov9282_pad_op= s =3D { .get_fmt =3D ov9282_get_pad_format, .set_fmt =3D ov9282_set_pad_format, .get_selection =3D ov9282_get_selection, + .enable_streams =3D ov9282_enable_streams, + .disable_streams =3D ov9282_disable_streams, }; =20 static const struct v4l2_subdev_ops ov9282_subdev_ops =3D { --=20 2.43.0