From nobody Thu Apr 9 20:28:39 2026 Received: from courrier.aliel.fr (pouet.aliel.fr [65.21.61.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5010E2D7BF; Thu, 5 Mar 2026 22:15:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=65.21.61.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772748941; cv=none; b=AmNKd4hCgSWooNow4fyEnnAtNa/rq5oHSUqTP0z/bz76LJEv8+AT2VgDEE47cwo8fDzKBklPqwJSsiIo/wkCJFfxc4LMokWFwK120Fqb+ddrjjc8KAo3vs4XRD6vNwbcPmm80ertRms/CEAOGYWDU/dgk+zdTv3nmiWrVmqvzCE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772748941; c=relaxed/simple; bh=MDPDvWX54EIzBiBuHUn/Aek5yD+kq27hlEvXjqO8q9U=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=dMDBjAMpD3xJbrk5p/kMD0iJ3vzWrxYOLeceeY+e9nEt65SpOH4+UrcZ3d+x+bEazXQxYxWFH8wWAFbf8N1OO0cZpJALA+jTxFlxfxxi8MtButzrYTnW+umpV8Sxzu5v9qEzA7Oz5KlZ1/4bYfkX0+M14gBdMbd/JEf5iDRQqt8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=aliel.fr; spf=pass smtp.mailfrom=aliel.fr; dkim=pass (1024-bit key) header.d=aliel.fr header.i=@aliel.fr header.b=Juj1hjda; arc=none smtp.client-ip=65.21.61.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=aliel.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aliel.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=aliel.fr header.i=@aliel.fr header.b="Juj1hjda" Received: from 34.1.168.192.in-addr.arpa (2A02-842b-8136-0001-1033-1579-E8Cc-83D5.rev.sfr.net [IPv6:2a02:842b:8136:1:1033:1579:e8cc:83d5]) by courrier.aliel.fr (Postfix) with ESMTPSA id BB5CF4A56F; Thu, 05 Mar 2026 22:15:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=aliel.fr; s=courrier-s1; t=1772748930; bh=MDPDvWX54EIzBiBuHUn/Aek5yD+kq27hlEvXjqO8q9U=; h=From:Date:Subject:To:Cc; b=Juj1hjdaTS4gqtBfcUQrRis7u4eJ/vkB3H7heQkhR8aTp831SXwMbTVpheuwa5Es5 fOZGbwPGN9fccgQRNJOZw7iPENvnY3dQstHJ6zmTwL5WJGboFM5/sXwscpGd6xHsNa EIDlBquD+vfKvdweTFgUt077tu65RRligBXbhK00= From: Ronald Claveau Date: Thu, 05 Mar 2026 23:11:25 +0100 Subject: [PATCH] arm64: dts: amlogic: Fix GIC register ranges for Amlogic T7 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260305-fix-amlt7-gic-dts-v1-1-5944415c74bf@aliel.fr> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/x2MWwqAIBAAryL73YIPSOoq0UfoZgtloRKBdPekz 4GZqZApMWUYRYVEN2c+YwPVCXDbEgMh+8agpe6lkQZXfnA59mIxsENfMlrv3GBImV5paN2VqEn /c5rf9wMyw58RYwAAAA== X-Change-ID: 20260303-fix-amlt7-gic-dts-7dcc93e13612 To: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ronald Claveau X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openssh-sha256; t=1772748929; l=2389; i=linux-kernel-dev@aliel.fr; s=id_ed25519; h=from:subject:message-id; bh=MDPDvWX54EIzBiBuHUn/Aek5yD+kq27hlEvXjqO8q9U=; b=U1NIU0lHAAAAAQAAADMAAAALc3NoLWVkMjU1MTkAAAAgMGec55oxeeisqykQiUedekMYyOnR9 BG9E/7rDWyqdNoAAAAGcGF0YXR0AAAAAAAAAAZzaGE1MTIAAABTAAAAC3NzaC1lZDI1NTE5AAAA QBlVSZU1SuoR80Cb0Pf7o9GsnKQNlDlTZVb8I9zS9pOyAJmcu0zAhwete0dfovrGxBWCmaGC44T Y7HZa3INOTQc= X-Developer-Key: i=linux-kernel-dev@aliel.fr; a=openssh; fpr=SHA256:kch4osYZ6A1BrPps5AUs6KnfdE2wm4ocMtyTc8TmZMs This patch aims to fix the GIC register ranges for Amlogic T7 SoC family. - Context Kernel log shows a warning about GIC [ 0.000000] GIC: GICv2 detected, but range too small and irqchip.gicv2_f= orce_probe not set Using cat /proc/interrupts command shows GIC as GIC-0 Adding some peripherals sometimes causes hangs on interrupts. - According to the GIC-400 ARM doc, the memory map is like: 0x1000-0x1FFF Distributor 0x2000-0x3FFF CPU interfaces 0x4000-0x5FFF Virtual interface control block 0x6000-0x7FFF Virtual CPU interfaces - Identify GIC model from distributor register Offset | Name | Type | Reset 0x008 | GICD_IIDR | RO | 0x0200143B kvim4# md.l 0xFFF01008 1 fff01008: 0200143b - Identify CPU interface from CPU interface register Offset | Name | Type | Reset 0x00FC | GICC_IIDR | RO | 0x0202143B kvim4# md.l 0xFFF020FC 1 fff020fc: 0202143b - Virtual interface control register check Offset | Name | Type | Reset 0x004 | GICH_VTR | RO | 0x90000003 kvim4# md.l 0xFFF04004 1 fff04004: 90000003 - Virtual CPU interfaces check Offset | Name | Type | Reset 0x00FC | GICV_IIDR | RO | 0x0202143B kvim4# md.l 0xFFF060FC 1 fff060fc: 0202143b - After this patch there is no warning anymore. GICv2 is correctly identified. [ 0.000000] GIC: Using split EOI/Deactivate mode Using cat /proc/interrupts command shows GIC as GICv2 Signed-off-by: Ronald Claveau Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-t7.dtsi index 6510068bcff92..d523cbc0ed22a 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi @@ -213,7 +213,9 @@ gic: interrupt-controller@fff01000 { #address-cells =3D <0>; interrupt-controller; reg =3D <0x0 0xfff01000 0 0x1000>, - <0x0 0xfff02000 0 0x0100>; + <0x0 0xfff02000 0 0x2000>, + <0x0 0xfff04000 0 0x2000>, + <0x0 0xfff06000 0 0x2000>; interrupts =3D ; }; =20 --- base-commit: c025f6cf4209e1542ec2afebe49f42bbaf1a5c7b change-id: 20260303-fix-amlt7-gic-dts-7dcc93e13612 Best regards, --=20 Ronald Claveau