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Bottomley" , linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM MAILING LIST), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 08/11] scsi: ufs: ufs-qcom: Implement vops tx_eqtr_notify() Date: Wed, 4 Mar 2026 05:53:10 -0800 Message-Id: <20260304135313.413688-9-can.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260304135313.413688-1-can.guo@oss.qualcomm.com> References: <20260304135313.413688-1-can.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=AJS1/0o2 c=1 sm=1 tr=0 ts=69a8398d cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=Pc85pxiuzs78KXOHt8AA:9 X-Proofpoint-ORIG-GUID: h-giC0E2E_9Mz-0S2Zyxn4eljSW8guKw X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA0MDExMiBTYWx0ZWRfX7CgC//l+bKP2 lmfs20m0uFnbn1hTs13RNF3O6/6Te63GoTIPgUTT3z1i2hYu7aHUnlHqrR6Duwx0pVb/Fr95x3u sQSl1V/zLwgwt2lAIaUkwT4UM7qDm9EAyDksbUe39Zfi0105bow2bV0+XUCSccZysMoNSxv3TLI plyDVgOlPpvYvwkDVkz2uB5NXAqjDFc+JpXnlERrClTVWXj8z/97pWXM9W4osk7u9vP8ZYseTQf 302Xv7bqFnVdj4PCQg8+OzrlmPmErOwXl4+An2ylDpWXeDKGcpMb4UWcRq4r7IqfBWeZOekeNL/ 8SBneBuxBFUUqeBgU0P7uildPLGG9oCVo2Nd/9j/U3+XNQc78Ei6tfT+l9F6kIjz4FxjrfxUX++ DBUkzUjO1b590X033eVot0ZeUpa4VGompabdEQI2YiUp1uVMqefqOiA01cFWitT1dlxAxSiAOQ3 6VNyKwIaOGZnJID2JyQ== X-Proofpoint-GUID: h-giC0E2E_9Mz-0S2Zyxn4eljSW8guKw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-04_06,2026-03-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 spamscore=0 phishscore=0 adultscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603040112 Content-Type: text/plain; charset="utf-8" On some platforms, HW does not support triggering TX EQTR from the most reliable High-Speed (HS) Gear (HS Gear1), but only allows to trigger TX EQTR for the target HS Gear from the same HS Gear. To work around the HW limitation, implement vops tx_eqtr_notify() to change Power Mode to the target TX EQTR HS Gear prior to TX EQTR procedure and change Power Mode back to HS Gear1 (the most reliable gear) post TX EQTR procedure. Signed-off-by: Can Guo --- drivers/ufs/host/ufs-qcom.c | 63 +++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 3a9279066192..1e074058f23d 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -2512,6 +2512,68 @@ static u32 ufs_qcom_freq_to_gear_speed(struct ufs_hb= a *hba, unsigned long freq) return min_t(u32, gear, hba->max_pwr_info.info.gear_rx); } =20 +static int ufs_qcom_change_power_mode(struct ufs_hba *hba, + struct ufs_pa_layer_attr *pwr_mode, + enum ufshcd_pmc_policy pmc_policy) +{ + int ret; + + ret =3D ufs_qcom_pwr_change_notify(hba, PRE_CHANGE, pwr_mode); + if (ret) { + dev_err(hba->dev, "Power change notify (PRE_CHANGE) failed: %d\n", + ret); + return ret; + } + + ret =3D ufshcd_change_power_mode(hba, pwr_mode, pmc_policy); + if (ret) + return ret; + + ufs_qcom_pwr_change_notify(hba, POST_CHANGE, pwr_mode); + + return ret; +} + +static int ufs_qcom_tx_eqtr_notify(struct ufs_hba *hba, + enum ufs_notify_change_status status, + struct ufs_pa_layer_attr *pwr_mode) +{ + struct ufs_qcom_host *host =3D ufshcd_get_variant(hba); + struct ufs_pa_layer_attr pwr_mode_hs_g1 =3D { + .gear_rx =3D UFS_HS_G1, + .gear_tx =3D UFS_HS_G1, + .lane_rx =3D pwr_mode->lane_rx, + .lane_tx =3D pwr_mode->lane_tx, + .pwr_rx =3D FAST_MODE, + .pwr_tx =3D FAST_MODE, + .hs_rate =3D pwr_mode->hs_rate, + }; + u32 gear =3D pwr_mode->gear_tx; + u32 rate =3D pwr_mode->hs_rate; + int ret; + + if (host->hw_ver.major !=3D 0x7 || host->hw_ver.minor > 0x1) + return 0; + + if (status =3D=3D PRE_CHANGE) { + /* PMC to target HS Gear. */ + ret =3D ufs_qcom_change_power_mode(hba, pwr_mode, + UFSHCD_PMC_POLICY_DONT_FORCE); + if (ret) + dev_err(hba->dev, "%s: Failed to change power mode to target HS-G%u, Ra= te-%s: %d\n", + __func__, gear, UFS_HS_RATE_STRING(rate), ret); + } else { + /* PMC back to HS-G1. */ + ret =3D ufs_qcom_change_power_mode(hba, &pwr_mode_hs_g1, + UFSHCD_PMC_POLICY_DONT_FORCE); + if (ret) + dev_err(hba->dev, "%s: Failed to change power mode to HS-G1, Rate-%s: %= d\n", + __func__, UFS_HS_RATE_STRING(rate), ret); + } + + return ret; +} + /* * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations * @@ -2542,6 +2604,7 @@ static const struct ufs_hba_variant_ops ufs_hba_qcom_= vops =3D { .get_outstanding_cqs =3D ufs_qcom_get_outstanding_cqs, .config_esi =3D ufs_qcom_config_esi, .freq_to_gear_speed =3D ufs_qcom_freq_to_gear_speed, + .tx_eqtr_notify =3D ufs_qcom_tx_eqtr_notify, }; =20 static const struct ufs_hba_variant_ops ufs_hba_qcom_sa8255p_vops =3D { --=20 2.34.1