From nobody Wed Apr 15 13:11:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E8F617B50F; Wed, 4 Mar 2026 13:49:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772632169; cv=none; b=Sy0re27Xt6myVT117eZzhpOvDok1kkKVfmnxiUJ9Z3tw2N5BVd5FyCkNFk+4GlK8ECqIOU6vzPneyRXMVPwiG7sEHqFI8pcE6ae0A13rxNbvWWadz/AYQkZwqD4aeMMYLXQyRfsMurNmjl1lcv2mFEAkN5yw5V13+iohQ1e/luU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772632169; c=relaxed/simple; bh=tXwAaUpiFy+aG+PKAec0mM+sb+k0tJWs9XuvpcWNvfI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iEfW5vhY+fKI2LY4VQCAmW45EH0yZtejet+DKEmU4CpzpccD5YZ+FlXg0Yla2EkjCX5x1/JyiXRl7Wv61epAhVeCWJng6U7wjBXI3f4zYjEPCFav9bJFpqYCGf8+wcE7R8fT8O3ktmvArL6rgq2vFlC7tXKQy7gCu7dEgWpBkec= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lfUqqGv8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lfUqqGv8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AE2FBC19423; Wed, 4 Mar 2026 13:49:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772632169; bh=tXwAaUpiFy+aG+PKAec0mM+sb+k0tJWs9XuvpcWNvfI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=lfUqqGv8c8bDUBcuydVKxN3NK74r6X+tdTEdr6ZmZkWb2OHD68taoga9Y/KRy2X96 MaHlr348yHx6ewXSjC2pKT9tugJq9XoxNc0iDK24gqd/oUEx3+C13XU2Tzd2EsMejC ZmFkm603kJ+ibhzBtgTwayo6ONLdSiza6MTn5f+wn/D9fuxISKm720MvAkZbOdmnwJ +AxvjS4H/a07xq4FFChG/RWI1VuPpUHYbl3BIxPPdedpW4W1tTUQZMsU2Mq2ZH63IA vvYCA4AP6my/edXOLP5TFkejzA9SbQcUMPwPvIV+QBrB2qr75IMO0tAys4ymKaoQOa bLKRTXDvacvuQ== From: Konrad Dybcio Date: Wed, 04 Mar 2026 14:48:30 +0100 Subject: [PATCH 4/5] clk: qcom: dispcc-sm4450: Fix DSI byte clock rate setting Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260304-topic-dsi_byte_fixup-v1-4-b79b29f83176@oss.qualcomm.com> References: <20260304-topic-dsi_byte_fixup-v1-0-b79b29f83176@oss.qualcomm.com> In-Reply-To: <20260304-topic-dsi_byte_fixup-v1-0-b79b29f83176@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Taniya Das , Dmitry Baryshkov , Luca Weiss , Dmitry Baryshkov , Ajit Pandey , Taniya Das , Jagadeesh Kona Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772632145; l=1248; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=IxpK8d4RGXEmZFXhHwoyNDlr2/yhORAj+x+P56/8HxA=; b=va9MXHuCX2ae9W74QtJ2JLtqpFs91IDwASe8+S7jPFZmdDD1MK3SZt+c3V9MhnyP/Usrl1M85 Fg8R8GCekYKD4L/ZBL1vISBdFIMrPWaQK9mRHhpkr+j50tiR+Jq1OGm X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The clock tree for byte_clk_src is as follows: =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80byte0_clk= _src=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=90 =E2=94=82 =E2=94=82 byte0_clk byte0_div_clk_src =E2=94=82 byte0_intf_clk If both of its direct children have CLK_SET_RATE_PARENT with different requests, byte0_clk_src (and its parent) will be reconfigured. In this case, byte0_intf should strictly follow the rate of byte0_clk (with some adjustments based on PHY mode). Remove CLK_SET_RATE_PARENT from byte0_div_clk_src to avoid this issue. Fixes: 76f05f1ec766 ("clk: qcom: Add DISPCC driver support for SM4450") Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Reviewed-by: Taniya Das --- drivers/clk/qcom/dispcc-sm4450.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clk/qcom/dispcc-sm4450.c b/drivers/clk/qcom/dispcc-sm4= 450.c index e8752d01c8e6..2fdacc26df69 100644 --- a/drivers/clk/qcom/dispcc-sm4450.c +++ b/drivers/clk/qcom/dispcc-sm4450.c @@ -335,7 +335,6 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk= _src =3D { &disp_cc_mdss_byte0_clk_src.clkr.hw, }, .num_parents =3D 1, - .flags =3D CLK_SET_RATE_PARENT, .ops =3D &clk_regmap_div_ops, }, }; --=20 2.53.0