From nobody Wed Apr 15 16:24:34 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B01E3537D1 for ; Wed, 4 Mar 2026 03:29:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772594996; cv=none; b=sTWFlVx8YS0nsfPvHG99ays260Z1TnowhtKeLpyHyeOBShJkwZPOXArSiVrtX4w6mOxCWKpethVrl121sKQYa1tbqxWJ3bAGV3u6IZED9fVMtQvdopCEusr1l9/lBlSbzXhdchyyEYdVuLEYnJ8bA5PF/uKdcLsf3zIZpzO0e14= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772594996; c=relaxed/simple; bh=KTk3UNcnq3W13RKPmnE/G1sAK+8ndj+/o5tFjtWk0mo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=nHir23SVyj3Xksc33ky5C2UsKa4QkLhyem7h6ZmdXN9GhMLQqsO6ueUQvJUraVBscQNBDAiXQAY9gEkEb1bSXxJV45mozk/r1MtUvvJsm3/dznl5X11HBiyGNaIeeCDB4HJ+lzGX/LdAGvX7gxVAjWvrpIHuRANqAs7bFDh59WM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=YboktBob; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=E3kvsGHt; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="YboktBob"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="E3kvsGHt" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6242XUMq1256564 for ; Wed, 4 Mar 2026 03:29:54 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=qcppdkim1; bh=HSwZuvag6iVlp9HNVvojaf m90FLVvQb2cd7/Qt6+VWM=; b=YboktBobPg5+Y/x8saG0fRnZkjZzOXp1Oh5VhT OvZCnqM6wB2qhSCx9XH3w9A/SMKEDA9tq40iuhiOBj3jah1ULGE5p3zq6RWtOX41 PhfuieU+OrOp2NaQcYWcqfYjGazQg3eeVntlxETCu8httysZGrc92hg3RrJ16qNK wDXE6hHBTql8I94IrvjvinbyVSOdGaMMquUqJZThysmFbz/3oZNY2xwicYiwg8sg BsyMtC4rbr5GxQKzcJearNvfQ5ceoe3bt4L+ugUhu9t/knWxuqL3Svilw5Z5gZE9 wuZlg299Kp6fIhB6r4MjxV0FqKZU3UdV2c4iNp9h2cdRXxWw== Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4cp2c9j8yq-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 04 Mar 2026 03:29:54 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-8c711251ac5so4065150885a.1 for ; Tue, 03 Mar 2026 19:29:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1772594991; x=1773199791; darn=vger.kernel.org; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:from:to:cc:subject:date:message-id:reply-to; bh=HSwZuvag6iVlp9HNVvojafm90FLVvQb2cd7/Qt6+VWM=; b=E3kvsGHtjO+gwobjbwJNBGf2LlgKeyEKAJMfxisYEj1R7asGUQKBZIOzr1GVBtJTAK TVDUP5n710i1GMg7gjRnFbXQIDu8B/+zWF28wnlPq1W+mCW85iFkLDe9h7vFW7rtpCNx V3/yxqZ6eqOrzps7nx0QNKW9dVByZyBTSt/OV9DPGG5Z/QLitSp+cf1iSMX2s224+lGO CQB7gsplAY9aqYx3nudXGkCxNDvzRSOxIbbDu6619gD1YDyFn+vHV9qdIgfevGH8oXyd cIMBCNTNGTnWAuMUoDwtYsTxSTBWebVfdUrmLkJ3IUAiittSlHTRYtbrBdNJk3YHWzvQ ucZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1772594991; x=1773199791; h=cc:to:message-id:content-transfer-encoding:mime-version:subject :date:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=HSwZuvag6iVlp9HNVvojafm90FLVvQb2cd7/Qt6+VWM=; b=P9CX685jA74GD0Z/jDfmI0+e4NsuFyT/ZyB6PR06uMV8ae2Z4W7HHFFLuacaT8p21M jUmqNq/2aZBhvRVlD3OdMue98ifQMbpbaQy0C37fMHFEjnx73HkuJI9Gnk1dWIhWX7LR +bVVTxX4risJ/UpcXTSz/hN5g8MFvPLDUkxokq2wdIc/7Z7yKC7symiAF+wC68XPgEYp tMKdW7j2qff8Kq+8ghKU29gGXS2E/hgritybCJCTojV2/xant7Ev2M9l7TbCYM4upL/E Z8M6tljsJsDPg+T8zyBRS9BretVvbpfqYnNlKRqt5AVpJsfKcq4d4cCh9eOqQFolTkO/ FGYQ== X-Forwarded-Encrypted: i=1; AJvYcCXw1QW41AUsfajAQWK5zBPZTK0nJ/qYl0BJXVEt4PZmOF6n+CF39mQY0n6EBrgYqRY2Epo0siunYH9rBcU=@vger.kernel.org X-Gm-Message-State: AOJu0YxWUEXXj5UCycErZyvGIaT8hjf97UG9+0ZYIPhltbahil3L+UnJ 6sA6l5mtYgTb3AkZA1BrA6X5c4HHXf8W9HWHk1Oz0Yv9LqweHKKx84llPuGHgClmJ5zHoQO2d3B ixtCPnSo4/wIChiZ1vmWg/KQQdLGy5HceSDreTFsEVqLtivZWlL/tP5WAIhJ7/10ZsQg= X-Gm-Gg: ATEYQzz5fESp8N9ZDiWVrJ8BdVeTzc0n6Xn11KI4MLbUZrfpF4xw074Ff4xSfOfnGir vmkHG7A29X9+PxsuMemoRisbPKOO9haBNv9/0RjPjHpC33RObxXeIXrUx7EGjDj9gDo4REbT00h a9B05YmsC9yLV8G9RgaAx9g1/4JOeIBk6N5vEptH598dtGJ+niPHtfmm+9/wKG1qmSdt4Y6wIaF +4+Z4SQ5ig1SQ14YiYMW4H3sa4ZOmC3cvzaZ0UYZmgVT2ySxi4Cy5WK7AJvKFFDJy/K2dr/Keef uPLRih1KbJqXfxkY3tDrDtuVaimXq5t+j/0F/eipwdGBMx/PZ3+SWXN4Q0NpOGUAXTCrWlj4tnR ZrA/WEYj3mxU585N8KysGI2xhyVU/5WN0Qd+XMtdfJIG18e8QXVkVjSxWxppOf7nzhgzQeKpTPI ZJEI+4f8ilk52X5Iso11pBOf/Ll9KRGBgtmaw= X-Received: by 2002:a05:620a:2992:b0:8ca:2baa:76e with SMTP id af79cd13be357-8cd5aee6e79mr81757185a.19.1772594991044; Tue, 03 Mar 2026 19:29:51 -0800 (PST) X-Received: by 2002:a05:620a:2992:b0:8ca:2baa:76e with SMTP id af79cd13be357-8cd5aee6e79mr81755285a.19.1772594990508; Tue, 03 Mar 2026 19:29:50 -0800 (PST) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a1237b8177sm967511e87.59.2026.03.03.19.29.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2026 19:29:49 -0800 (PST) From: Dmitry Baryshkov Date: Wed, 04 Mar 2026 05:29:47 +0200 Subject: [PATCH] arm64: dts: qcom: correct RBR opp entry Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260304-msm-fix-rbr-v1-1-b9eba986eaef@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIACqnp2kC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIzMDYwMT3dziXN20zArdoqQi3ZSUVIMkY0ugXJqFElBHQVEqUApsWnRsbS0 A3rFdZF0AAAA= X-Change-ID: 20260304-msm-fix-rbr-dde0b39202f8 To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=12532; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=KTk3UNcnq3W13RKPmnE/G1sAK+8ndj+/o5tFjtWk0mo=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpp6csC8zxSX2yMravTuLFsN9U5Di6Kn0uCXvW2 /F6WqD2wd+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaaenLAAKCRCLPIo+Aiko 1RGuCACHTAhtt9E+G9g92s6uDuIv49ilKp1z6j9EJRdIwSA7zD2j4+qc7fBepi2Pn9dcwBkWTsY Qb0DhvMnK0PKgLfEFsZ/J71ADSJKIyhSJazknebKNyTQkKOGySxfl4pX/4hL9JbtWVxMC47cEcr p1PZ6yPOyKU+k47ijQIVsorhlz5ROAvfGo+lGkiSEEtvoba8+rmh22sDNhmPgw2564a49477+GY /Oye3meJkPqtv1IhBGENiGbVXKPQxt1G6rb2+Hrnv8LM2bnFlE8BY2Ax4jpQB/42FMhYnSQdeHF 9lBLoDBHa+I6FOepdkWvex3vwfL8wPC5iI/ES4CFzr3f5klo X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA0MDAyOCBTYWx0ZWRfX9cTh2Cf2h5XQ GBbKrJQ2YpNB3jqzKkY8el4Zrc9HlmC3Qd0U8dohSDiqnO8AFLsuq2ViUcLKjHD1XjMTh2mbpKI SjE4OBv6HG5+HlpJgfrUFZnQYufuwr1ri2mI3qGGYH2FO6Sp3Hwg8FAtspNJ54jTYgzNSy47v87 g/VgWGxwt979mVgiKslYi1fQ/93K296vqZmEikNhmAwO9lfPZp20C45MBI8JcajDmjlnbo0CAlB Pytn81ZBOINCTNjaWnfrYa7cXGuaBubLzER4rXs38fxGO1hA6crV777X9oKjAxZqzHR3cIrZPRi TfRhD/BZy4aL4D6ofQ6V5aE5mPjzrbV9mwfCr3NJJQ/2JpMuv7W4yLc2gFbOKJHPm7dE9Q9iFQ7 kOFSkPYo5oqSuCcvarMMj1Ua3RFi+t/+2oL+rw1k7dC8V0EdejT6s6vynmLvmtR3NiIkjzT1fLY jsjIl6wKYVYDt8mkF6A== X-Proofpoint-ORIG-GUID: lGUch9wyHLanvdUhKvvuptMP0uSYsGWY X-Proofpoint-GUID: lGUch9wyHLanvdUhKvvuptMP0uSYsGWY X-Authority-Analysis: v=2.4 cv=EefFgfmC c=1 sm=1 tr=0 ts=69a7a732 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=yxVAQYpWGZGJL5pQS9oA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-04_01,2026-03-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 bulkscore=0 adultscore=0 impostorscore=0 phishscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603040028 DisplayPort Reduced Bit Rate uses link rate of 1.62 Gbps, the main link clock should be 162 MHz. Having the incorrect frequency (160 MHz) in the OPP table will result in selecting wrong link frequency. Correct the entry in the OPP table. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 16 ++++++++-------- arch/arm64/boot/dts/qcom/kodiak.dtsi | 8 ++++---- arch/arm64/boot/dts/qcom/lemans.dtsi | 8 ++++---- arch/arm64/boot/dts/qcom/monaco.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 12 ++++++------ arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 32 ++++++++++++++++--------------= -- arch/arm64/boot/dts/qcom/sm6350.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/talos.dtsi | 4 ++-- 13 files changed, 54 insertions(+), 54 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index 694f5e21d82f..439aaf3ce3e8 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -5774,8 +5774,8 @@ mdss_dp0_out: endpoint { mdss_dp0_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -5863,8 +5863,8 @@ mdss_dp1_out: endpoint { mdss_dp1_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -5951,8 +5951,8 @@ mdss_dp2_out: endpoint { mdss_dp2_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -6034,8 +6034,8 @@ mdss_dp3_out: endpoint { mdss_dp3_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 6079e67ea829..8f05ba696d95 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -5505,8 +5505,8 @@ port@1 { edp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -5604,8 +5604,8 @@ mdss_dp_out: endpoint { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index 808827b83553..67b2c7e819ad 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -5404,8 +5404,8 @@ port@1 { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -5492,8 +5492,8 @@ port@1 { dp1_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qco= m/monaco.dtsi index 5d2df4305d1c..08beb397db62 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -5697,8 +5697,8 @@ port@1 { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qco= m/sc7180.dtsi index 45b9864e3304..8d69225a4271 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3460,8 +3460,8 @@ port@1 { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qc= om/sc8180x.dtsi index 8319d892c6e4..f45deb188c6c 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -3322,8 +3322,8 @@ mdss_dp0_out: endpoint { dp0_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -3404,8 +3404,8 @@ mdss_dp1_out: endpoint { dp1_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -3480,8 +3480,8 @@ mdss_edp_out: endpoint { edp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 706eb1309d3f..58876b25dd23 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -4769,8 +4769,8 @@ mdss0_dp0_out: endpoint { mdss0_dp0_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -4851,8 +4851,8 @@ mdss0_dp1_out: endpoint { mdss0_dp1_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -4931,8 +4931,8 @@ mdss0_dp2_out: endpoint { mdss0_dp2_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -5006,8 +5006,8 @@ mdss0_dp3_out: endpoint { mdss0_dp3_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -6125,8 +6125,8 @@ mdss1_dp0_out: endpoint { mdss1_dp0_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -6205,8 +6205,8 @@ mdss1_dp1_out: endpoint { mdss1_dp1_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -6285,8 +6285,8 @@ mdss1_dp2_out: endpoint { mdss1_dp2_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 @@ -6360,8 +6360,8 @@ mdss1_dp3_out: endpoint { mdss1_dp3_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qco= m/sm6350.dtsi index 9f9b9f9af0da..fec01750e2c7 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -2346,8 +2346,8 @@ mdss_dp_out: endpoint { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 97ca5275d740..0e101096209a 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3954,8 +3954,8 @@ mdss_dp_out: endpoint { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index c7dffa440074..01453aaa1752 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -4826,8 +4826,8 @@ mdss_dp_out: endpoint { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index 5c8fe213f5e4..28b4b79d2587 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2925,8 +2925,8 @@ mdss_dp_out: endpoint { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 920a2d1c04d0..fd2d5648b92a 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3508,8 +3508,8 @@ mdss_dp0_out: endpoint { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom= /talos.dtsi index 75716b4a58d6..b4c8406c6738 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -3958,8 +3958,8 @@ mdss_dp0_out: endpoint { dp_opp_table: opp-table { compatible =3D "operating-points-v2"; =20 - opp-160000000 { - opp-hz =3D /bits/ 64 <160000000>; + opp-162000000 { + opp-hz =3D /bits/ 64 <162000000>; required-opps =3D <&rpmhpd_opp_low_svs>; }; =20 --- base-commit: 3fa5e5702a82d259897bd7e209469bc06368bf31 change-id: 20260304-msm-fix-rbr-dde0b39202f8 Best regards, --=20 With best wishes Dmitry