From nobody Fri Apr 3 05:00:01 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11BD93A256A for ; Wed, 4 Mar 2026 10:19:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772619567; cv=none; b=CyRMHnNjPAsK/p8rTfLBo3iOxOaytHSTiiPrbQctJyJrB77JuxMmIdL81EysDqEHTUFATwRzSnmiaWIJCFP8GA8Z7k612cFFBwfjU9O0aj6YjuhHnpTSXzoWoXPOJtgxxvJltDL0nBHEIfPGZ8MrYZp9cffH8amQ3FH+m+EwPvg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772619567; c=relaxed/simple; bh=hlNmX8QTYbudhIP0ciMy+y3TsWJoFdhR3w6eV7zimz0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Yp+UqtJYJrFUUwo9MB1lohEjblPhK8ZLTcQEJtU4wdQ7QKGDUiV0wb/DNSBP/DlEdj/F1pXAkbzUu9FnVu+d2LTWBJv+o9Ai7CkspuvIuc1AjR2Dt9g1EpZ817EoSTyz/JnFUHMCF4xjQ5qasY1nyTbuO8DOLzRN7hgFPO1IpCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=aCzF1j2l; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="aCzF1j2l" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id C7603C40FBD; Wed, 4 Mar 2026 10:19:34 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id B7D765FF5C; Wed, 4 Mar 2026 10:19:16 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 2EE6910369791; Wed, 4 Mar 2026 11:19:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772619555; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=RT79xI7c4HyPB3ciXHZP+9zR0KZk+cQOgHzcyMyuvrY=; b=aCzF1j2luPALUZrF+am8IoIPUzKt3BjTOIHt/8qfxYixh3pTvMmyu3oCTqMoRhuop4qFZs LW8Bkw4G7I+v/0p2z29UWxTpN4UOzNIZ376HuE3oTPi28Txigj1qoVf/bIe892eEbxZBIJ edbT87zW5lrdgLpw3EIpxqx2sFhoypnLXetgBKucLXMKK4Oof7Nh7GpocLIhh87/5uUt+N ewqJ7bG1BeWvzqdOlcug8ePSchL7lYCRuBdjjg4s+hr7c7X8pYBV2sIeR0XN2qI05xfHLd C+9BlmBZxui7k/G95nlhzRmGmZ2S/fIhHvxzS4T07AJMjN1yVLhP15CJZhmcpg== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 04 Mar 2026 11:18:59 +0100 Subject: [PATCH net-next v6 8/9] net: dsa: microchip: Adapt port offset for KSZ8463's PTP register Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260304-ksz8463-ptp-v6-8-3f4c47954c71@bootlin.com> References: <20260304-ksz8463-ptp-v6-0-3f4c47954c71@bootlin.com> In-Reply-To: <20260304-ksz8463-ptp-v6-0-3f4c47954c71@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 In KSZ8463 register's layout, the offset between port 1 and port 2 registers isn't the same in the generic control register area than in the PTP register area. The get_port_addr() always uses the same offset so it doesn't work when it's used to access PTP registers. Adapt the port offset in get_port_addr() when the accessed register is in the PTP area. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index c354abdafc1b542a32c276ef939a90db30c67f55..a05527899b8bab6d53509ba38c5= 8101b79e98ee5 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2020,6 +2020,9 @@ u32 ksz8_get_port_addr(int port, int offset) =20 u32 ksz8463_get_port_addr(int port, int offset) { + if (offset >=3D KSZ8463_PTP_CLK_CTRL) + return offset + 0x20 * port; + return offset + 0x18 * port; } =20 --=20 2.53.0