From nobody Fri Apr 3 04:59:20 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29CA03A2552 for ; Wed, 4 Mar 2026 10:19:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772619564; cv=none; b=JDcJljHAuWhgeqYHtAOny7XScA/0fFP1SmY2WE+PKn3hNTd6DUjs/pjhZNFItM5gTgglOqPuDkzzoB8a6BpN+xidcAVUejorKXlJftukDpDTt6HpQhz5ezsyQkVcQnw4eK8M5kwE1gRkvCpPD4KG+Nse7bQDelEBl06nZoBYjok= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772619564; c=relaxed/simple; bh=flBgMZFPZY708TYhKPRkshuBuBUgHdu2eO+sX4F3AD4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=isJWjVUD56loywVyqFwKby4Oz9Ijdgks5MdT0hv8RgMnj8Vl1PVX1DqDfdL3jUmQtA4F+NX7c36eIGqdDnP/9vbnCrOEJIweLyxI2D6+q6uKK7mv/P6ogcEv2DklKT4uANqQsYJzBv8au9baXZG3j3mXl/c+g5Uq8s54SYChTAU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=eUayZTNM; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="eUayZTNM" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 121D64E42539; Wed, 4 Mar 2026 10:19:15 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id DB1F25FF5C; Wed, 4 Mar 2026 10:19:14 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 303911036977D; Wed, 4 Mar 2026 11:19:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772619553; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=J83UoEJhAGh9Q63fdG3raIWycuxXozVbR1Mhr+9V1Ho=; b=eUayZTNMEYypmmJKfqJouOhaRT7HhuVvYplzHC+jZfLGaHyvf09g40vllYYYrYtC1PRQvx KXFfmOmBGc9mzRnRRSJQQ2Wr/lAogagHIizX9W1ytC45gajMzpaZ2qqxsrAFj1FYpiyg1Z Xxj1p20Pmb1QoZpDxoUPsg5usZxfaJq7tueP41G0nz2FTJx8okGyRewCMOKggnbYaTLiFt TmPYry+4BY8+0xVDYIzqf58e9aRmLJCbieOmMW8FXivLmtxUUVS205DC1CnC0fd9S0qGrA 5l6aAxCzhQJxzyN3mvmGn/jsJjQUL6qJh+9adzgdcCTokoUvA9IIkpczxDLgwA== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 04 Mar 2026 11:18:58 +0100 Subject: [PATCH net-next v6 7/9] net: dsa: microchip: Explicitly enable detection of L2 PTP frames Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260304-ksz8463-ptp-v6-7-3f4c47954c71@bootlin.com> References: <20260304-ksz8463-ptp-v6-0-3f4c47954c71@bootlin.com> In-Reply-To: <20260304-ksz8463-ptp-v6-0-3f4c47954c71@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 Detection of L2 PTP frames needs to be enabled for PTP to work at the L2 layer. The bit enabling this detection is set by default on the switches currently supported by the driver, but it is unset by default on the KSZ8463 for which support will be added in upcoming patches. Explicitly enable the detection of L2 PTP frames for all switches when PTP is enabled. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index dab7016c6f38a37ed6e2dc60a1f1251aea6a7cbc..7bb5191e780f151fe74ff0163ea= 1fa8b0f3ebee9 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -947,8 +947,9 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) /* Currently only P2P mode is supported. When 802_1AS bit is set, it * forwards all PTP packets to host port and none to other ports. */ - ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], PTP_TC_P2P | PTP_802_1AS, - PTP_TC_P2P | PTP_802_1AS); + ret =3D ksz_rmw16(dev, regs[PTP_MSG_CONF1], + PTP_TC_P2P | PTP_802_1AS | PTP_ETH_ENABLE, + PTP_TC_P2P | PTP_802_1AS | PTP_ETH_ENABLE); if (ret) return ret; =20 --=20 2.53.0