From nobody Fri Apr 3 04:59:20 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 605133A1A56 for ; Wed, 4 Mar 2026 10:19:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772619549; cv=none; b=gZM6BPSKPRpfjkl0Ly42nWfRR7oTW38KcBw1PM3qWk07dvMSymxtbjEYwd7EOLZHVmGO1XvLx6yDYanO40cBRh/TKsoAzVWZ8s+xErK5xogIman4EPr8yS9+jN9/GRzsB09No/DZwrM7AnJICwLW3X/3v/bQIYQuA9P2exU9Y4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772619549; c=relaxed/simple; bh=1DSoU6CbK0j90o7+JBRAk2vA4wGlNMTFxSdaqpeJa/E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Yg2MjWht5xZMXQN+SV6ETbc/rIGrpZy7iv95WgEPjVEMRxuYevL93UlbUFeENzAPt5Er9uox12wFhx0gz9vzUAmpgdUdcd/dhs+gsBdhniYAAFrU0uoMHhk9f/B8OhHSKQ2EqBTffuvsh0bJw8IenUhgAgwbv2+z4tjBwURDcgM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=eCIfzKxP; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="eCIfzKxP" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 04AD4C40FBD; Wed, 4 Mar 2026 10:19:25 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E9B825FF5C; Wed, 4 Mar 2026 10:19:06 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 585551036977C; Wed, 4 Mar 2026 11:19:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1772619545; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=vr3bvxuke1eH9N7va1Vf/GvcbKA4SqYSzeU29NJ6EyA=; b=eCIfzKxPfXbgs1BiOG2NP6mp5/wM0bTWu1zX/Aps6ZIcN7FlqzfHyj7ogoQVlzEZj7yFel OSjmkEbwE44yPEEwq1FkCSUecQFeeICFCtb0xCsWXf8AEF88SdLdP/6T8Uxn6w/2KaY3pS OabS2yA8451zCHQy0GJ+ym8ccWXPnfl1HDC/dCHkJP6ydQkrfpaCFdAUMllHZ+2N/R+LmB zo7w4stCOZf7jXGgtCkneXLmn64Z0mDg/yFOFV9o/Esn1oo0LUkZsReREaLkBdoVJznBLi Y712ERNTSjPj9Grb2UQGK8RG/diHRnmBPzXQqVZXEvhD0SDG2x2NIA77PHPiqw== From: "Bastien Curutchet (Schneider Electric)" Date: Wed, 04 Mar 2026 11:18:54 +0100 Subject: [PATCH net-next v6 3/9] net: dsa: microchip: Decorrelate msg_irq index from IRQ bit offset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260304-ksz8463-ptp-v6-3-3f4c47954c71@bootlin.com> References: <20260304-ksz8463-ptp-v6-0-3f4c47954c71@bootlin.com> In-Reply-To: <20260304-ksz8463-ptp-v6-0-3f4c47954c71@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , Simon Horman Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 has one register containing all the PTP-related interrupts from all ports. So it will use one IRQ domain for all of them, leading to 4 interrupt bits to be dispatched in two ports. Current implementation doesn't allow to do so because the IRQ bit offset is also used as index to store the struct ptpmsg_irq in the table held by the port. Add a new input to the setup() function to independently provide the interrupt bit offset and the ptpmsg_irq index. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 64afe92a3479ec87b5afc66e489b92787a0fc715..79f2210df8588e0a75b4f29dae2= d7281ede12a3c 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1100,7 +1100,7 @@ static void ksz_ptp_msg_irq_free(struct ksz_port *por= t, u8 n) } =20 static int ksz_ptp_msg_irq_setup(struct irq_domain *domain, - struct ksz_port *port, u8 n) + struct ksz_port *port, u8 index, int irq) { u16 ts_reg[] =3D {REG_PTP_PORT_PDRESP_TS, REG_PTP_PORT_XDELAY_TS, REG_PTP_PORT_SYNC_TS}; @@ -1109,15 +1109,15 @@ static int ksz_ptp_msg_irq_setup(struct irq_domain = *domain, const struct ksz_dev_ops *ops =3D port->ksz_dev->dev_ops; struct ksz_ptp_irq *ptpmsg_irq; =20 - ptpmsg_irq =3D &port->ptpmsg_irq[n]; - ptpmsg_irq->num =3D irq_create_mapping(domain, n); + ptpmsg_irq =3D &port->ptpmsg_irq[index]; + ptpmsg_irq->num =3D irq_create_mapping(domain, irq); if (!ptpmsg_irq->num) return -EINVAL; =20 ptpmsg_irq->port =3D port; - ptpmsg_irq->ts_reg =3D ops->get_port_addr(port->num, ts_reg[n]); + ptpmsg_irq->ts_reg =3D ops->get_port_addr(port->num, ts_reg[index]); =20 - strscpy(ptpmsg_irq->name, name[n]); + strscpy(ptpmsg_irq->name, name[index]); =20 return request_threaded_irq(ptpmsg_irq->num, NULL, ksz_ptp_msg_thread_fn, IRQF_ONESHOT, @@ -1162,7 +1162,7 @@ int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p) goto out; =20 for (irq =3D 0; irq < ptpirq->nirqs; irq++) { - ret =3D ksz_ptp_msg_irq_setup(ptpirq->domain, port, irq); + ret =3D ksz_ptp_msg_irq_setup(ptpirq->domain, port, irq, irq); if (ret) goto out_ptp_msg; } --=20 2.53.0