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Wed, 4 Mar 2026 03:11:20 -0600 From: Aniket Limaye Date: Wed, 4 Mar 2026 14:41:05 +0530 Subject: [PATCH] arm64: dts: ti: k3-j722s: Add main_i2c4 device node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260304-j722s-main-i2c4-dt-v1-1-03f79f0cdf97@ti.com> X-B4-Tracking: v=1; b=H4sIACj3p2kC/x3MQQqAIBBA0avErBuwUSq6SrQQHWuCLDQiiO6et HyL/x/InIQzDNUDiS/JsseCpq7ALTbOjOKLgRS1SiuNa0eUcbMSUcgZ9Cf2ttHGeGVCYCjhkTj I/U/H6X0/Nk/A7GQAAAA= X-Change-ID: 20260303-j722s-main-i2c4-dt-8a1344d04ffe To: Nishanth Menon , Vignesh Raghavendra , "Tero Kristo" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , , Jared McArthur , Aniket Limaye X-Mailer: b4 0.14.3 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F61:EE_|PH7PR10MB6532:EE_ X-MS-Office365-Filtering-Correlation-Id: fe43490b-e3c3-4d04-d1e4-08de79ce10b6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|34020700016|1800799024|82310400026|376014; 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Interrupt for this i2c controller is routed through the Main GPIOMUX Router. Base address, Interrupt IDs are taken from J722S TRM [0]. Device, Clock IDs are taken from TISCI docs [1]. Additionally, the I2C4 is the only interrupt source to the GPIOMUX INTR router that generates level interrupts, while all other sources generate edge interrupts. Due to this, the router needs to handle interrupt-type on a per-line basis. Modify the router node and its consumers to specify the interrupt type corresponding to each interrupt line. [0]: https://www.ti.com/lit/zip/sprujb3 [1]: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/index.html#j722s Signed-off-by: Jared McArthur Signed-off-by: Aniket Limaye Tested-by: Nora Schiffer --- Note: Support for per-line interrupt-types was added through a recent series [2], which was already merged in. Testing: - Enable I2C4 (additional DT patch) on j722s-evm and run i2cdetect [3]. - Add testcode to ignore the NACK interrupt, which results in an irq storm -> showing that GIC is actually receiving level interrupt from the INTR [4]. [2]: https://lore.kernel.org/all/20260123-ul-driver-i2c-j722s-v4-0-b08625c4= 87d5@ti.com/ [3]: https://gist.github.com/aniket-l/844925345316adf9f65f04c8cdedd62d#file= -j722s-evm-main-i2c4-working-logs-txt [4]: https://gist.github.com/aniket-l/844925345316adf9f65f04c8cdedd62d#file= -j722s-evm-main-i2c4-irqstorm-logs-txt --- arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 13 +++++++------ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 13 +++++++++++++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 3 ++- 3 files changed, 22 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/= arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 0e1af2a69ca2..f130c7cb998d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -543,10 +543,9 @@ main_spi2: spi@20120000 { main_gpio_intr: interrupt-controller@a00000 { compatible =3D "ti,sci-intr"; reg =3D <0x00 0x00a00000 0x00 0x800>; - ti,intr-trigger-type =3D <1>; interrupt-controller; interrupt-parent =3D <&gic500>; - #interrupt-cells =3D <1>; + #interrupt-cells =3D <2>; ti,sci =3D <&dmsc>; ti,sci-dev-id =3D <3>; ti,interrupt-ranges =3D <0 32 16>; @@ -558,8 +557,9 @@ main_gpio0: gpio@600000 { gpio-controller; #gpio-cells =3D <2>; interrupt-parent =3D <&main_gpio_intr>; - interrupts =3D <190>, <191>, <192>, - <193>, <194>, <195>; + interrupts =3D <190 IRQ_TYPE_EDGE_RISING>, <191 IRQ_TYPE_EDGE_RISING>, + <192 IRQ_TYPE_EDGE_RISING>, <193 IRQ_TYPE_EDGE_RISING>, + <194 IRQ_TYPE_EDGE_RISING>, <195 IRQ_TYPE_EDGE_RISING>; interrupt-controller; #interrupt-cells =3D <2>; ti,davinci-gpio-unbanked =3D <0>; @@ -574,8 +574,9 @@ main_gpio1: gpio@601000 { gpio-controller; #gpio-cells =3D <2>; interrupt-parent =3D <&main_gpio_intr>; - interrupts =3D <180>, <181>, <182>, - <183>, <184>, <185>; + interrupts =3D <180 IRQ_TYPE_EDGE_RISING>, <181 IRQ_TYPE_EDGE_RISING>, + <182 IRQ_TYPE_EDGE_RISING>, <183 IRQ_TYPE_EDGE_RISING>, + <184 IRQ_TYPE_EDGE_RISING>, <185 IRQ_TYPE_EDGE_RISING>; interrupt-controller; #interrupt-cells =3D <2>; ti,davinci-gpio-unbanked =3D <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j722s-main.dtsi index 9ee5d0c8ffd1..ddf20e44f0ea 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -154,6 +154,19 @@ usb1: usb@31200000 { }; }; =20 + main_i2c4: i2c@fe80000 { + compatible =3D "ti,am64-i2c", "ti,omap4-i2c"; + reg =3D <0x00 0x0fe80000 0x00 0x100>; + interrupt-parent =3D <&main_gpio_intr>; + interrupts =3D <178 IRQ_TYPE_LEVEL_HIGH>; + #address-cells =3D <1>; + #size-cells =3D <0>; + power-domains =3D <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 257 2>; + clock-names =3D "fck"; + status =3D "disabled"; + }; + ti_csi2rx1: ticsi2rx@30122000 { compatible =3D "ti,j721e-csi2rx-shim"; reg =3D <0x00 0x30122000 0x00 0x1000>; diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/= k3-j722s.dtsi index 059c65ece183..1b36dcf37925 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -160,7 +160,8 @@ cbass_main: bus@f0000 { <0x00 0x0fd80000 0x00 0x0fd80000 0x00 0x00080000>, /* GPU */ <0x00 0x0fd20000 0x00 0x0fd20000 0x00 0x00000100>, /* JPEGENC0_CORE */ <0x00 0x0fd20200 0x00 0x0fd20200 0x00 0x00000200>, /* JPEGENC0_CORE_MM= U */ - <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral= window */ + <0x00 0x0fe00000 0x00 0x0fe00000 0x00 0x000f0400>, /* Third peripheral= window */ + <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Fourth periphera= l window */ <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */ <0x00 0x301c0000 0x00 0x301c0000 0x00 0x00001000>, /* DPHY-TX */ <0x00 0x30101000 0x00 0x30101000 0x00 0x00080100>, /* CSI window */ --- base-commit: d517cb8cea012f43b069617fc8179b45404f8018 change-id: 20260303-j722s-main-i2c4-dt-8a1344d04ffe Best regards, --=20 Aniket Limaye