From nobody Thu Apr 9 18:03:27 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8B2E37703A; Tue, 3 Mar 2026 18:04:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561085; cv=none; b=EB4NaECe4Cu+IzUDxSM/VDlvKJPSLG2SFnA0rmf6dUF1UqC9nAaWD5j7dCgwFbpTrCPX0cIJXq2nMvGafqqiADokkFLnr1u986jYzv1cauvKdFIxZYaXAJBniVKoXJ3K0PxL7L+IIOpc3e4xG/JW5g0584Ii/ziuAcbdCbZ5+bM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561085; c=relaxed/simple; bh=g3fSJ4nyyCP2XBDrOADHU5vpGMsdP/J5+NVWogUdb1s=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tzCifF5/iImXP2i98eYJ+9P87yVgBENkx5H5mmfU9PsTr1N93MES/mVLkccea5TjPCyFy0OeTwFsJJVHRwXDHqbFuSXrqnevyJp5tXjTEs8OSITB3pF8o4kIDYmKj6vlZaDkfaMXwn/V3pSkPiGr+OOm6W+iCjGCzcnHDXefIdM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=W437R3O0; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="W437R3O0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1772561084; x=1804097084; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=g3fSJ4nyyCP2XBDrOADHU5vpGMsdP/J5+NVWogUdb1s=; b=W437R3O0U5wt67yVzpjkhloS0QoQiGQ5984kEBRHS+wwHELNaySOUdNs 6QBdij23x7X6VIJDiajixh5PnYPYMflmpgEkyEJIFWswJoeuQwoQx1tBm tc3Rjahi60hIf57wOT8xTmRH/bBoR0AsxTWYDxQ0FA37OIJVPtjI9ZTRZ ebG2bODSIWVPYN4iJRSfGMu10HpJ2OanXExOLFvoFXQd3rd4h1K8lsEf0 e5Ya8Ej2Vs8l2P0lBBdChAHL+Tpt/YCxUx1Qg0jwzZ+BIGE992VOHbD7w MH8MWZy2s1q4BF5IWzUwH9KXW5qol6WKEpx8RkWbbrq+6VMBQsTsxAINd w==; X-CSE-ConnectionGUID: GMMSakTvRG+HtI9KzbPdDQ== X-CSE-MsgGUID: dwFoa6vIT5KAcl3hWKOj1A== X-IronPort-AV: E=Sophos;i="6.21,322,1763449200"; d="scan'208";a="221432060" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2026 11:04:43 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Tue, 3 Mar 2026 11:04:15 -0700 Received: from bby-cbu-swbuild03.eng.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 3 Mar 2026 11:04:15 -0700 From: Charles Perry To: CC: Charles Perry , Andrew Lunn , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , Claudiu Beznea , , Subject: [PATCH net-next 1/4] dt-bindings: net: cdns,macb: add a compatible for Microchip p64h Date: Tue, 3 Mar 2026 10:03:15 -0800 Message-ID: <20260303180318.1814791-2-charles.perry@microchip.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260303180318.1814791-1-charles.perry@microchip.com> References: <20260303180318.1814791-1-charles.perry@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" "p64h" is shorthand for "PIC64-HPSC" and "PIC64HX" The generic compatible "cdns,gem" works but offers limited features. Keep it as a fallback. Signed-off-by: Charles Perry --- Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documen= tation/devicetree/bindings/net/cdns,macb.yaml index cb14c35ba996..dff350302098 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -27,6 +27,7 @@ properties: =20 - items: - enum: + - microchip,p64h-gem # Microchip P64H SoC - xlnx,versal-gem # Xilinx Versal - xlnx,zynq-gem # Xilinx Zynq-7xxx SoC - xlnx,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC --=20 2.47.3 From nobody Thu Apr 9 18:03:27 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D14ED3264CE; Tue, 3 Mar 2026 18:04:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561085; cv=none; b=HXjN9hJbhdJEByD9ztxB+p2rLOXCOGYX2Qp6wDFJLLAvQSRDFPP3ulbuTANPl14/LcQPnOwVHxAdzP7GpFQNGfChccEbMayLoxLGnt+iXnH4bw+9OUHbSpzZ8SRlQuMoUJD4utT48fz1KYLaJPoOQr2UTpfRnD+GkNnQp3FcRYs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561085; c=relaxed/simple; bh=t4zK7NTHUyQbdGFZkkU3CbwoIF9aUvQz3CB5fTHlilg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=I8GVjEQyOI2kfbQDeUr5opeVUgCktaHnF5cmY+Ck/UwMUzVCXaWfQYgOqEb4utQc42ifDvMc2Isu4NkVQHYcsk3u9vqkxE0XRTvace+QQdBc7E27IJ9UADg8sPEISUsxH8ftt9Q9lGR5EOCg0GoJbyWtzRou1nzAYXIq5AJ2iVU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=j2ajA9sQ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="j2ajA9sQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1772561083; x=1804097083; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t4zK7NTHUyQbdGFZkkU3CbwoIF9aUvQz3CB5fTHlilg=; b=j2ajA9sQc2HsqAfvoKjHER/H6ZnUcRflA0h51Jc51Y5LQILVIbGsNiRU 6GX0T2Dpg3NtOGe4x3jkmYcNoYpOtVdMCwq39/9Kdk6OoF/qcHyENtPAb LaTW9SCPHZJ4WIgUrebT3HH6/AlcEAoa55MaO/4vuCdV3exPJORIq6sWV XtjZc5j2c0XYyjWD2Q/tmDtsbQVIRYlP5zDpQ9l/ntGRx26vkLM/s9mMq tEeWYUBIC+Q4I101Fq+0M2XCpINVGvJwMF0lnx4CwLBRGF8OtwT4wTgTJ rRp+65QEEkNPRcACL4U19neDwilwIBKRaFEB4BsPLJ2hBHhJlRMjv65Gw A==; X-CSE-ConnectionGUID: R0Y1SJ/2TCKiAbvM64J+LA== X-CSE-MsgGUID: UiADTrq8QEON33fQEzWX1w== X-IronPort-AV: E=Sophos;i="6.21,322,1763449200"; d="scan'208";a="53419561" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 03 Mar 2026 11:04:42 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Tue, 3 Mar 2026 11:04:19 -0700 Received: from bby-cbu-swbuild03.eng.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 3 Mar 2026 11:04:18 -0700 From: Charles Perry To: CC: Charles Perry , Andrew Lunn , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , Claudiu Beznea , , Subject: [PATCH net-next 2/4] dt-bindings: net: cdns,macb: forbid phy nodes for Microchip p64h Date: Tue, 3 Mar 2026 10:03:16 -0800 Message-ID: <20260303180318.1814791-3-charles.perry@microchip.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260303180318.1814791-1-charles.perry@microchip.com> References: <20260303180318.1814791-1-charles.perry@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The GEM IPs within Microchip p64h have their MDIO controllers unconnected from any physical pin. When compiling a p64h device tree with a phy on a GEM node with CHECK_DTBS=3D1, this generates an error like: ``` linux/arch/riscv/boot/dts/microchip/p64h-hb130x.dtb: ethernet@40004180000 (microchip,p64h-gem): ethernet-phy@0: False schema does not allow {'reg': [[0]]} from schema $id: http://devicetree.org/schemas/net/cdns,macb.yaml# ``` Signed-off-by: Charles Perry --- Documentation/devicetree/bindings/net/cdns,macb.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documen= tation/devicetree/bindings/net/cdns,macb.yaml index dff350302098..be66cc9a42fd 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -197,6 +197,17 @@ allOf: required: - phys =20 + - if: + properties: + compatible: + contains: + const: microchip,p64h-gem + then: + patternProperties: + "^ethernet-phy@[0-9a-f]$": false + properties: + mdio: false + unevaluatedProperties: false =20 examples: --=20 2.47.3 From nobody Thu Apr 9 18:03:27 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13CD0350D46; Tue, 3 Mar 2026 18:04:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561087; cv=none; b=DaRRVLRjcBAYqpkUq5CRXW0RJQC6N7bxkKU3s3UuHkgSc/PqEXtIkHrqobwBIBqufFJYSYYBwpFUd3AobJQnXrglS3SOhBCeR7HeDsaopqe4q2zhHJXxUSRSOpYmnlrikqhJloLbTFJoowq1JPyH76ov9e6Y2Wxojryl/qe5G0U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561087; c=relaxed/simple; bh=GTKkgOixrxzmHD3zUijlM5vksm6oyDRMA71BnCEXes0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rTInptnDKtNnOh6XvDMZ/xkoq7XeMSJQJ5sLUqektq7J6VgX9X8rqPi/9ldQIwvDbSMG8Yk2BibRsYcaqYD6qST0gXwVlTEMOBSpTKH2oi/Zd3vOalFRBFKAQxDGVZRvk15QZUu6vd+fHKpIePOLJPc825tTvJzEAYmNQouFznw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=pmvoDyjZ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="pmvoDyjZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1772561086; x=1804097086; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GTKkgOixrxzmHD3zUijlM5vksm6oyDRMA71BnCEXes0=; b=pmvoDyjZHd29uYp1y3LLMREylu+SgKgEhzOGgheDqVHDv9qf4Pv+fPDQ VCsxXrx1ai0BW3ImlwMQ8bEEqp9hKmLN+RG14gU5HJwAn19VS4C87er8D NP8WDM1sYhH3BVkeO+YDHRtw1Hl9y3CaLZ1aP9jcHMNJdOIv6q3iVZay/ CyY9GyoRwE40+vSFAq1m355lZhCWiUa47d1D2hhDfhRRdFNKsAZrgOxBB xCNXdXr55AoiDPHhG4CpDcs20GwBLq5bMj16EfgUgXNnVXlqil8+b2ZMm ljayttnCeTUVfxNiLLgFEPaS6K7B6N8vXEVzQG9528TC462PU1J4PSHzJ g==; X-CSE-ConnectionGUID: GMMSakTvRG+HtI9KzbPdDQ== X-CSE-MsgGUID: 5wdVKI+wQIGsdOoHkk7eZA== X-IronPort-AV: E=Sophos;i="6.21,322,1763449200"; d="scan'208";a="221432061" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2026 11:04:44 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Tue, 3 Mar 2026 11:04:22 -0700 Received: from bby-cbu-swbuild03.eng.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 3 Mar 2026 11:04:21 -0700 From: Charles Perry To: CC: Charles Perry , Andrew Lunn , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , Claudiu Beznea , , Subject: [PATCH net-next 3/4] net: macb: add safeguards for jumbo frame larger than 10240 Date: Tue, 3 Mar 2026 10:03:17 -0800 Message-ID: <20260303180318.1814791-4-charles.perry@microchip.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260303180318.1814791-1-charles.perry@microchip.com> References: <20260303180318.1814791-1-charles.perry@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The RX buffers for GEM can have a maximum size of 16320 bytes (0xff in the RXBS field of the DMACFG register means 255*64 =3D 16320 bytes). The "jumbo_max_length" field (bits 0..13) of the DCFG2 register can take a value of up to 16383 (0x3FFF). This field is not used when determining the max MTU, instead an hardcoded value (jumbo_max_len) is used for each platform. Right now the maximum value for jumbo_max_len is 10240 (0x2800). GEM uses one buffer per packet which means that one buffer must allow room for the max MTU plus L2 encapsulation and alignment. This commit adds a limit to max_mtu and rx_buffer_size so that the RXBS field can never overflow when a large MTU is used. With this commit, it is now possible to add new platforms that have their gem_jumbo_max_length set to 16383. Signed-off-by: Charles Perry Reviewed-by: Simon Horman --- drivers/net/ethernet/cadence/macb_main.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index c39a5a1e5732..cc48fd494458 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -50,6 +50,7 @@ struct sifive_fu540_macb_mgmt { =20 #define MACB_RX_BUFFER_SIZE 128 #define RX_BUFFER_MULTIPLE 64 /* bytes */ +#define RX_BUFFER_MAX (0xFF * RX_BUFFER_MULTIPLE) /* 16320 bytes */ =20 #define DEFAULT_RX_RING_SIZE 512 /* must be power of 2 */ #define MIN_RX_RING_SIZE 64 @@ -2387,7 +2388,7 @@ static void macb_init_rx_buffer_size(struct macb *bp,= size_t size) if (!macb_is_gem(bp)) { bp->rx_buffer_size =3D MACB_RX_BUFFER_SIZE; } else { - bp->rx_buffer_size =3D size; + bp->rx_buffer_size =3D MIN(size, RX_BUFFER_MAX); =20 if (bp->rx_buffer_size % RX_BUFFER_MULTIPLE) { netdev_dbg(bp->dev, @@ -5582,7 +5583,8 @@ static int macb_probe(struct platform_device *pdev) /* MTU range: 68 - 1518 or 10240 */ dev->min_mtu =3D GEM_MTU_MIN_SIZE; if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len) - dev->max_mtu =3D bp->jumbo_max_len - ETH_HLEN - ETH_FCS_LEN; + dev->max_mtu =3D MIN(bp->jumbo_max_len, RX_BUFFER_MAX) - + ETH_HLEN - ETH_FCS_LEN; else dev->max_mtu =3D 1536 - ETH_HLEN - ETH_FCS_LEN; =20 --=20 2.47.3 From nobody Thu Apr 9 18:03:27 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D430377ECF; Tue, 3 Mar 2026 18:04:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561087; cv=none; b=CXofOZtW0uGYLGmNYJ2Je6Bc2yKBcSrZY5+lmy/2msfQ1qiTkfC0jfi37e+rajkeO5hoore7UlRSlmh+q1rgSvbd6vOBuOeo6XNl4xLw6NHTAIL3LKleKUmdfIUJCI/bQyXLQ/A9aC3WphPEENYfgdQJWYxUCvA4PEWOb4X/ruw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772561087; c=relaxed/simple; bh=+i9ihgXemK48xPtyH3jRV9tFKsdf3S6xcB93Mt8ECU8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kAJxQ86VMIEOmENzsU5xw6r8m6NuUtdnk/OqvXA+VpmtI+ANN7NG+MlpetDAPxl+ggBkkjPaugtkv4rvycs72a40Zh4y55FJb7lacgpla+uXXkDhEiY64MpXlXqoiuGDy+HUj+NemzsERs46beD59/Fr0huQt6pwpxElLzRFgBg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=GsjfN1zZ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="GsjfN1zZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1772561086; x=1804097086; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+i9ihgXemK48xPtyH3jRV9tFKsdf3S6xcB93Mt8ECU8=; b=GsjfN1zZbQkYWW7LsgipsGJYc/Js56rV4WmVTHgmsC2XTx8gnE5ByWAZ +VF9aSRyjAhmcdWpd04q+PAh73/mMBxeTSqSqvx/CufPWrj9bSYuZRpuK gMe51dOvUcOTbMqOW55l9dlgHOkMfinS6ul6KKFG1FybFFu1wBQZlHxaW LyEHf04XrLUQECyb47dKxmWb7vAm7L655Tda4xy/a0gxofxHj5NFuCcNG EkLMQ/2dWGzH9KDFGUtr65ZjHqOjQs41dNdopYhsvzNM06/41Rvv+LQvl 2MeSCwbJp20nFuRScZVC0L+xhin5Hyei369FnD8jcMsuemQTQAAbH+E9A A==; X-CSE-ConnectionGUID: GMMSakTvRG+HtI9KzbPdDQ== X-CSE-MsgGUID: a4rAmyeaQdOEHzryB9Ha9A== X-IronPort-AV: E=Sophos;i="6.21,322,1763449200"; d="scan'208";a="221432062" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2026 11:04:44 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.87.152) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Tue, 3 Mar 2026 11:04:24 -0700 Received: from bby-cbu-swbuild03.eng.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 3 Mar 2026 11:04:23 -0700 From: Charles Perry To: CC: Charles Perry , Andrew Lunn , "David S. Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , Claudiu Beznea , , Subject: [PATCH net-next 4/4] net: macb: add support for Microchip p64h ethernet endpoint Date: Tue, 3 Mar 2026 10:03:18 -0800 Message-ID: <20260303180318.1814791-5-charles.perry@microchip.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260303180318.1814791-1-charles.perry@microchip.com> References: <20260303180318.1814791-1-charles.perry@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" p64h doesn't have the USRIO register so MACB_CAPS_USRIO_DISABLED is used. p64h does support PTP and has the timestamping unit so MACB_CAPS_GEM_HAS_PTP is used. jumbo_max_len is set to 16383 (0x3FFF) as reported by the DCFG2 register bits 0..13. The JML register also has a default value of 0x3FFF. dma_burst_length is set to 16 because that's what most other platforms use and it worked for me so far. There is one other mode where bursts of up to 256 are allowed but this might impact negatively other masters on the NOC. The register default value is 4 (bursts up to 4). Signed-off-by: Charles Perry Reviewed-by: Simon Horman --- drivers/net/ethernet/cadence/macb_main.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index cc48fd494458..d32a16e54214 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -5408,6 +5408,15 @@ static const struct macb_config raspberrypi_rp1_conf= ig =3D { .jumbo_max_len =3D 10240, }; =20 +static const struct macb_config p64h_config =3D { + .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_USRIO_DISABLED, + .dma_burst_length =3D 16, + .clk_init =3D macb_clk_init, + .init =3D init_reset_optional, + .jumbo_max_len =3D 16383, +}; + static const struct of_device_id macb_dt_ids[] =3D { { .compatible =3D "cdns,at91sam9260-macb", .data =3D &at91sam9260_config = }, { .compatible =3D "cdns,macb" }, @@ -5426,6 +5435,7 @@ static const struct of_device_id macb_dt_ids[] =3D { { .compatible =3D "cdns,zynq-gem", .data =3D &zynq_config }, /* deprecate= d */ { .compatible =3D "sifive,fu540-c000-gem", .data =3D &fu540_c000_config }, { .compatible =3D "microchip,mpfs-macb", .data =3D &mpfs_config }, + { .compatible =3D "microchip,p64h-gem", .data =3D &p64h_config}, { .compatible =3D "microchip,sama7g5-gem", .data =3D &sama7g5_gem_config = }, { .compatible =3D "microchip,sama7g5-emac", .data =3D &sama7g5_emac_confi= g }, { .compatible =3D "mobileye,eyeq5-gem", .data =3D &eyeq5_config }, --=20 2.47.3