From nobody Thu Apr 16 03:40:01 2026 Received: from PH0PR06CU001.outbound.protection.outlook.com (mail-westus3azon11011006.outbound.protection.outlook.com [40.107.208.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCB5A35898; Tue, 3 Mar 2026 06:58:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.208.6 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521124; cv=fail; b=N549VgjKhbm1/sUgYJNcCW62/FHFjqj4rSzQxx2Yz9Dou5aOQ/nVCbH2NxA8ndIF9FBMGvmVoBAx4DN++ZKMf28ewxT2NjSjzI5hObeyIqS9dlgXI9OCFwmQqTURzKf3p5ub+/v2kcKcSV0ZUy1STST3iL3Gtak3tCphUWIR6YE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521124; c=relaxed/simple; bh=eXVljPLA2eRyoe/1RO81z0iLRudZmLI4Dhs/jvsdbco=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WQYTtZSLzKmKboJLL/qOPWWQZeZyJnbPKqwtS9eRlZWY0GLpOMzPB5lNy4bEMVy5p7SoZlb/kcYCO1WtcoGI34MrnqADJgc2IKNLKnOGJHAygw1PpKvvD8B5CVf2y1JH1FPsrJz7B0B4ZJeItsx8tBQW2IY70/AANRucFOR3hAc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=qGA/5YjJ; arc=fail smtp.client-ip=40.107.208.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="qGA/5YjJ" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=qbW9xUTcZFMv4NFaHEuQN7XaWxFrzcOy3k24+UMjjsGrzVGDIRyYW7FQ7+RH8mYAaDSiq8XSm9Fa9z97E7W21SGBKCJbC1CzOn6vcJlf+ZYka9xCT/4NuHKsVmKs0a1K9IY8CwUmONewGvVnkq2xTWWQqDPaMqTAFDKTl8bNQgzqya53YuZe25kFgtTWADZti1tZyPoM/1k0T7gGrEmWuMVlafuMMhLUFlgYxOAV0IAMnX0It2TpL4nlsA5BFx5KHSFhvm0oljyKiJ9Erit9W5Q3FerP4TpKxWr53+vmKjz4IEXHZE5zFKVmk463WHdUReXRMzyQj8mFBhg5Dhn56g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=2fi6UyiU3+rdw04s37Q9xXTxfe8LDd+ex7AkiK3bCW0=; b=gxUON/zbR3/adNinYb6iCaP9EjaKCWu17vtdxq2diuF6ysVvMh0369I/i2A5sGO/axlw7L3LEHHrigL8nkiI4OZFIorHuyyIcYsq+SG/ylXFRqfXV1puQjDK79Rjh5eCL163m9ru8EOYpfPY9rCVdyY7IRzkgqRBQwFWwDoyHeSbcorbsGPOkxZdKx3/5g3cAd/2+gORCNDsT6vZaRgRAWP9tI8+3ljxnTTVjxwCHsQxnUOvYbIagSbGh7GiQqmS2xT/JEOaC2lkYRrCmcFVUEFJfSZGA4XHYCxqB2t4FkGggnVB9TN/sAQAaE6LKpns3CKwKNXrPvwXSltVsasNSA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=2fi6UyiU3+rdw04s37Q9xXTxfe8LDd+ex7AkiK3bCW0=; b=qGA/5YjJ+PDe7bWlt6+GGDJfbphDMw7GlH11Zpmv8QXw/n8wH08i/3FbKvPPa0X9lLs2bMdsq6Ibbdo7l3ob1HP7ARmUmnHYJMRED3FKYWYswIMZBuY76iIhqazcFSYpsdAunOB5GBE16qEp1VS3CrcFtUEpDIGrk2Kmz/VJAxNcPVbedAMSB63hP6yNVdrTu2/IscMK8Q6GIa5TAg+ukXvcLPTmsW8qkVcd6hntkJEYMRrXJR/jc+gYpzUovO+64BOfI+6hcuBtRppJwWuDEgp/4m3YWcV66HwstJJd01MROJMIv/jAocDkkRgru6WgWaB49QR+B7GM/4nCTMXcqw== Received: from BN0PR02CA0002.namprd02.prod.outlook.com (2603:10b6:408:e4::7) by LV8PR12MB9451.namprd12.prod.outlook.com (2603:10b6:408:206::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.21; Tue, 3 Mar 2026 06:58:38 +0000 Received: from BN2PEPF00004FBB.namprd04.prod.outlook.com (2603:10b6:408:e4:cafe::af) by BN0PR02CA0002.outlook.office365.com (2603:10b6:408:e4::7) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.21 via Frontend Transport; Tue, 3 Mar 2026 06:58:32 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN2PEPF00004FBB.mail.protection.outlook.com (10.167.243.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:58:38 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:25 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:19 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 1/9] PCI: tegra194: Drive CLKREQ# signal low explicitly Date: Tue, 3 Mar 2026 12:27:50 +0530 Message-ID: <20260303065758.2364340-2-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBB:EE_|LV8PR12MB9451:EE_ X-MS-Office365-Filtering-Correlation-Id: 918d2d1a-24e5-4acb-f1e0-08de78f24c15 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|36860700013|1800799024|82310400026|921020; X-Microsoft-Antispam-Message-Info: bP4hkrlI8FN/jzjdchYluxD5V1AeGa4ulYp929/pJBwK4Q/1n5waY4kyglefoRV1goV9Os8ta6B2eK7pgyLcMxlG4xsCDtsyZR4XMwMBUSNvHcvfF6FGFHWNe+SH2Cz7ZDoQbuGSsA6hI31HoCd5IhozsstAoAEwDlSE2BbK22sy2YfSKuIDWh96KuOpjZsVwDJjhbSojkemgQOa8dtROlSqiFRDex16D3/sHjivoVPhaN9JPFnrOPa+q7EGoO4WWwikDuvaboLZKeNHmnUegKmoB3zzvVaDs408EekzS4ryx6ZUAgTeck3bYKw7BqX0hOOoldW0cMb7pfGHXJ4nuwVMHjsJPiwhh0ySBpM8mP7WfM7VeNrrumH5b3TixFIPcVtHrpU0yjJ8XTtgttn4yTWv7PVYXLv4LV03beDvAFe9QnCf2uuCp/8GdDkacX51bzkJCgLAeEKn3ipffO2KEHkLbz4PHwhMUMauwiRTJg/Bl27cA+mFrG6+skQF5obbvDWbHm8vZm66zEykhqnsDU61ysKPK/CMmkjE0aMC996tGWZdckB2B759D40Wkq63VHpSIeSXRq1Q0RpVJ/ENAPg2LJGbCfar6UBpHwn1/yc8D7LMpapdipbOYbkxKDAN6qn18smEaIV94jA7Ztvf7VKTMtDdWjTifvyJkpzigFg95BSynUq24sfRCj8BWKm+A4jEuO/LUXg74/L6fLZt/k7KhhQr+SRaa7k9kphi07LvqGedDGwLxYUMriXwMF+3twhUBCFZiIbh/M42AqmY09c+mYtqDRDGYoxBsPT78ZaNTjKW6hJG5hVNm1QvGu1D5ZzfeZ7PWkNp2HxfkLVB2M22HB4yJnrq9hDHJRyceMw= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(36860700013)(1800799024)(82310400026)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JkoPI42okptW8aTUIl6Ae4udsWAMeFSULYO8wemp3HJ4KEHZHStUf50qbVeQe58XBL+u8HT22UjxFnWl7hwnZBeckaqgAhTK9hVTz1xxI8U83219bJ3+EGbRHvZhwmTIBqGaoy+x1L0JTRnLsMccyAT4Yqo1vR1lN12gIMVpl57/diGbvO4yMJt4+RYskU6ow17FOPBSE4+4T9CHYAaS3mTXCFByUq3Ewcju8HYpdmH0d2o/pWciJio4aRcI/SPSBUExLUdwHdwxjjwNxs5n8ICaVgtfbNq1WfP0T3gLIUtvm8GVIctupU17mrhrVgi79gQcIGmY6lLxq3gXT0Wy2/IbzrQpiQDGPJMPHHFaEueqKHvwUZhl9//EUWNSfCGpkXeCmg1L/p+ocsrKZcq3XVBBMz/FXewp+CJDtCfFBIQN0+8iKTUaUSVIQxg05wrH X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:58:38.4199 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 918d2d1a-24e5-4acb-f1e0-08de78f24c15 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9451 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar Currently, the default setting is that CLKREQ# signal of a Root Port is internally overridden to '0' to enable REFCLK to flow out to the slot. It is observed that one of the PCIe switches (case in point Broadcom PCIe Gen4 switch) is propagating the CLKREQ# signal of the Root Port to the downstream side of the switch and expecting the Endpoint devices to pull it low so that it (PCIe switch) can give out the REFCLK although the Switch as such doesn't support CLK-PM or ASPM-L1SS. So, as a workaround, this patch drives the CLKREQ# of the Root Port itself low to avoid link up issues between PCIe switch downstream port and Endpoint devices. This is not a wrong thing to do after all the CLKREQ# is anyway being overridden to '0' internally and now it is just that the same is being propagated outside also. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V6 -> V7: Fix commit message Changes V1 -> V6: None drivers/pci/controller/dwc/pcie-tegra194.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index b1ae46761915..2f1f882fc737 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -44,6 +44,7 @@ #define APPL_PINMUX_CLKREQ_OVERRIDE BIT(3) #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN BIT(4) #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE BIT(5) +#define APPL_PINMUX_CLKREQ_DEFAULT_VALUE BIT(13) =20 #define APPL_CTRL 0x4 #define APPL_CTRL_SYS_PRE_DET_STATE BIT(6) @@ -1411,6 +1412,7 @@ static int tegra_pcie_config_controller(struct tegra_= pcie_dw *pcie, val =3D appl_readl(pcie, APPL_PINMUX); val |=3D APPL_PINMUX_CLKREQ_OVERRIDE_EN; val &=3D ~APPL_PINMUX_CLKREQ_OVERRIDE; + val &=3D ~APPL_PINMUX_CLKREQ_DEFAULT_VALUE; appl_writel(pcie, val, APPL_PINMUX); } =20 --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from BL2PR02CU003.outbound.protection.outlook.com (mail-eastusazon11011000.outbound.protection.outlook.com [52.101.52.0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6DCF347510; Tue, 3 Mar 2026 06:58:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.52.0 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521137; cv=fail; b=eforQjfHLG8kaMdsJBees9YExoFfOV/a89BdxM1841B4BeW3Pf2zwbe/sRYYS05sAYaz1j42mRA8sRAjlWusBq9D5mi3f5IOWU96mlOBWzMGU5t+AeVKCFlaBv3YDDx7cEux49QQ/eWQNTUHydG2E4R4wTrww1d9QzrjyW8HrVA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521137; c=relaxed/simple; bh=a/bo7uIRmBu6kC7BrauZ4cNKugRcINQmKjLD5pcdh1g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=THW2dHXQB8nksfvYB1o2SfoQEdh0YGtK+Ko013UU3XYj89QDukBzXlfYRyK2yRrgztORqDRUX5zXHrJVY3JqBqClkO8tb8Lk/7yEoeadyyzBMaRytUOdhhfxGidfHWw6upDe0RWqlDJqVIPfor3tQUMGKAiBwaC/jZeMTLIM5to= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=E618Xzs4; arc=fail smtp.client-ip=52.101.52.0 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="E618Xzs4" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=W18kvf/vJKzIAhg6r4vKpFb8NSQT5S22RZj49mRXhHmpzWM/riLJn0tAM+lsBDRBPqAdV6dCfbYYXmgDP0dCVO9xOPHKXPxXJI8zWzbU8wxNaHfp8H9/Owf7czqAgus82YGpHQaoFFRPCha/rmRSSxCSnAvpnSelz5sompnPwn1UiupZ1hB0ifbQRgQ2aczHwfHdi7l/7mAeMLI1L1x6Bn85Amu7SVIfiT01BEgRqKFEqHVk9HN/fm8n5Hf5I9EN0RvlIQfNfmHTYVYsts31Tb4IHqHrd6y3awifS41lWpES3/AUaXaECC2VrcCLow4rAXXGlpt402O8/UCtSQJygQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dp2Ud3KS6lSraZUauoaT1QYHpjHxDbiDPfE09TpmiPY=; b=y9gwjC1mcBMdelqj+IB9zbCiRgay72232tbatIsHNOJp5Pif0MZ0nE93oBDWS6PeOFs+r1wJ01TuD9PNBLQF8n64FSJ1+JzXt01bCTB3fDw6TNzTzmE7bbaRGCXAGtN3naIg9OGkho1kZvnzc4Ro8DbJO5P0x4kTEvCZYIi4w+RKk10RCEGg4oMWIy3sxplKGLPpaa4s28l/V/cunbMizZt16ncy4YXko814ydQMuN4w2kLj83xdUPNG2v8/EMZt5laHyok6yNXVY99reNQT60WJ/6D6uqMLRXLTjlJpXqFekkpfPEg3JKT/3CKJ1cfEI7fN2TvaQLWPyVmAnO0WKw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dp2Ud3KS6lSraZUauoaT1QYHpjHxDbiDPfE09TpmiPY=; b=E618Xzs41TQzUzwFF+q7k0zUbm1vAGM0i1rNSzzfufQicTAWbUKxMf+8rj5oRoST2hkJj//4jodBKlxX/Um5RFfVXFHNUfhbaL3ISi/ZDi7h0pzLxEAVerypfey6b/5kKG9RNm0F51HwJAHDtAn9Pi3q7bFGJzz1u3YTzoX7Mo9eppaM3aW+HcyMDE5MCW5IcMFb9zvgBI37ccQfbYIEU4m0bCZtYj0sbO8AEAu5Mna7u3f8ZbHxHcwr3OmpoiWg3kMYaktDuFhqWWu6R8/b202FGNbvPL8LgXE4O4laVjObsP3wRvfvitDEfLafNR5GUEK+G/6sXF5djFPsQL27IQ== Received: from BN9PR03CA0365.namprd03.prod.outlook.com (2603:10b6:408:f7::10) by DS0PR12MB7900.namprd12.prod.outlook.com (2603:10b6:8:14e::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.15; Tue, 3 Mar 2026 06:58:46 +0000 Received: from BN2PEPF000044AC.namprd04.prod.outlook.com (2603:10b6:408:f7:cafe::d6) by BN9PR03CA0365.outlook.office365.com (2603:10b6:408:f7::10) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.21 via Frontend Transport; Tue, 3 Mar 2026 06:58:46 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN2PEPF000044AC.mail.protection.outlook.com (10.167.243.107) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:58:46 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:32 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:25 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 2/9] PCI: tegra194: Calibrate P2U for Endpoint mode Date: Tue, 3 Mar 2026 12:27:51 +0530 Message-ID: <20260303065758.2364340-3-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044AC:EE_|DS0PR12MB7900:EE_ X-MS-Office365-Filtering-Correlation-Id: 6e8336b0-3547-4c6c-3468-08de78f250d9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|82310400026|7416014|376014|921020; X-Microsoft-Antispam-Message-Info: RTtGsERi3qfVeoxPOtDj/fkNbvRGRUPgFoOx/loCLeNlTuUpXO1MsKGQSxTk09W/QDFj+sY+lCp08dhivYv0VSFd3dllHjYIUX1Rsk4sKzcoogH7qDLr9iWLRal1TvAlkhiU9/lM7vnTXqqJibLg4vUZLYDMPiDO7kTlDMr/u25AlXv23td01sNKLwtv/6WZzrlMpR74qBOVL5pXkdDEDbs5QHI99qIsqconHaxn/jQcXUze+8P76DkbkldEqKsIgfVz65YNCvNp6qwoh1YlT5p9ENUK1tCNj1AMH+/ApU/75jSrwr85Mb0t6Aw0DFYG9GzT2KFBtbBZDjC0tjaIkCIv061RGyyf2giJ0YIjnQewVJxFpcSOTHCG01GkPZaUcQEy9cso3GctASJzHAHCHI9ontgBmGH62QbJeqczkcpXtVqCd+O8Wj9o8zKy9xQAqJpjLyYAphGPgIteOqe7ee8mrvAPmw9opN6m4dWlLArZE1w1R9jt376migmZppYgdIkhweRBDaafM97AZJkqonCUqWVWJJydBdjHD8WK3xCUTPJlTgM3lx8SpJebrvRx9H6glyRLDqDgcSukOa1OrhC43thRRNYPNEILFfzwMZJgn4syKHN9/SPhRfZyHkqfoP3AoQk3rhEpdUDIrz8UtCk096q2s/2K9SYpMrVOaVW/wlsBYYphN7oQSfo+CpxhQI4EDW/mv0dU6FQHTgXhisYPzpvFcgh1XD+vlLVA2JNpAsSn0m+Qvrijli8QCQVMgHKkLPaGZ/hF+u/mt3aY2Keeg28aFNzrgO5suP184apLLdzuNUVoymLB55HRnTFxxXt3OXg7OLIi0aHCVR8IJQSn8Hivv+vVwNMQqNaD3k8= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(82310400026)(7416014)(376014)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: o7SzXODrLzENguE/BCGzpC6G6eJ6AocS60qAJq5uPMjLQGeWyJ3PiSHUwNzRvqFmGx4UotVhKdGMEPIw9lnETS/K7Q/ZKL7cD8gsUYf7rle/QKUkHKXHoTQQvnWyKESQn9Z2/8+19akwNc5L9aRPC7nqo3gMZS85a2HqeYv2kfybNDhTGFJXJCbQHnnOW2V61YzjVmu5FW/CUZx53rSFM4ZckXZYTN8iVOGH/AuaR6uaGe1fpF78iuFXplCgAlzWV2DATLZwxWB2wQbXdWUzhlz110B2TOXdjOrp5XdXV3E9fbkfwDnRHMMBkypksq2M6Ip0G/3/WLk5D3NnHrXd5M62JcRopTkivu/gAW+foVx8/2eYRFzgUbkIOKnANRwhtIiW76M7eydpIG9n/jXtupYJ30cjGou1POIK9irKD0jRbgtACxDYIZR9VHkaCDRX X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:58:46.5178 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6e8336b0-3547-4c6c-3468-08de78f250d9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044AC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7900 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar Calibrate P2U for Endpoint controller to request UPHY PLL rate change to Gen1 during initialization. This helps to reset stale PLL state from the previous bad link state. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V1 -> V7: None drivers/pci/controller/dwc/pcie-tegra194.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index 2f1f882fc737..980988b7499c 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1054,6 +1054,9 @@ static int tegra_pcie_enable_phy(struct tegra_pcie_dw= *pcie) ret =3D phy_power_on(pcie->phys[i]); if (ret < 0) goto phy_exit; + + if (pcie->of_data->mode =3D=3D DW_PCIE_EP_TYPE) + phy_calibrate(pcie->phys[i]); } =20 return 0; --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from BL2PR02CU003.outbound.protection.outlook.com (mail-eastusazon11011010.outbound.protection.outlook.com [52.101.52.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C09F4385527; Tue, 3 Mar 2026 06:59:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.52.10 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521146; cv=fail; b=dyabfcWOHQEWyZyd0CEikTZYQNoGptJnW3iO5wHD6lhdHqOZUDxMGgF9ZUEJWBQqJsGLkObnJFGRKBhj6PCmK1oeO1LFWVLzzrME0EZi6bGFgaKw02G/l/5vr+0U6yWUqjDC/r7tHOiOIaWspOo/UpupvirfSQebG3jNLMcQfYY= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521146; c=relaxed/simple; bh=BkLxC7nwkXsDLRoNPNs0cFzZXEi0nXGEcSojVM2+mFM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Efr1EaUUHfjxn9TKCEqnYGJfRrLgK77Yy7Y8yh0iSAQn2kcNnBaHUdNCbuPbYfqjt1vVelwCmude/s8x30F0rZ0DGixqIDdlhXmaBm5kmYzODR8dvwcBcTKLRimbUJHAJ3crVM1R2Mdf+iu7vBC0dDtfXHpage1+PBTviMmkp5k= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=s153CVem; arc=fail smtp.client-ip=52.101.52.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="s153CVem" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=q2ZzySmvL4L5AxTXucuAmFukUwDRaQIAu2FZh8C91BQvh7/rjNARg+pabV1VOW0E40kUDuwH0Z1vPAZ9nZ1+M85TcRqUSNAjVCHs68fH0AEvLaFYT6j1NC3QoNGo0jBV6TJM6VphMcI9tND1hjJ45QHVIx+blkB0ollklNJpWQ+IvXTFlYPKEGhePEmqioBuX456lewrgkBvMlJUVsEwfqRH4XUyZ+db4Dje6m0nJ366we9TcnSzBBD11kLtXO1vt4UJoMuv2jQDm9wxQwpLlRZ/iTm4q9w1mXGv0o/YDBy3/K/ByJkzs8hy5oESbfKyocZovPI1kkebgZS++EP2PQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dPgeWDnq1vAmPSghqLRmtlAs29WZUcj5WXZH1QKhi84=; b=ALe+Kl4sikuNtcPEyZxBw8wRE5Jdh2+G/MBsDSoLuLezucOaj7nqV/bZvPtBzOBCS7Rf6mr2RoGnINQV/UTcyK7/eZOZp7tP2RrdaspJ/BF5cwTUwUVC7cbMfW4sWDJ+nTY9SEvB/aP24kUkcPkmRhWHBV8/6GuJc8mbRK5CVAIK6V9hLpzZhDbfO9ceb0IzmH+RIfX13955bt0At1bJr7GH2vZaHt04ioSCjppiSflab2SiY102d2jp4Zy4vqTrI5f07ww8vtqoWpYf3yAtau1q7GBnZewKBlyu6GBVfN3QJB72Zi+PEf5l9pcskEf5+G2AsOZadITyUx5H+nyDEg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dPgeWDnq1vAmPSghqLRmtlAs29WZUcj5WXZH1QKhi84=; b=s153CVem0a4bAFRos3cuWMnLw9cafJl5HVxYfP7NE1Jo3AamS+IwNnWqTfvXxRly+jUnUck6olgv/9dIGbPSYnV4Y2qfDBIYn5nPYzfP7W2fGB0xTtbSmjx0Zb39T2+1QFCS0Etl7447V+SaEBt9As72k/SmXN+YUQdT53ROoiUR/J5yQNhlJe8qPBv78s3vimjFcz5w0axP9n402s58OsPds6/PwIENXUN4tO1pNUaFxOAqE+XUx8aiShia/meoUhjYC8WM4as4wNn0tStVLYJz0dalr8jXIPTQ4tLqVrKOBuoL7MyXHDh2HArE+A5FrqpKlsasX/g8ytiQWs/D6Q== Received: from BN9PR03CA0689.namprd03.prod.outlook.com (2603:10b6:408:10e::34) by MN2PR12MB4126.namprd12.prod.outlook.com (2603:10b6:208:199::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.22; Tue, 3 Mar 2026 06:58:59 +0000 Received: from BN2PEPF00004FBC.namprd04.prod.outlook.com (2603:10b6:408:10e:cafe::6) by BN9PR03CA0689.outlook.office365.com (2603:10b6:408:10e::34) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.22 via Frontend Transport; Tue, 3 Mar 2026 06:58:54 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN2PEPF00004FBC.mail.protection.outlook.com (10.167.243.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:58:59 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:39 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:32 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 3/9] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration Date: Tue, 3 Mar 2026 12:27:52 +0530 Message-ID: <20260303065758.2364340-4-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBC:EE_|MN2PR12MB4126:EE_ X-MS-Office365-Filtering-Correlation-Id: b211d869-5d18-443c-f840-08de78f2588d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|82310400026|36860700013|921020; X-Microsoft-Antispam-Message-Info: eQsGKL21+53ncz2QE7IdBxUMwsAH/Yy3Z3Gg2I6EJUjWxndeHw/VBleCJeJHgVRpdLj63oAEJ0jIs/PniYm8UTGfmnAlGZTQ0cLhdB0d8QYJp3SWU9olzE46fss1gWCxf/Q3GWasrnfwPcdbO6zBqIJzlcDpI8OzM0Ik+pSJ7RNgqbN38KYSUlBLRwF0yO4kxp0ztcuhqW3SJZp0sCOk0bURq+S7KAsOjWShLvtl82jvRJPTBusTE/g3u06NYv1bdHvaZf/YFODgeLatMEElTgUHVDF+u2yyO7HfnCHW6JO7XYbFbnR4Fn7lFQ0tJRWFo8Ob/SmSvyVnGQW8YU/2/V6H1l77TfZojW6O27Q1laMwI2OlnZ0v76ZcZ8U5LJ6vCEKCqovhRU6vE2pBQi0XrawotmbG7ZzdkHwJrP50qhDu8pfv8WtCImRKNrmr0dMAm/cZU37800LuVPZEksKoRW8CCnRaDPA2KNdhZOdQfFf616kJUD7O+lYmilA5vzb+IMGeuz8VmykcQk8qWrje2dwSAvTM1IIsJjRsfPt13EmM9Fw5eOd2mPnyU62/gW3TNKpcM/Yv9bo9Y0EOU4jsNZkQ+k3GUFhtyfhtoPhU72hKAqRgb1J6gfvjqXZ5haiYegrYUKqBRDt6pwgEdOoEBTQBReVs2M9hDoMwqFSueweKfstR38bkLnBOnrrtYZq/YMDQAcl0vUSsd5oNikgdnCWoV4QIC4zfgKZTBtHGw10KRzjoT3jcgp1h+9ikaKpGiDmBaoVL9atajzeCYIdN90fMKlMa1JIA0KZsIttuYSf1oz/JPx/R2d2ivENZO0CumX/a2hIm5BJNQNxrrdm7kIp1f6CQYy7uCfBMAPP9GS0= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(1800799024)(82310400026)(36860700013)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Ch6pTlSuzg/fvUFToRmSD/JO+ZbROe7HHmC6eH4/E0jF4jr07KxYH/TdTnQH6+e0mkl3N4EC47cr1oTWC7e27NIDH7pGbmMCRJVzRhwG29DUE99gNI58uezDZ3m3Ik07JfIWSmqNsnh2eEVUmCaNEA47qy5/LRHn6zrqc7nFkTd7er+9dfEbtmJq0+gN0PmEtxy29TK73Zek1x6oJ72XYYql2xEvGSAi0490kfa6WI7Tu6+8gWRBHmxHGGedhMOmb8YgCyEi8iT5VYYOGUl1iJC4qGL+shpoBgHhaQ8xgu8zgHKz4UfWVkMn7v56aUjW7r5SNA7u3dDTTQW3X2Oi1kb5fRQ7tubY4N79/17vcxewhWH20j/kIuKtOQwpO9SqAAYmXRz5/D4zL+JvvNXs1VWjRLPHTrxMPi1Fco5dRZyDUsGdChwyQ5MGxpjsjZYF X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:58:59.4033 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b211d869-5d18-443c-f840-08de78f2588d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4126 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar The Tegra PCIe Endpoint controller has a single interrupt line that is shared between multiple interrupt sources: 1. PCIe link state events (link up, hot reset done) 2. Configuration space events (Bus Master Enable changes) 3. DMA completion events Currently, the interrupt is registered with IRQF_ONESHOT, which keeps the interrupt line masked until the threaded handler completes. This prevents the DMA driver from sharing the same interrupt line, as the DMA completion interrupts would be blocked while the threaded handler processes link state events. Removing IRQF_ONESHOT is safe for the following reasons: 1. The hard IRQ handler (tegra_pcie_ep_hard_irq) properly acknowledges and clears all interrupt status bits in hardware before returning. This prevents interrupt storms and ensures the interrupt controller can re-enable the interrupt line immediately. 2. The hard IRQ handler explicitly checks for DMA interrupts (APPL_INTR_STATUS_L1_8_0_EDMA_INT_MASK) and marks them as handled, allowing the DMA driver's handler to process them separately. 3. The threaded handler (tegra_pcie_ep_irq_thread) only processes link-up notifications and LTR message sending. These operations don't conflict with DMA interrupt processing and don't require the interrupt line to remain masked. This change enables the DMA driver to share the interrupt line with the PCIe Endpoint driver, allowing both drivers to process their respective events without blocking each other. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V6 -> V7: None Changes V1 -> V6: Updated commit message drivers/pci/controller/dwc/pcie-tegra194.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index 980988b7499c..352412680b4d 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -2227,7 +2227,7 @@ static int tegra_pcie_dw_probe(struct platform_device= *pdev) ret =3D devm_request_threaded_irq(dev, pp->irq, tegra_pcie_ep_hard_irq, tegra_pcie_ep_irq_thread, - IRQF_SHARED | IRQF_ONESHOT, + IRQF_SHARED, "tegra-pcie-ep-intr", pcie); if (ret) { dev_err(dev, "Failed to request IRQ %d: %d\n", pp->irq, --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from BN8PR05CU002.outbound.protection.outlook.com (mail-eastus2azon11011053.outbound.protection.outlook.com [52.101.57.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE13E386439; Tue, 3 Mar 2026 06:59:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.57.53 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521152; cv=fail; b=O54AfIj31oAYKUzUKgVNrh3vXBiitGDnZyNI6SyipP8aI11iUCHSG3foKCozhbBGemwHjd8kPRoV+IuCePhPmQVDte9iHndcNxDrQ/eEQ0jukeREc5kTehKqAfNFUX3FW7P2c7ygMUpttug8RHBi3Vd1XZu5TXG1xu7oLK7IV3E= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521152; c=relaxed/simple; bh=e614jC3a3/m4p+J7p8Aytsx27ImB2atkWusrW1gfNgE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OCKHAMjva0PsAWmuFthm5vCnhS4XrvlGKlYqve5iW2cTYABdEPSFY/yCBGBdOJXyz4CcOLJ+vykBDWkW2nnwDEbfadKVhaKgUZvQmj9MnvuipvnV/+JJE6Qh2WdVkO3LYqcE/CYCom2u/tdgeSAIyw8uH3lqvDB85ab/X7gO3Gc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=jFQraENO; arc=fail smtp.client-ip=52.101.57.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="jFQraENO" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=HxLm4LtxSebkdb/ExXYsdKsoMMO2gucRVRQ+fU+zpKBaALvv92jY/9LM1g2DYnawoCc3ESYr0Z7ewiQ7e+pqQe0nVy7WtCJJTNX3yheRY0E9jSOaFozPW7a6v/UZx+RQmYDXcDk8zzVMjTudk1JT5qhjS/ZUbjqFpf9EgPxK395beut7j0wW9DW9KmVhW1fB3rUAr+IrnLiokpFol/nSN/aHDmjKS/UhcsyGkaxHseAMX6dQwuUGEhchAJgOgaHLMMV7KpkULAMNOQ5eaI4pNFEn6Lyo+d58W7k/cfiPxmsVvBbTY57yYDnn9uOCJ5Wy8y0Rh1Xsn0kftqDiaJWwcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aa794zdA6za31haBgGFFP64BlyoB1Rhlo3tGLczqcJ0=; b=QPhfen+6eZyCC6DDO/0mv7TZo90eJegK5awwPtc1Ly58xOGYn1S+Tt54bFrs1LFV8jT8C0dHHAsj0hpZtDz6xQdhgDZWMPm94G01n2h4buUh60Is5JI0os/XTN57Z0MyfIUdgnQP0YspZRKgaNMZa4ygsDgHsDieglndc8D8+3aCdLGHt+JcHZ9uhTayvlHDflFTUnUEEsIEYSf/dL5pNGl8XXdv+05ombGFxC2ByZASKNeiptb76WfOLUvnWnePifbyvSfyBQA0M1Qua91giJhXEpT7l5Fgvj96deFV0dVTvSt4YUpfp6E5yxDsFMZTP2++NdtZmsHxzV/tmO/qPA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aa794zdA6za31haBgGFFP64BlyoB1Rhlo3tGLczqcJ0=; b=jFQraENOTmTRBqQMuPss6F1ZYNaIDDxwbDFiLdbQuvRmZJ95L6pwdWG/9jKPLxw5b5u7WxCjKjyQ5ReN2ServfrLUUvJDx6sL9tdfCcZybp/fu9pO1WvuegYUr0o1HdK0kqclf8JpkGLgt77VS109JaAryz1nEiCr9QH6VooZ9vvbUMt2Z3aRdN928loZLe2fz8m5iFT7Npt0kJJelqAKT5aK3s+Esyn9NsquU16RNrInm/9X5122AfgMNoT1MGBUySXypdvklYo6dtg6z9m3iK5KS0rNM2DPXO/61X68jC9dvLQNZxYGqvvqDZJelEWd0WuY92CjG6vIZwVFvKNsA== Received: from BN9PR03CA0672.namprd03.prod.outlook.com (2603:10b6:408:10e::17) by CY5PR12MB6034.namprd12.prod.outlook.com (2603:10b6:930:2e::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.21; Tue, 3 Mar 2026 06:59:04 +0000 Received: from BN2PEPF00004FBC.namprd04.prod.outlook.com (2603:10b6:408:10e:cafe::fc) by BN9PR03CA0672.outlook.office365.com (2603:10b6:408:10e::17) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.22 via Frontend Transport; Tue, 3 Mar 2026 06:58:47 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN2PEPF00004FBC.mail.protection.outlook.com (10.167.243.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:59:03 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:45 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:38 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 4/9] PCI: tegra194: Enable DMA interrupt Date: Tue, 3 Mar 2026 12:27:53 +0530 Message-ID: <20260303065758.2364340-5-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBC:EE_|CY5PR12MB6034:EE_ X-MS-Office365-Filtering-Correlation-Id: 3e4c33ee-6fe5-4430-469f-08de78f25b05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|36860700013|1800799024|82310400026|921020; X-Microsoft-Antispam-Message-Info: uk1+iroL7XDg1OVWz4biIx5PZpD7FwmNFlQmEyTq0jOQbFydtWJNvpYcOtngajBO+vI05N9OyZKAFn6Uhy3u6/5WWebeTHB/tHJpVldx/ssxbgwSBLLuHzyLgqsq4wRxp002/YwhBsClZVlHvefBSC0UwioLItIlJKi9et73xMrgopArdMrkPRioBXJhAEStHCScUIbfGA/LMPFTEXlZKZfhPoRY4VU0/5wxH1A29NLi6pzOsTBs/Me5WwWJn9+Znv90wgjf0A9j5n4/S4HCmBG07c7BMufijevqJf03D+wIhxExLq+kpAOJT4dK4OHxIx8GGsPIVOUfmt7NvNJ19gBPVVHnBdx1zDdsb9QzLzOh5RLiQ08sZQL/c4k93pEzXP+HBnWvkS+M21zeLuGzlNQGOmxztfD1SvXBfUwOjkS2WEkYfvAkKtiPIy3ljJIf2zCwFQ2sD/AcDTUb/2tUNsoikNzwzfBhua8Cz6xSIDmvMPFox5MsaOsdzMdio5Ig3YOE5/04usC3dpbaQRHqd2hxhOPGW0PlWq1wLHGyhmgfc1API+cSfrDWlsZb6Eidp82e8F5lFB1nVjG4BN/duB7YK/YUz7k+8OSBpphoQcNDSga2r6q7Tk2EN29PZd3DmLreOen+D4jPX0LkP0RreEQHT+9M6R+xsbqaNc923oYnA6o+1XcMq5JTK0bmGBDoD4PWYiFmZ9roA+BvCWWbauPNqmdMN02k5BSZNBnkuOvomo4XxjhOJDLLOuQC1yJ030qMV6SStvqWrLGbxt4L5SNJSUqEfhwxasH2/Vx2wN72v79eHlm1slMzT2i8qqugM0WYBYKNp5TCMcoKxAFLKBq2gsRnMqldFLDSCZVUYls= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(36860700013)(1800799024)(82310400026)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rwOl71jlL5uUui6MkPAZYTgX4lQfWhKQ8+nnTE1GBiEixtDirnXeHvPLK0DxiDXykBuFtigu7zPEwvDS9j86bD0HqJ3X3q7SloS15EUaV2ZCdVNJ4Pz7AaqKmvzTXobWpSU31BL8NQMZL5In+jVBrr+qPuuhlRX3NBKXaq6T+J/F1vWruImKHUquM00TFzpwh6uR5b9ceyFCWxM7hfNcHPbup5SPh0pWuLNDkGFs4w++/0/c05YHGCvh2xeDErjdW5uLYgTXDeuC+F3HwBVdG0FfZYBUCE8JONb6IXEJrxsLMNag64FLOztF4P/lmcBp36i2gLx6pJc4s3cWXBqFqL3cUPKhRvygwKYImVS1K3hVr73WEErfK41WmgT9fQLMduQuKXxoryj4ht/rio411gwfCZHhy/pgnVsc84wGpSq8eAi2/qXbBQmQ/ZVXyOS1 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:59:03.5533 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3e4c33ee-6fe5-4430-469f-08de78f25b05 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6034 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar Enable DMA interrupt to support Tegra PCIe DMA in both Root Port and Endpoint modes. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V1 -> V7: None drivers/pci/controller/dwc/pcie-tegra194.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index 352412680b4d..918e864b74a7 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -91,6 +91,7 @@ #define APPL_INTR_EN_L1_8_0 0x44 #define APPL_INTR_EN_L1_8_BW_MGT_INT_EN BIT(2) #define APPL_INTR_EN_L1_8_AUTO_BW_INT_EN BIT(3) +#define APPL_INTR_EN_L1_8_EDMA_INT_EN BIT(6) #define APPL_INTR_EN_L1_8_INTX_EN BIT(11) #define APPL_INTR_EN_L1_8_AER_INT_EN BIT(15) =20 @@ -543,6 +544,13 @@ static irqreturn_t tegra_pcie_ep_hard_irq(int irq, voi= d *arg) spurious =3D 0; } =20 + if (status_l0 & APPL_INTR_STATUS_L0_INT_INT) { + status_l1 =3D appl_readl(pcie, APPL_INTR_STATUS_L1_8_0); + /* Interrupt is handled by dma driver, don't treat it as spurious */ + if (status_l1 & APPL_INTR_STATUS_L1_8_0_EDMA_INT_MASK) + spurious =3D 0; + } + if (spurious) { dev_warn(pcie->dev, "Random interrupt (STATUS =3D 0x%08X)\n", status_l0); @@ -762,6 +770,7 @@ static void tegra_pcie_enable_intx_interrupts(struct dw= _pcie_rp *pp) val |=3D APPL_INTR_EN_L1_8_INTX_EN; val |=3D APPL_INTR_EN_L1_8_AUTO_BW_INT_EN; val |=3D APPL_INTR_EN_L1_8_BW_MGT_INT_EN; + val |=3D APPL_INTR_EN_L1_8_EDMA_INT_EN; if (IS_ENABLED(CONFIG_PCIEAER)) val |=3D APPL_INTR_EN_L1_8_AER_INT_EN; appl_writel(pcie, val, APPL_INTR_EN_L1_8_0); @@ -1786,6 +1795,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegr= a_pcie_dw *pcie) val |=3D APPL_INTR_EN_L0_0_SYS_INTR_EN; val |=3D APPL_INTR_EN_L0_0_LINK_STATE_INT_EN; val |=3D APPL_INTR_EN_L0_0_PCI_CMD_EN_INT_EN; + val |=3D APPL_INTR_EN_L0_0_INT_INT_EN; appl_writel(pcie, val, APPL_INTR_EN_L0_0); =20 val =3D appl_readl(pcie, APPL_INTR_EN_L1_0_0); @@ -1793,6 +1803,10 @@ static void pex_ep_event_pex_rst_deassert(struct teg= ra_pcie_dw *pcie) val |=3D APPL_INTR_EN_L1_0_0_RDLH_LINK_UP_INT_EN; appl_writel(pcie, val, APPL_INTR_EN_L1_0_0); =20 + val =3D appl_readl(pcie, APPL_INTR_EN_L1_8_0); + val |=3D APPL_INTR_EN_L1_8_EDMA_INT_EN; + appl_writel(pcie, val, APPL_INTR_EN_L1_8_0); + /* 110us for both snoop and no-snoop */ val =3D FIELD_PREP(PCI_LTR_VALUE_MASK, 110) | FIELD_PREP(PCI_LTR_SCALE_MASK, 2) | --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from BL0PR03CU003.outbound.protection.outlook.com (mail-eastusazon11012012.outbound.protection.outlook.com [52.101.53.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82F75386433; Tue, 3 Mar 2026 06:59:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.53.12 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521149; cv=fail; b=kKxGbW5b/g4QFlpVI5NNsLhb50DrR/2dZLpujNF9y9NjqR1dp0Z3+A0RzEzTwAS945nAg+KuM3xg580aBAFkHQKso6ICD6ZHB4z/QMluxhjT6WCit1UCYKinZzauvNmSIxb4kKwt9Mp9/7W0fKJ7x58zKo26kMq5Y19X/TQ0af4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521149; c=relaxed/simple; bh=bdfQo6IKxmnnimm+x8G9ot1wFhmhRkMWRVjn4YgOKLg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZENbzLdvp1ydHJGt6oOtd5DbBvc5ue/GNBCoOInCoO8bYegkHijiqLQzBTBwPKp9avotZWbmVthgstmtoGsIz03/GmHmbUyjzgk4Ju7fkHxuU8K5YnQKd38onA6dnQKF5dSpFMNKkfNq7+EM7WgNNa2TFZyOOVMq3zapzY5SBno= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=A43RoLjm; arc=fail smtp.client-ip=52.101.53.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="A43RoLjm" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=sio8CF0bWmNqY0GUDQyt/EUCvmmQcVYi89nxQyku8AA8N1lxexzztdwHaFrEQqPhpvyxPbaYdIHv0fqEEKkC1CFsFr9/SCNSZfrMvEvuUfyR4hS73HVZXSM00VoQotEfDckQ2ZoFID32QnWm5XdtRkoN8XKj8in8TaniH6nxcyOh2m+UeTrjmIt7qkDwCt5xuf0DJzkq6nR8wc8SHq7b4vq3MXaU5Kh4LSi1jSzD3nqoSUDziFa9LAaRI5cqevQf9nz45QbyvP8tkjlkQlK16l20/7RUVXJc/E3CFRNnSgxDrguWOZ9SjbuZHnM5KYI4i/ccYwtcX8ku9eq1iRRNMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=wcXjwMsL6U1otbkhYakGwN71cGDBk4//c/fVCF4CUuU=; b=x+HDPclLSy+tMVt35arxJCu1MRhL8P9kFAgs4/BInXHaCofSjz4JecYMjvjH80sStI6/SJT8vFlmk8J/vzEdymtnwV4j3iC0lySENNu+kbSU+sUQ0A7L1fiAubbSOUiTNrbuSuMqgGY27Fl7yoNmK6oidH3uJqQyCeVyulaeP7JcqD795VryXCQik+F4OClsvbj5INhtCS99JeScm1Vr89U7RrL7VSLaQ70tTgrwhqijOxHMsVPnI4d7sH57JZBcNEa6kd9r2Iyf19JpzbeWpjRQgmriwR42ynk+7gZKRzmg31YDiq9Hst2k4gTzqQAnmLSETcwH5XqaR9XY640wgA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=wcXjwMsL6U1otbkhYakGwN71cGDBk4//c/fVCF4CUuU=; b=A43RoLjmmg3on2Wa3cWajfR0MUCx1K948X7GEE+VdsgwPZs/BcPo4MkIw11nOg6vVdtKdsAUJN+DaYOJxHQHjgjC+AzwbHb/g4BKa3Ozw7Dj1o13ukGq21a7JfsXtkrEcScAV0UN40wvMFfqm4jDCHlEnoNd4wPpBaHnFaJ2Ws4gIC3munzwbKYDNbozhI01GorI7IQ2De5BQ4c8jj6p7LRXwsrBnSgxjA4DopSpGib5SZS4U13pNOlnf0auIImD13kX5ekqZ7DW8jpPwHFhxvy3MXqN5t1aLFcBBekiU0h/4C1CmPK4HiItdVu44S3dh/kbgmwp2DEn8Ixn5DgZbg== Received: from BL1PR13CA0263.namprd13.prod.outlook.com (2603:10b6:208:2ba::28) by BL4PR12MB9505.namprd12.prod.outlook.com (2603:10b6:208:591::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.22; Tue, 3 Mar 2026 06:59:04 +0000 Received: from BN2PEPF000044A5.namprd04.prod.outlook.com (2603:10b6:208:2ba:cafe::ed) by BL1PR13CA0263.outlook.office365.com (2603:10b6:208:2ba::28) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.22 via Frontend Transport; Tue, 3 Mar 2026 06:58:58 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN2PEPF000044A5.mail.protection.outlook.com (10.167.243.104) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:59:04 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:51 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:45 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 5/9] PCI: tegra194: Enable hardware hot reset mode in Endpoint Date: Tue, 3 Mar 2026 12:27:54 +0530 Message-ID: <20260303065758.2364340-6-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A5:EE_|BL4PR12MB9505:EE_ X-MS-Office365-Filtering-Correlation-Id: 1d01a00b-90a2-4401-80c2-08de78f25bb5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013|7416014|921020; X-Microsoft-Antispam-Message-Info: HaS5xyvzqnw2klztCAowpTfeD/JgYrRcFEcXCp46oe6X+iP8SJ1OR3Ml13xO+/CFlUCF575zHk3hQVqw/dJlHXvDsMjHY+Z7an0qHN6Us1eTpjmyHVNgmuJnVqdHpy0anoC6fqVUMsMHGD/1drL7WjV4rHb2T7A1q1blKs/lwgxvy4CSApUGIv7wRIFJSCfZAA5LJiMeI4Yailiara/8TcuFRA702l14dKp3uRWKRmZ+NPBAQFy6G4jYTl7CSSSJwkl4+q6YBMM4vNwBJpntUzb6ThjPvDMImJKHnL4PnAsMu120SkmuDVzsS7XtvAA3uGY6RpDy+xFCWf7hWB3nHCrq+9jrY2DZWRGXuoOih/0GzABHFqatBFj9sp3Qw1e4ozDfaYNWjIBovoefqO1Z4GcguaswK5r5Z9y8KolCW9h5apCjCoC5VPi3uqD+OBQD52/GFSsZBAUONlch7T0G6d777QbUveTn+lRVjWZ52QBX0bSth6QEFxhB35vttJ5fpNXU7+y1LWmADbBkfJumL9d59WxMgKmoqpN5n0j0ELAfiaqPqMhxzCQobOhQRtq2bpRouFgOc226p65cdUJSvUZdfrJsfuT/vqMTqoLXPdrJG93qtlvIQfNJFLmP0KFjz5B6YT/Mw95FUj67gJLVmA5TUJ+O9MA08wwg4m9KAMW8cgcmQYwLI+aBfwTNcBiU6Vmu9YXVGMjlLguyPN5jNlUkVOx5saPkbKN8hHvg8CwdSNHlM8IVeTvAKJ2iIB0Ju2XbP4SMl4FzO+d/rg7gKQjMVkWKBjos+dl5PXWyPjc2K2fU7ZMSjgaWpDEWc4Tl5ZojGkpm3CHEDl4MmTwqSaLqfQECojEfr3uAnxK/OgM= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013)(7416014)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3XZ+GKlc75vF+ruhAD/OX+3EJCAHRBf/zRbP+uma3GNz1JUXUcQJdxeqBfr6GB0/FT6up5mnqeB35rwJ2G+R5l/WKs56ADG8P0DRF17xeDsqrapdrYfgxnrXZkOy3lOW/YbkH7ksM50hJGa+kC6lFPx4mh5TfJc+EdfB86hTjFTt1gGH+GaMDzo56lRu9VxqWMguO/lyixR0nwJR/gVIPg5Zv7bS2JveUZbzrILcivewTRNxtZkUwkzlbcR8VzhaFqgflt/w0NoMi1qnb+3+sRweBceJn4PrlS3Wgy5uXyvXzjdDP3IG07AgLaHBPfM9NcYO4zM/4I0bC9MWjvtzR77e3mRRZAv4jStJ6F+HHTiHOPvTFZjFRk6r9kz4+Zpp2UXPpIz2IK1modg4kqCw4phuJ4S4ZuPZd8SddqoOVTwvvlCD7TyAxoifuH7ISAhn X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:59:04.7208 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1d01a00b-90a2-4401-80c2-08de78f25bb5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL4PR12MB9505 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar When PCIe link goes down, hardware can retrain the link and try to link up. To enable this feature, program the APPL_CTRL register with hardware hot reset with immediate LTSSM enable mode. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V1 -> V7: None drivers/pci/controller/dwc/pcie-tegra194.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index 918e864b74a7..8f95910e99bc 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1772,6 +1772,8 @@ static void pex_ep_event_pex_rst_deassert(struct tegr= a_pcie_dw *pcie) val =3D appl_readl(pcie, APPL_CTRL); val |=3D APPL_CTRL_SYS_PRE_DET_STATE; val |=3D APPL_CTRL_HW_HOT_RST_EN; + val &=3D ~(APPL_CTRL_HW_HOT_RST_MODE_MASK << APPL_CTRL_HW_HOT_RST_MODE_SH= IFT); + val |=3D (APPL_CTRL_HW_HOT_RST_MODE_IMDT_RST_LTSSM_EN << APPL_CTRL_HW_HOT= _RST_MODE_SHIFT); appl_writel(pcie, val, APPL_CTRL); =20 val =3D appl_readl(pcie, APPL_CFG_MISC); --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from CO1PR03CU002.outbound.protection.outlook.com (mail-westus2azon11010026.outbound.protection.outlook.com [52.101.46.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D881A38642B; Tue, 3 Mar 2026 06:59:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.46.26 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521162; cv=fail; b=lf0vmTXc3kz0g02GNSXahU54Bgxb1cuiEnyHVU8LOTbqhX6O2eNMyxp3eYbrOhq9WRdwWlqCdl2TeWSlK6aC8ju1E3xFoF6RQ2LgHqHrId/vjCsOjqfBk6OPoBOn7OWBn/RKs67ujooCztbfLjoww/n8nuyBkt30YdCBac+2DzE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521162; c=relaxed/simple; bh=SNlv8mAHCUs4k3Vy7oEfwE2TAg16S0OEeTi0Duma7k8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=EgKjSuPhBJFyxMGp2qNNauqllSSU6f6ek7oI7GDhWH5bEM31cTB1iSFcvQbPWlNJf8I8Zx+Oq3FqCQ1SVxcw+aa7p2AjIE/X6hbeE++yEb+XfJ3xOukChXzOqIFEQhfun8NpUbiFV3q2fbT//R+wTV3I8e/nYws+10uAY6lnmT8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=U/wwgeNU; arc=fail smtp.client-ip=52.101.46.26 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="U/wwgeNU" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Oaey0jXXrZt1ZicdgsWZWcfqb8zJO4hJcGPKeXZqypGKBUpKucN5xjdstfaoxYz12/O7OwXhSTH/ZWfW9j3H1LItU2uBMxKmZ0AdtFXGC4RJ1eW3j1/gN4CqgoqEGwRNiv97qUOxVyKxb0VZrFL4d7nUxIRSo9pvICljNnuQGot9WCxDyakXDytXPAxYhulig9vgaRrJipqRgI57BdBbaAj/iQBPahIf9aNve6q3CAv+83jAkrUuNmmooapW1sjysx76JZ3yypmrpLVqJkopgjh3IjC4odD0sVXKV2N4It+CmRddS+KRpANzYn7dX7moT/v1uGoQUsxSukjP20lS8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=f9hd36+h8SW6jMvIEVc+ta2p8bFkLwOAZolDuZPv2k4=; b=qgycWy1gyp0KoYih7YUC5hozyCzRDIj7kMtDMzmlSf7zL45uC9n07CKx/1lJoUx9Po+YcKmQDVWJnPF1lzJahQ/bIdnb0xSBY7XjMulxcai9vH0jb6Z0RNt+LRQNZkRLbBFh36Sr1Zb0lq88iBpKRvT3gQze0+Nu6n+2VOwxXLRl4dKAavX2+nA4r1/AAjvlX7UPauwrppjwd43CyE3sTEBX+XqB3j63rtjcHd3ckiaptOTrhc10XbBt/a7FW9krkz4JrWvnqZ8zMlgygkb7GoSEEXNhREUGGzs/ZXSvWW6ErCrSGXA4/o+5KrU8NSgoGgUZTKWt9fqCLZpDiziswQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=f9hd36+h8SW6jMvIEVc+ta2p8bFkLwOAZolDuZPv2k4=; b=U/wwgeNUDdXq/7hpfdTwMJHd6RGkhSV4mA3SdV6N2uN4rtbuaG0BIn5EoeJroDa5HS0iGHDmAdkf669CEr531mFIfXExlI1Ep7vAI7Yf6uus4CdbJBpfuunZ4TExeVt1skTaXFQ9EwCH9XWZ+aIWxoLZFI8+GLUEONk19XgaqAhWi4WymTiFvzk8eKYGm7DyTI/X56eBUoNgSBBRMW+RW5l3oLrWX7w1usfK49BSpNu5ubrLTILtutFrMxmi5drUnLE2KloDCd5/+eRuAvH+YMtQcJimTYtPf6Qm2gSytrfTSak6PFC7M+hS1efrRpo7rZNPml77uFs+BJsIG+dQ+Q== Received: from BL1PR13CA0265.namprd13.prod.outlook.com (2603:10b6:208:2ba::30) by DM4PR12MB5746.namprd12.prod.outlook.com (2603:10b6:8:5d::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.20; Tue, 3 Mar 2026 06:59:11 +0000 Received: from BN2PEPF000044A5.namprd04.prod.outlook.com (2603:10b6:208:2ba:cafe::b1) by BL1PR13CA0265.outlook.office365.com (2603:10b6:208:2ba::30) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.22 via Frontend Transport; Tue, 3 Mar 2026 06:59:05 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN2PEPF000044A5.mail.protection.outlook.com (10.167.243.104) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:59:10 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:58 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:51 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 6/9] PCI: tegra194: Disable L1.2 capability of Tegra234 EP Date: Tue, 3 Mar 2026 12:27:55 +0530 Message-ID: <20260303065758.2364340-7-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A5:EE_|DM4PR12MB5746:EE_ X-MS-Office365-Filtering-Correlation-Id: ee6cfde1-dfcf-4f08-ad77-08de78f25f35 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|7416014|376014|921020; X-Microsoft-Antispam-Message-Info: 3ILQsehwLxs+04xNSq10rmjdUoKaLSAJZVLHiPSGO+jTC8BCO3D91tXbZgBHtA2AuWR13CHapTwvaeip2Gp05sjSSPbFr/rjyd/7KBz6cuaVg+m5xgt41zCdnySKStGkQLAA5KfazP2K6w2gKPIDRl/Ww8+QCaL/7QG9V17YxTjet1IctH3UsC2NM8xFSelGmBv+wG0JmWeFTlNfTMRk9vL1m4ya1wOR1lm1ILqQVfOx0nyOk5JJA0QiTxoGOj7ySO/plyTDWtlikvL8WY8aLDHP7V+uP8rbfL/I2yUYOsNjAPEMXgsefxyWlXJAjlPCZ0EEolMTgwPKsa+9BxtF9/OLmrR97YeX5GCWjJpLMqJX8Zwf4B23/XM1uu8IPV1J2PQ3Y1V5kD6yy2NXomz8TpHCHDzFyLPEQuKFxFzqwiPjZ55Vey8xOWLeHpaUU1pFUL4fl1yaubpyxeLGryB9ISsLYYvNkltmaxhcF2Qoxpxs8IEngpmo8Fx/Jnb5IqbhmY3CrAnECQ/BhUAkX7+qtaNVkIIE7cKzHk8lryvXotw3nuNyJ6PA+PaltdapWM/ikXzfBCn1pQ3BzdOjUKPq/dooZy26V9ED9Yc7kUaiBqFt1biFkitSeyesh2GZXW5AE4ZsoZZOUjrt/XPKJxJUZMad7cLn4jccwIpQQK+k/0U+r2PkV0939BUGspLFgVYYOYb0uuoIVBD5pGNhM/T0Gs80hgetzdoyh6MnWV6wKYUpQgE6nglcIEIgP84he23+hhdrBZpvQJvnHOIoONyEXqYj61vnCqpOLT/kN7jG297daNGGWxLAyxF2lkeWqqt7PdmEVUwySGTuP5a9tUNGaIvkf/0dkskhkHaWabn1WpI= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(7416014)(376014)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: FVJu5/MSXm++WvK/gm3FRWZ+KBE98n6qtPVgoowUnu91Yf933EYk5uKofrk1JddklCclNgFsyc/IBMTuXqkMgSx9+ia2EgsK6XlNZ+HuCAfFoXePGh323SalqFZefVvMerARkZLOtwM6fN6lgKCX74GxaePZTu6XUDWUVNsnQ+z3AmRXb0mIEbIFOnX9Djsf3nJ40PyWZkHzBSmmwWmGtCXoG5E/xHAd71n1HordaThGJ2C8HVDSalLItnvsY05TmCoMwKGkSMCNxkP1v1NeP7ZFC+e0dZ33VnmiAIs8T6xN6m2U5QYxErDb2pMFln6HVTLhuH64vNik4ibkiE2jwUdZNigEkPzaPQjiJSZjxX0Vnqdycv5ZrX/WqtVC565ykKmjabXHk9GXx1TGERu6bYeY1yzCQMIIf6Wcb7dw3l/x+ujqS4MQGSgHgpE6hMfV X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:59:10.6121 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ee6cfde1-dfcf-4f08-ad77-08de78f25f35 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5746 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar When Tegra234 is operating in the Endpoint mode with L1.2 enabled, PCIe link goes down during L1.2 exit. This is because Tegra234 is powering up UPHY PLL immediately without making sure that the REFCLK is stable. This is causing UPHY PLL to not lock to the correct frequency and leading to link going down. There is no hardware fix for this, hence do not advertise the L1.2 capability in the Endpoint mode. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V1 -> V7: None drivers/pci/controller/dwc/pcie-tegra194.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index 8f95910e99bc..070eb7f4058d 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -236,6 +236,7 @@ struct tegra_pcie_dw_of_data { bool has_sbr_reset_fix; bool has_l1ss_exit_fix; bool has_ltr_req_fix; + bool disable_l1_2; u32 cdm_chk_int_en_bit; u32 gen4_preset_vec; u8 n_fts[2]; @@ -688,6 +689,22 @@ static void init_host_aspm(struct tegra_pcie_dw *pcie) if (pcie->supports_clkreq) pci->l1ss_support =3D true; =20 + /* + * Disable L1.2 capability advertisement for Tegra234 Endpoint mode. + * Tegra234 has a hardware bug where during L1.2 exit, the UPHY PLL is + * powered up immediately without waiting for REFCLK to stabilize. This + * causes the PLL to fail to lock to the correct frequency, resulting in + * PCIe link loss. Since there is no hardware fix available, we prevent + * the Endpoint from advertising L1.2 support by clearing the L1.2 bits + * in the L1 PM Substates Capabilities register. This ensures the host + * will not attempt to enter L1.2 state with this Endpoint. + */ + if (pcie->of_data->disable_l1_2 && pcie->of_data->mode =3D=3D DW_PCIE_EP_= TYPE) { + val =3D dw_pcie_readl_dbi(pci, l1ss + PCI_L1SS_CAP); + val &=3D ~(PCI_L1SS_CAP_PCIPM_L1_2 | PCI_L1SS_CAP_ASPM_L1_2); + dw_pcie_writel_dbi(pci, l1ss + PCI_L1SS_CAP, val); + } + /* Program L0s and L1 entrance latencies */ val =3D dw_pcie_readl_dbi(pci, PCIE_PORT_AFR); val &=3D ~PORT_AFR_L0S_ENTRANCE_LAT_MASK; @@ -2465,6 +2482,7 @@ static const struct tegra_pcie_dw_of_data tegra234_pc= ie_dw_ep_of_data =3D { .mode =3D DW_PCIE_EP_TYPE, .has_l1ss_exit_fix =3D true, .has_ltr_req_fix =3D true, + .disable_l1_2 =3D true, .cdm_chk_int_en_bit =3D BIT(18), /* Gen4 - 6, 8 and 9 presets enabled */ .gen4_preset_vec =3D 0x340, --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from PH8PR06CU001.outbound.protection.outlook.com (mail-westus3azon11012008.outbound.protection.outlook.com [40.107.209.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D34B385527; Tue, 3 Mar 2026 06:59:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.209.8 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521164; cv=fail; b=GRnBDpMWaYRm3cTsJ4MElHdDjIcCtAEZXRds6C8OScTDS/8AvnswmoOt1OsKTKQwvas3mTh9g6LFwMuKCsRCUIwCWC2kH3ZmRBBr1CY+3+4nGjecLou1YFxOay8K9HeB5+WIbDOZMX2E/2owjBj8eSSA5N2r26zDYbVh5i7mhE8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521164; c=relaxed/simple; bh=S7WaZGduV7P+kczSjwbWIX7+zsxqU57afk3kopK9N9Q=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=os/A9EhhXXs6KClwZ3Mn6lRX9aCMNe+mzvpLlznURNSY21n8XKCakBDH4/3cAu3lfey95VFLI7RMdoR2eDyOlzH/lkaY+Pk6rOmho0lHFb3ECCHczg9m5Q4VopiXzvZQ1FPDRBICCgPcAnWXRaN2YpKlkySSTr29wCaVUQAm6L0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=lStcXut6; arc=fail smtp.client-ip=40.107.209.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="lStcXut6" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=AfsJCZ0lHdL2DuAeE195+PewVObwVYLNrJqbSgNwMGCoxmTD8cnME83vYhniBN/nusjoDEg6COsTz4H1Re2zHMuCcvRmBKyyshTdj3q/FeMt12JrGZoW80XKlNkFut7qu7bumQ+2DvnCqeb6WuUBJiOMCTmykYk5CXk53cJ8rnx8Fm/KmJnLl0FRqtgo3v2Wg13HnY+sr+HcU/1e9ZgdeuHbvp3n/edcWAdUK6216Lt7FyJFBq+oFpzBX9yQe1kOkWPCmhg5i7fRf0tTWfXwjZvZ6+ynolUQoA4p3q7L1FBDPDTuyvTGUHgWJfnJwN64eFpLt+rajupGYEozpf8JBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Bzs4cKO7587USXRl96Tbb6GOlTiKS7V0nHXJyZxCh1Q=; b=NhbySaxBwZ6tcwRX0BVDcYNfyiQk2YvBg6PTedgPKJR9lewGyt6pL9WpW7s3/KE7jqSx/ln+WMcxcnl5SNaLApEJk2QUS11mY30e3thxGO8ndlPyBQwFRomAgw7ITVMPJS8b+cTdADBFv+IpRASMsVAaYdtDFwfDxB9rS43HJTP1WSe1My+jdoFvLX3p59Lcywg56g/uaFqxAY/wH0FcgLSVpQFXN6mg/4jZgdq9aPjIWxAFr0+Znei0iekkB70miQ2Utwp7CgMszQlsC/sWRoU+WjEwdXCJWpMkC324PzowkMwZRmD8Q9U/wPBzvmbGi8nFYYUd5rPfRrJDTRqOyQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Bzs4cKO7587USXRl96Tbb6GOlTiKS7V0nHXJyZxCh1Q=; b=lStcXut6FJ9iFhBDY9JC4wO29rB85sVFrw9G0q4jDUfKdo117KaaW5lmXofyCHzd/35+rRSI01sSL9zVHXa0eGp7m7LGjtc9ZjVXlUKCMSk/Rh3ysa/CaZ1Q8OqGnwnoa8x3wcJQ/9L1nkjyWolerv7RNNTBI41eyoFxtxju0jsVDTC/LxO4QaLrjlH9seDZcJTk5wlyJNf1CETozCfHHS5mm9LuBX0KwBqR9OHdNbjwIPwccmTmhPH7y+xPAhw9ujyvJrJHHiWuvRZSjuELUcHl/md1YcHibhnuy+N2z1c4doTH9OLXIWg4f4RM20rS7CPFuY1Xb7d/+rqczc1HxQ== Received: from BN0PR03CA0028.namprd03.prod.outlook.com (2603:10b6:408:e6::33) by DS2PR12MB9709.namprd12.prod.outlook.com (2603:10b6:8:276::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16; Tue, 3 Mar 2026 06:59:17 +0000 Received: from BN2PEPF000044AB.namprd04.prod.outlook.com (2603:10b6:408:e6:cafe::a9) by BN0PR03CA0028.outlook.office365.com (2603:10b6:408:e6::33) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.21 via Frontend Transport; Tue, 3 Mar 2026 06:59:02 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN2PEPF000044AB.mail.protection.outlook.com (10.167.243.106) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:59:17 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:59:04 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:58:58 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 7/9] dt-bindings: PCI: tegra194: Add monitor clock support Date: Tue, 3 Mar 2026 12:27:56 +0530 Message-ID: <20260303065758.2364340-8-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044AB:EE_|DS2PR12MB9709:EE_ X-MS-Office365-Filtering-Correlation-Id: 7777f7e6-8f47-4a44-cece-08de78f2636e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|7416014|376014|82310400026|921020; X-Microsoft-Antispam-Message-Info: hHOjXvVYiTcsMj8Wsq8308Y0vrD26YuC8XC4yb30mtMJWTcm9J75Trw8nqJDy230U/uXa4Fxu0M7t854DoZiVQlKm1wcP5mtSQedI3ZLh78j2jLZ7GuWUJMN+3pDMaBlovS8UCGJpelh7BhUzW3ZLHhWdtQWEp0kscuShK+CGpjrvWWem6Gtpd5kHpbLnKkCEtbPY/QM/nqkHrcVdNAsK+CjhKeK8Umb/ou5byKRv6R8ua0FfLaMDAoJlrOwDDwLf4wy8Wo4o66KfZvklHMWcrsPa4R17/fHQqoqGXllH8GuFUW3gHwTM60h1zMIjZcjqO9ZUR0y5p0PfGf1DfFAsbNuqUViuqmg0D6otz9K7fr3r7IOfktc7RvDxbXp4NZnKuiU0JC0XEXvxJWmMkXv4vv0jMPZFCChzm9W4G/9qZzte4WrVPbAdonP34Q/JVutK/63n1BGz8fsMUAXq1iz5tt66IW+PPmrhvTit7iK+gbEaqKfaSUV0TfVCNC0liMtAOCn0Q/CgE7YUZGjm/RJ5tLNNdIiDWvX+ZfaRpqSyimWi7A0EcT0TgZF0JEqiPILZCXNsgVuHlys3WMlguVu9qsyAAH06OKQ1CccrPVA3XPU2Dok3US+HOx6zXoXUPnaHnXKP0eQhW1u//z4PUW+W9Ek9l1+/2JK7meJLmVi7VoUGBgKod9ML3KVuREh8jd7T/169oylRyLwofT5iLbR1PZvdZOxWLg8zyXtFhMhixr8vf3q3XgSxA+ZwwF+tSQsQBPNSNhcBiC1A4yA9Qx+CsokhNCSOilwcdvE8Jjr09rQfe9bYbYlQaPEQdq9w/ezp4556mFWb9WXsPm+Wej8V7falVMkCZQEID0RNNfeLCM= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(7416014)(376014)(82310400026)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: L3NCFqBOgnAvWk32CQnb+GQbNHBwMovZu2TYuN8c/RxqJ8V+0yA6C16XtLb5T7JoLxLr9TLWTjSEPMGSBxXg+02DVimAnOTWJxYmcGxfZUFgA8Hl+A522EpUXL/xP2nR7JFGKmPvEe0TTVE15LRxSAzLOBYs8ymxTgq6EOqVRDAxG6+DaI6b4FLvk6LV+o4263y5Tgtve0rRvb4hKXPJ4d+qNzFMtkzGNjYBlyXirp1+qQjzQwpfH9CZf5f3wiXxfKnGPzaoWB0PsuD14x8zjwV0LDi1+Qm0ZYXI2lRY3vD8nWTXbA3rFBwm4/DLLcq1SEHPzTb9B9ze4DoDBoIdPoWBmd3beTAqGHDKZ7OK3MUbsDlOgqyKLHOCzi5tLyfsuFg1PXs024bGGIZRww6cRg/3I+ct3m6THzbIghZVuVWd+2cL7rQ0yqdIgBb7Yo7V X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:59:17.6929 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7777f7e6-8f47-4a44-cece-08de78f2636e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044AB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS2PR12MB9709 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar Tegra supports PCIe core clock monitoring for any rate changes that may be happening because of the link speed changes. This is useful in tracking any changes in the core clock that are not initiated by the software. Reviewed-by: Rob Herring (Arm) Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V5 -> V7: None Changes V4 -> V5: Fixed clock description per review comment Changes V1 -> V4: None .../devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml | 6 +++++- .../devicetree/bindings/pci/nvidia,tegra194-pcie.yaml | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.= yaml b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml index 6d6052a2748f..7805757f2e2d 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml @@ -55,12 +55,16 @@ properties: - const: intr =20 clocks: + minItems: 1 items: - - description: module clock + - description: core clock + - description: monitor clock =20 clock-names: + minItems: 1 items: - const: core + - const: core_m =20 resets: items: diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yam= l b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml index fe81d52c7277..41041ae7e0a4 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml @@ -58,12 +58,16 @@ properties: - const: msi =20 clocks: + minItems: 1 items: - - description: module clock + - description: core clock + - description: monitor clock =20 clock-names: + minItems: 1 items: - const: core + - const: core_m =20 resets: items: --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010008.outbound.protection.outlook.com [52.101.56.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4DE338642B; Tue, 3 Mar 2026 06:59:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.56.8 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521171; cv=fail; b=K8hLMrl7+SNgo2fgWtZ3kLcGo2LdmxR+/rBxd8PUlL/Wq1aUYyu28LNOWVpOS//dR4whWgfjhlmxVKjc2XE+inXXWChYtKDj+4s6L0TRfOzJPikXxjOOGunuaEA3DwdIv3hr9CQ9KO0UGra81YXfImXepGsU/aW2izFI6jHXzGk= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521171; c=relaxed/simple; bh=pEyorpLmYf7tsrW2Fna22BvQFYUITcu100C8vspDSl0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=piqWBEFQL/MyFkdA+96qfFEm/m7IDvdEp59RaPfqvCkPRreS71ZwOc/Vi1CW86W4QJDPmUHxX1mB/ipZfZiBVOo+uGZfmoU9mVs4kmvjDGqVN1oQL3+a8+LxxMaPINEFfMWfWhiLusgZ/4qd7+MJsxvhAQ3Uht1e4Rd73x+R6x8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=F8bqmGTL; arc=fail smtp.client-ip=52.101.56.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="F8bqmGTL" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=eSfLBjbAeZegP2cV+d3NIcEzCpw7PPZtpATBX68Fk5fwmOSkEdIL+GAId0gtK8wdUyawvGI9WkjGqxEYgsFxOkdCWxcYmJ3eyfHHaUHbbdNG91u49U076DicT3Ju5BhTKVFrNS2dVZL5vRuqTku9rW1Carb+QzCJVAlblnkriA0ppZ8zsmMhNq/DJT8hUJ7+JC0kbuBP+7VbHwuVVmZk/6HJamzPwBmAwkvOADRzCTHZ8DuUAnmb0DUytHmygCNLfHojDx1xbQ9C6SLuAW0bgo3tlzIjg/uZZkxXvECaEKgv+13cSVQ1RDsY05whKps8hoFbCebIJlcojqVK9aJ8nA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=eCuoRIa9Ihvm3Yo2czsk+Iz6xsJsNcksLxEQ3XztjvM=; b=OUeCahvFgQ3+sb4v7wUCT+wSbWynSbOa0c6z6GbvYy0OT506n82InR/c90tTjeM17LrlskPb88AAbVztbmRiCs4sZlMFiQCPiZk7LW1NxkHY48UEibaOaonrAFAauyY8iNXCa9E62QykygkgFCneJEtZ9xAFobZz8w7QC2ojyEkovQa47DcklrwUAFYY7G4mq4PeXpQcS6XDM/SL2Zxu2xLhYpu5icZr8Bzfs12zDxtoRcKbUmBwRjXtgK7yfivTnhS1SS0OzyjcKkKhenWIkSmPgUMCIQq50OPDoelIl3ernJsihD8BfiLo5ETWNeBgUn3f3Q4XdAP3qC9duhB0ZA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=eCuoRIa9Ihvm3Yo2czsk+Iz6xsJsNcksLxEQ3XztjvM=; b=F8bqmGTLO2zM6cmgYQU3dyEC2M64ssw/PNlFV46MGiEZrw4IgjQ4Ytm5hsKQ6aVigOZVUep6Se/+/s/stcuRCoCyqhuaY6cIin1KgzzVl67c1PF5lh4+4/mbRvLRpwH36hxvtBXwTbmx3cnr0s2ysxgm39ooUBNxcPXdqm6o0bu57UObf+GC/Lgk5XsqdX8Z+U+5Bzw5Bf+HycxfCmHatZckmwqV0nAVAv7/vxIGQPDXED1S8Jgh/kOUBqupNzkmV73UiqQ+7ghfTmkK6wAgV36SQQ6pxziNctqsf/DzFyd1jHkLI0yu/2mDyxDG67AzhRvnh7xjdtcsTXuEkSZ6dg== Received: from BN9PR03CA0394.namprd03.prod.outlook.com (2603:10b6:408:111::9) by IA0PR12MB7529.namprd12.prod.outlook.com (2603:10b6:208:431::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.22; Tue, 3 Mar 2026 06:59:25 +0000 Received: from BN2PEPF00004FBF.namprd04.prod.outlook.com (2603:10b6:408:111:cafe::77) by BN9PR03CA0394.outlook.office365.com (2603:10b6:408:111::9) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.21 via Frontend Transport; Tue, 3 Mar 2026 06:59:22 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by BN2PEPF00004FBF.mail.protection.outlook.com (10.167.243.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:59:25 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:59:10 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:59:04 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 8/9] PCI: tegra194: Add core monitor clock support Date: Tue, 3 Mar 2026 12:27:57 +0530 Message-ID: <20260303065758.2364340-9-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBF:EE_|IA0PR12MB7529:EE_ X-MS-Office365-Filtering-Correlation-Id: 7006a7c4-eae9-48d8-7fcd-08de78f267d9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: k2eOMzgT+p/7w5Q7jp2c9VenMM6VJP72D61RyFldy5rEs4Go4Y7J3KlV3fDXygAyhXngIaO0LF6IBqE7ImYKjcHMB7kzHlaQ8oi6c5pX6eH295KmuM6SCuT+o3eJsMTBp67aYiaa1+ZGdxhWiw/TTyJaIK6oxjPIwgobyo54DGaJIPgNYCfeACExLaarRGkm2tKFSTj3zxhossz1B9nGwouFL5qdmZ2ItFFvKZwNv+CcqV4w5Yr5CJ2pF0w4/Hbtg0OXTcpJT4sIjLU8QU5/LGuiWmgL0u3l/QL3IeIvcbuG2zNlCmKJiD6ggMhNttFt2wddRRok7LgNo+teYHIgsuOhuwIyFTktR7zDJBP/4ROXkgR+zSo3z0YDYrFPfPlQBojY5cBin4DAvqC7kGEC+z8oq7oOGmRusZi+WC9NF38wuzz8UL5YmUbh4H3bY4wOFPV9wL8xmUUstC7eYO7zMYxDGN8dxPznOVTvlk+vZSJMbYVQ54bm4i+T0GmE2nK+148JE0MRKyWOI161Ifg2pwRE7yXXD2AfV8vQaI623dl5p+Cb3cil9b1dHLWvVdL6vlz0+RAjctG6CfgXB9aTC+o6655n9Pb7MWplz1b2CMvK/Yb57kiaGp6AK2vyip5Gu5yE+9uPEqBleng2fwRRL0GiHQxp5THtbaBk43ThEZMlausCEngOd0GTunqC1bWwE2ZiiPGz4eT4D+SgMYR/Zj99aJMQ2TWyOkvrfwTaLV0JDFm1RWgL8g6VvHDh2129gxkxopVE8cEMng7KwmNElxi07cYI2UYxe6A9v1S/NGdHVLASLL/NNiqHyFDrhd1fAOAQ0fI6AX7LhutlhViK+D6PpwZxnrS/oRfrxiFy2sw= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: jmnZ5mFcSPy5Mask6rlKr9prhZwR2Tt//rzHEupUEFk2TP4lHqaiFt9bJUsQtxVyyhVITQ2HWHjusFi58LBYzExa6Sg134HS6GvO/jNktVF36+CT4przMXz1XC613irSmV3vBS7VmoRpjWfblpgbFk+2KeeKRUvFakYatgDmEjzsjveMOOR3wzIjgUANTyZ42evz3g/ZhZy4TwG2iyRoDMlZlNCVizos4qzYigKFqFeCdJfJbeBPv/1eaEWluTzs+S6NrADfZACA5K5IcrlkL3I5QuSqj2MADhUU2x24XquP7uK793hIE0rBMGlTZvoQnXREnkeHdUJuUH+UXIvYN6sCH22ncETSm4hyHLB9BPhEyRPMaye+QvMxepEj3rfwKKUB/wou/iePA9fgyjdRcUA0dT8CAXjcqRw7NMGq4w5GV1pXzEnOR9hp5Pb2MAcd X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:59:25.0981 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7006a7c4-eae9-48d8-7fcd-08de78f267d9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7529 Content-Type: text/plain; charset="utf-8" From: Vidya Sagar Tegra supports PCIe core clock monitoring for any rate changes that may be happening because of the link speed changes. This is useful in tracking any changes in the core clock that are not initiated by the software. This patch adds support to parse the monitor clock info from device-tree and enable it if present. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V1 -> V7: None drivers/pci/controller/dwc/pcie-tegra194.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index 070eb7f4058d..e0455d322166 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -249,6 +249,7 @@ struct tegra_pcie_dw { struct resource *atu_dma_res; void __iomem *appl_base; struct clk *core_clk; + struct clk *core_clk_m; struct reset_control *core_apb_rst; struct reset_control *core_rst; struct dw_pcie pci; @@ -945,6 +946,8 @@ static int tegra_pcie_dw_host_init(struct dw_pcie_rp *p= p) } =20 clk_set_rate(pcie->core_clk, GEN4_CORE_CLK_FREQ); + if (clk_prepare_enable(pcie->core_clk_m)) + dev_err(pci->dev, "Failed to enable core monitor clock\n"); =20 return 0; } @@ -1017,6 +1020,12 @@ static int tegra_pcie_dw_start_link(struct dw_pcie *= pci) val &=3D ~PCI_DLF_EXCHANGE_ENABLE; dw_pcie_writel_dbi(pci, offset + PCI_DLF_CAP, val); =20 + /* + * core_clk_m is enabled as part of host_init callback in + * dw_pcie_host_init(). Disable the clock since below + * tegra_pcie_dw_host_init() will enable it again. + */ + clk_disable_unprepare(pcie->core_clk_m); tegra_pcie_dw_host_init(pp); dw_pcie_setup_rc(pp); =20 @@ -1610,6 +1619,7 @@ static void tegra_pcie_dw_pme_turnoff(struct tegra_pc= ie_dw *pcie) =20 static void tegra_pcie_deinit_controller(struct tegra_pcie_dw *pcie) { + clk_disable_unprepare(pcie->core_clk_m); dw_pcie_host_deinit(&pcie->pci.pp); tegra_pcie_dw_pme_turnoff(pcie); tegra_pcie_unconfig_controller(pcie); @@ -2161,6 +2171,13 @@ static int tegra_pcie_dw_probe(struct platform_devic= e *pdev) return PTR_ERR(pcie->core_clk); } =20 + pcie->core_clk_m =3D devm_clk_get_optional(dev, "core_m"); + if (IS_ERR(pcie->core_clk_m)) { + dev_err(dev, "Failed to get monitor clock: %ld\n", + PTR_ERR(pcie->core_clk_m)); + return PTR_ERR(pcie->core_clk_m); + } + pcie->appl_res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "appl"); if (!pcie->appl_res) { @@ -2357,6 +2374,7 @@ static int tegra_pcie_dw_suspend_noirq(struct device = *dev) if (!pcie->link_state) return 0; =20 + clk_disable_unprepare(pcie->core_clk_m); tegra_pcie_dw_pme_turnoff(pcie); tegra_pcie_unconfig_controller(pcie); =20 --=20 2.34.1 From nobody Thu Apr 16 03:40:01 2026 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010040.outbound.protection.outlook.com [52.101.56.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBC23386454; Tue, 3 Mar 2026 06:59:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.56.40 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521176; cv=fail; b=f5oU4/Vi9sz22joJbBF+8kRo1uavPbkLg42psprkEAIJ4VwS/ws9QVguvSgHCXWxYbe5Wcagk4pTeSALgcpxJ9p8PDfhjKfPqzpXsyq0GuopWFDiBIy54nzn2k0esntYJKHtpeLbowGQLJPOc01Usu3FeJKCZUiUIlo5ZxCXVkA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772521176; c=relaxed/simple; bh=n3jy5M4+d+yP0t2szvck0CM2DVZHxPnwy6Oc8o170uI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=W6zXFdpIvlcs2UkvuDBh1FfDswaVZ3wYxINjaTMAXekwkppIoytPT+PYBkFzbWIOMcNiqQj4tWMnBQMYzB4ke3mrOInIJZcdZqrB/5SNj+/w42BlOcwXXVyueEK4+CCWFMr1SBZFCNPP9zki+uzmOjYAsrQ13PygTL61M0Hh3RI= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=DLYdFGhj; arc=fail smtp.client-ip=52.101.56.40 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="DLYdFGhj" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ayHBggv8OyALTE1p+EutraAM08vlUWvjYjGESvQ71I1nlRW3R7ue9q+UbnlcUQCd0T/Qpw7YvZqj//M18OV04hDx07yJXULjskvbUUyYwLOuYfGIYdYEGoUGWfmTRGeBfJC+0ZqwRvjqKuN57a56Sw/mDQGAzXXZ1Pu/me+qV3LLPOnTj9CUWxaoyWy6C8yTJTigbdFd8WL49Y6tQcwmCv0OqvjWGUD2sW1G0S37XM86LYk3+O8iimIY9QzbW8p7kHzjsa2zrxdEVRphlgH8IGF3WX0E/dYqm7ItuPIaeXFgyglrmfLphSRr3IOmRkSkkGuVv3UlGWLu5ikTwQpE9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=SDY1vn0btLLmdi0aRcWyIGrBd8EDrsyFd5gwgnU7xpM=; b=sFV89yxllse1W+PcoCvbIYYhQS2x7rCLdoq9OGGyL4pN+XugBX7KW8AtGgrdPvW27JDJy8/u3sGmhtMFJ/ryWAprOUGsNBUf5mvFhURglYx45LQPpjtAnTuQlAsyyMa7TdjwIzaU3pdrE+bNtwX50HNe5L5xYL0HApIdEuOY6ofpZfTyy1HZIG4zGO/EHgn8U+Xe+yDLYnbEGlps+sI/lqOf2f5eJLDbE8mopz4wwPYUDRM/+PjD4xr5dglSg7667i4r+y1tzLUT8taSJfpfP51ZlhGPKwfLS4UpjScucy2eSsCyQORxfAd68m2V/xrj6RjJMBLrbW5zyD3WKOSMug== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=google.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SDY1vn0btLLmdi0aRcWyIGrBd8EDrsyFd5gwgnU7xpM=; b=DLYdFGhjFy8petCe0kh03OlaQ000NsjynEDEX441ele1TkagY6JEnmcuCXbuzUZhj3axmumxC76x0Gga2yLhekoaw1/n2jzC1+S0Ri80jFvGoCOUl5Wd/B3X1c4+7o8tT537Sgp6qmyI4pYxknvbAQuizdJIoBQVSHMSHrnQf03EDuQ69j5huxlwMekITdpmhGON0wslGxf4DYvOlPRBcii63B9m0NLGrCLeKFeE0Fu+I+Wf036Sh0n6aDNj0mt5YgwbcAdmaxJoHIAnDIyCK7c+9b4KxSOmtgZRaOu4Z5+I7qXKiuAHYehu0//2INI1YU9Gl/LAaBUtxSTg4zib7A== Received: from BN9PR03CA0440.namprd03.prod.outlook.com (2603:10b6:408:113::25) by SA0PR12MB7004.namprd12.prod.outlook.com (2603:10b6:806:2c0::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.22; Tue, 3 Mar 2026 06:59:30 +0000 Received: from BN2PEPF000044AA.namprd04.prod.outlook.com (2603:10b6:408:113:cafe::b6) by BN9PR03CA0440.outlook.office365.com (2603:10b6:408:113::25) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9654.21 via Frontend Transport; Tue, 3 Mar 2026 06:59:15 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by BN2PEPF000044AA.mail.protection.outlook.com (10.167.243.105) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9654.16 via Frontend Transport; Tue, 3 Mar 2026 06:59:30 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:59:17 -0800 Received: from mmaddireddy-ubuntu.nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Mon, 2 Mar 2026 22:59:10 -0800 From: Manikanta Maddireddy To: , , , , , , , , , , , , , , , , , , <18255117159@163.com> CC: , , , Manikanta Maddireddy Subject: [PATCH v7 9/9] PCI: tegra194: Add ASPM L1 entrance latency config Date: Tue, 3 Mar 2026 12:27:58 +0530 Message-ID: <20260303065758.2364340-10-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260303065758.2364340-1-mmaddireddy@nvidia.com> References: <20260303065758.2364340-1-mmaddireddy@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044AA:EE_|SA0PR12MB7004:EE_ X-MS-Office365-Filtering-Correlation-Id: f8779973-bda6-49fb-cf3a-08de78f26aff X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|7416014|82310400026|921020; X-Microsoft-Antispam-Message-Info: 0G5GujYFamNAIEvhtgmIfWl3btoNmm2kjWmXF3RmOTqRh5TDxM8CydTmo1tHZd7RS5WPwpQd9tD59SRnH5O0JCaaLnD1wK69uH7YKFSNMgnVG9gZ8EEi2i5q+ZLh1nptmDuPf885kdZzNFlvoFOQf0QnhQ/DFyETAEDPDUlXsSCx4VeWS2cL7LzFGrHxg+axZZkMsveZ+PEg5PzVI2laTVKxUn58shjlvv8vXeBO0q2FleIq5eDTBT8d6EhYiw+tnA4CosKtZq6aBGxstgdMh8LGS55ie9M/3tzPO63baLCrbEkTiXC7NqIcIGV7fzXVi8qUTPvSZ9uvrKZ723tdszYBD0jDvRlhmlvv+Kk8tB2FGgFT293lgs0Qza7cJUESn3I/PNzKFL0bMSIlQo+i3d9M1WnZtd4Wm1Fhrte+xXC+A6n6ocllWIIDZlZuJ7u9V06H7c4A36KNnttfJvWQIN7QQuOR7PTx0+CnHTS4+lTS9Cu5NZXW/Kv/dz4+jB+/PvC0NVgzaZ1bhHdO3J+GA1mAE3PstfBoTsLEuyje9cZktZrt1tWiiod6kB3EY1B5cl2PYUr/WPV0PCdhG9k0dHYfa1DYJEZzD/0Uag/ti8nw/4iMigI3ODZG+8dfHyIeA1VhLoItfH+RfvLanvWf/usFEAVg0zw/V+efrp43r9nG1EndGQSj0btgYvJxFEkzkQlVNe3jZbhPf5zuGGpty/fpo3uudo3nhQSA4FsMC/C2M7hXTtGIp+gFjO22TEm8NfTo4nRtZjr42tf2/Kj/57gz0VEAWgzOQ2hLuRR/g1f3HKiTX3zdgH8239mVgk/ik24m+rtauYgBmZm/vIQ0Z0Wxm2tIEr2iswuySek8rZ4= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(7416014)(82310400026)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: OxjlaLdfuPDjulyPwXit4tGGqJXNSHk320BwfJbIrhGnnHDlOm3N8UK8JkKtPoFnTmGRS8veYE/7FD1cNeWHx1IkcA2jVosulLGcxrpFKAcSb20ERCN89BVFAOnqjbG+dAeFTSm2HdmDS6RZg0dJERbX2DKl+uhuI2bgTh3lUqSTMLRsoebMoMSXg3159xuol2uqfiC34zCd05RwR8pUC5K84cLbpq6sDWh28Sp78XpAgcrRKyr2nMcnBQYeUyfM2lDh6cwOfZZIcjMBiq2nPpBkm14PU96PVX/JdSCZy5CPDdow6064pjeOVffKGK2Esie7Txb/HdsQWY5qvJ9n/cf7tLRr+4w9SIFAwr0X84TVyTiLW61TuKZP0u5uEaUo/2f6mgnx+oaJ0mqIDQ0zdjBqFKPxWcH6cr9rWZIVvIJKSCxlb3MXMVxkC6zn+a/i X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2026 06:59:30.3993 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f8779973-bda6-49fb-cf3a-08de78f26aff X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044AA.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB7004 Content-Type: text/plain; charset="utf-8" For Tegra234, the HW PHY team conducted experiments and determined the optimal ASPM L1 entrance latency values: 8 us for Root Port mode and 16 us for Endpoint mode. Update the default ASPM L1 entrance latency configuration accordingly. Reviewed-by: Jon Hunter Tested-by: Jon Hunter Reviewed-by: Vidya Sagar Signed-off-by: Manikanta Maddireddy --- Changes V1 -> V7: None drivers/pci/controller/dwc/pcie-tegra194.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/contr= oller/dwc/pcie-tegra194.c index e0455d322166..accb2f8d3de8 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -240,6 +240,8 @@ struct tegra_pcie_dw_of_data { u32 cdm_chk_int_en_bit; u32 gen4_preset_vec; u8 n_fts[2]; + /* L1 Latency entrance values(Rest/Prod) */ + u32 aspm_l1_enter_lat; }; =20 struct tegra_pcie_dw { @@ -710,6 +712,8 @@ static void init_host_aspm(struct tegra_pcie_dw *pcie) val =3D dw_pcie_readl_dbi(pci, PCIE_PORT_AFR); val &=3D ~PORT_AFR_L0S_ENTRANCE_LAT_MASK; val |=3D (pcie->aspm_l0s_enter_lat << PORT_AFR_L0S_ENTRANCE_LAT_SHIFT); + val &=3D ~PORT_AFR_L1_ENTRANCE_LAT_MASK; + val |=3D (pcie->of_data->aspm_l1_enter_lat << PORT_AFR_L1_ENTRANCE_LAT_SH= IFT); val |=3D PORT_AFR_ENTER_ASPM; dw_pcie_writel_dbi(pci, PCIE_PORT_AFR, val); } @@ -2472,6 +2476,7 @@ static const struct tegra_pcie_dw_of_data tegra194_pc= ie_dw_rc_of_data =3D { /* Gen4 - 5, 6, 8 and 9 presets enabled */ .gen4_preset_vec =3D 0x360, .n_fts =3D { 52, 52 }, + .aspm_l1_enter_lat =3D 3, }; =20 static const struct tegra_pcie_dw_of_data tegra194_pcie_dw_ep_of_data =3D { @@ -2481,6 +2486,7 @@ static const struct tegra_pcie_dw_of_data tegra194_pc= ie_dw_ep_of_data =3D { /* Gen4 - 5, 6, 8 and 9 presets enabled */ .gen4_preset_vec =3D 0x360, .n_fts =3D { 52, 52 }, + .aspm_l1_enter_lat =3D 3, }; =20 static const struct tegra_pcie_dw_of_data tegra234_pcie_dw_rc_of_data =3D { @@ -2493,6 +2499,7 @@ static const struct tegra_pcie_dw_of_data tegra234_pc= ie_dw_rc_of_data =3D { /* Gen4 - 6, 8 and 9 presets enabled */ .gen4_preset_vec =3D 0x340, .n_fts =3D { 52, 80 }, + .aspm_l1_enter_lat =3D 4, }; =20 static const struct tegra_pcie_dw_of_data tegra234_pcie_dw_ep_of_data =3D { @@ -2505,6 +2512,7 @@ static const struct tegra_pcie_dw_of_data tegra234_pc= ie_dw_ep_of_data =3D { /* Gen4 - 6, 8 and 9 presets enabled */ .gen4_preset_vec =3D 0x340, .n_fts =3D { 52, 80 }, + .aspm_l1_enter_lat =3D 5, }; =20 static const struct of_device_id tegra_pcie_dw_of_match[] =3D { --=20 2.34.1