From nobody Thu Apr 16 02:07:14 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 474CD39151C; Tue, 3 Mar 2026 10:06:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772532389; cv=none; b=DzlzAfNys6TGFLZaTpKLStUvIqKCED/U8APfhizjt2iKQRwYAZ2cpisijDrEiryv37lsdm2i8A5yu8ZjSIXJgwgH0r/8K65eXjQNvb1SwAtaYKL2xskZQ4mVsJwsvYQMPRiuItcod7i4KYz9BWUjBmPvVt1FpgjMbMvoh4vvaQE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772532389; c=relaxed/simple; bh=dmYhvJWltKPlnfSCZp2xF0fuBjC8r/ExyToKNbYqzIg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TnJkhQCrhmuaAVG+ztCyGC88cDkNlAwCnnKs05J9o/0LTujd/hBuZb9zqlCJQEb3t0xgwARYUv2vicoIqwm31P1CZAB8qtg/q584qW46HJe3ojwyPNyhbxh1X7Q7JbzU9t2M4ak0h6caMIuJ4sGQWo16VBISTAxNSb73rae79t8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GaCu4tr4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GaCu4tr4" Received: by smtp.kernel.org (Postfix) with ESMTPS id E4905C2BCB0; Tue, 3 Mar 2026 10:06:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772532388; bh=dmYhvJWltKPlnfSCZp2xF0fuBjC8r/ExyToKNbYqzIg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=GaCu4tr4gHStrYmUr3vpeilOFdpP/e11urbg7vsICcdResCJ312luR7rjX8JOHmND Ii8g2UbIZaXjLyWatOAqesMtCBmg++cCxfmBwlD+V7P4gYRA085bTnTocyvZk3ZBRY SeNZUDGz5cHOU6zyHqwH1MYj7QtSOy3kUChbpskXqHP4KAb0d7JfM2RrCqYDwCX6Ut sEjRdEALm44/2IHwMXcGoZkrvRs1gA5W3vmKFgd/xGnFeb/+lEyHsZY6x133QzyokK HfsufFlQv9ZjohU6KE2IAdWRkvdnJQoEsLtTcMfcSSfDEovQSoSCv311kR9RCv4wLA my5x/iv5e6OWw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF9ABEC0489; Tue, 3 Mar 2026 10:06:28 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Tue, 03 Mar 2026 10:06:25 +0000 Subject: [PATCH v3 1/2] dt-bindings: arm: amlogic: add A311Y3 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260303-a9-baisc-dts-v3-1-4bf21001f05c@amlogic.com> References: <20260303-a9-baisc-dts-v3-0-4bf21001f05c@amlogic.com> In-Reply-To: <20260303-a9-baisc-dts-v3-0-4bf21001f05c@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772532387; l=1053; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=SsR9Sz9BWoMX3UnJeit5aTZNxRC651zrkqb0PjHBQcE=; b=NFoRKmD3u6sSIm7NWn9KHotS0WxQi1TGq80Xn2VsUKbbuGLGd2AE0zC3w6hhi8VgBr20TiT53 c7tDv5UZdz9AX2li3cdUvptGm6qqwWQ86piLrNv2C6uGN6g5focMtpt X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add bindings for the Amlogic BY401 board, using A311Y3 Soc from Amlogic A9 family chip. Reviewed-by: Martin Blumenstingl Acked-by: Krzysztof Kozlowski Signed-off-by: Xianwei Zhao --- Documentation/devicetree/bindings/arm/amlogic.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documenta= tion/devicetree/bindings/arm/amlogic.yaml index a885278bc4e2..9f73a0054fb2 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -234,6 +234,12 @@ properties: - amlogic,av400 - const: amlogic,a5 =20 + - description: Boards with the Amlogic A9 A311Y3 SoC + items: + - enum: + - amlogic,by401 + - const: amlogic,a9 + - description: Boards with the Amlogic C3 C302X/C308L SoC items: - enum: --=20 2.52.0 From nobody Thu Apr 16 02:07:14 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 511F4391821; Tue, 3 Mar 2026 10:06:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772532389; cv=none; b=ryodNBJVHPM8eljqNKs+IaYmmXpuodHfFj1EiFElZWVkAExyH5lUhfPsq9zSTL+HNVx29UHiwJUoSw1ThuAmQbVdxr7g5FTVpwXkYPIC18GbSe7+uD7BaZ6MPsm6+/rS8HM3vemOn8t51N8NXOA+cwYjQ7xcbG0pvgwy5H4rgj4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772532389; c=relaxed/simple; bh=eO9gr/Eb4XIsWl7Ozofk85fAxnL6mM1g0zjcZLACG1E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u8gM6r6SPdQ34XgP0BVgDVTrr4ChtMThZPa3PZACye9DcXRNe25D3RfmziDwwe5jVJjJRoGg6ga3c2HSrFmxGXbXqmquFWPCHVmcq1bBiff9yGMuuzPNogI98QOIHNX0yvxHTnaRAbu5cZtiJfrfineAaCsPL3YWmuI4Pd0VK8Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QwvAnL8s; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QwvAnL8s" Received: by smtp.kernel.org (Postfix) with ESMTPS id 14F8AC2BCB2; Tue, 3 Mar 2026 10:06:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772532389; bh=eO9gr/Eb4XIsWl7Ozofk85fAxnL6mM1g0zjcZLACG1E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=QwvAnL8s3kUVS+Wkay3SZrBGweoFZp3/PWltmdmzr3P2yx+KYDH5vHkNUpFLOZGmN RfpyhKzW67qb+r0uHikBeRF2v+QsdIszX7XSGw4nUGTop1sOa8aDcTtv4V+WdUsEJF 3sqW2SIV4epMyUuQuwCgyYBZRnMoLJkyoe0VvS6d8gLF1BjkAjLRKuLYz8+BS2xWHt kZTnuUm5itoZseg7Wu4jI7llZwLAKGFalxiDgK4rAI1uzaKaaqPyl6MyaQNsHfSkl5 1xH+E9vi4cW9kmzyGxsljBYvqhtff2a8CIegC6M3kpmG4WGJNzZcUE+Issc0O6bBZS TvB6QzSky/JNg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 057C9EC048C; Tue, 3 Mar 2026 10:06:29 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Tue, 03 Mar 2026 10:06:26 +0000 Subject: [PATCH v3 2/2] arm64: dts: add support for A9 based Amlogic BY401 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260303-a9-baisc-dts-v3-2-4bf21001f05c@amlogic.com> References: <20260303-a9-baisc-dts-v3-0-4bf21001f05c@amlogic.com> In-Reply-To: <20260303-a9-baisc-dts-v3-0-4bf21001f05c@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772532387; l=5530; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=ngLHAW867mRhs8VNuDyRiFbWtUBMBRBgKcYsKwXWGTI=; b=kq1gPymBgUjE80ZPXYiIBeePFG1tvPtkAA8t84W83cJvSsI3hfikZCueSKu36A9ph/RI/kl2Y Q0Nz3CBc3xFDXQNXy5ghHTlta4obN0SEoYDW4603aJu4AW+BdkKtEKv X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add basic support for the A9 based Amlogic BY401 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Reviewed-by: Martin Blumenstingl Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../boot/dts/amlogic/amlogic-a9-a311y3-by401.dts | 40 +++++++ arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 128 +++++++++++++++++= ++++ 3 files changed, 169 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/aml= ogic/Makefile index 15f9c817e502..57bc440fa55c 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a4-a113l2-ba400.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a5-a113x2-av400.dtb +dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a9-a311y3-by401.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c302x-aw409.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c308l-aw419.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-s6-s905x5-bl209.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts b/arch= /arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts new file mode 100644 index 000000000000..a6b380ca47a5 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-a9.dtsi" +/ { + model =3D "Amlogic A311DY3 BY401 Development Board"; + compatible =3D "amlogic,by401", "amlogic,a9"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &uart_b; + }; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x0 0x0 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 35 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@5000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x05000000 0x0 0x2300000>; + no-map; + }; + }; +}; + +&uart_b { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a9.dtsi new file mode 100644 index 000000000000..d957c8ad1d86 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +#include +#include +#include + +/ { + interrupt-parent =3D <&gic>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x0>; + enable-method =3D "psci"; + }; + + cpu1: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x100>; + enable-method =3D "psci"; + }; + + cpu2: cpu@200 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x200>; + enable-method =3D "psci"; + }; + + cpu3: cpu@300 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x300>; + enable-method =3D "psci"; + }; + + cpu4: cpu@400 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x400>; + enable-method =3D "psci"; + }; + + cpu5: cpu@500 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x500>; + enable-method =3D "psci"; + }; + + cpu6: cpu@600 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x600>; + enable-method =3D "psci"; + }; + + cpu7: cpu@700 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x700>; + enable-method =3D "psci"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + }; + + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + }; + + xtal: xtal-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <24000000>; + clock-output-names =3D "xtal"; + #clock-cells =3D <0>; + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + gic: interrupt-controller@ff800000 { + compatible =3D "arm,gic-v3"; + #interrupt-cells =3D <3>; + #address-cells =3D <0>; + interrupt-controller; + reg =3D <0x0 0xff800000 0 0x1000>, + <0x0 0xff840000 0 0x8000>; + interrupts =3D ; + }; + + aobus: bus@ffa00000 { + compatible =3D "simple-bus"; + reg =3D <0x0 0xffa00000 0x0 0x100000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0xffa00000 0x0 0x100000>; + + uart_b: serial@1e000 { + compatible =3D "amlogic,a9-uart", + "amlogic,meson-s4-uart"; + reg =3D <0x0 0x1e000 0x0 0x18>; + interrupts =3D ; + clocks =3D <&xtal>, <&xtal>, <&xtal>; + clock-names =3D "xtal", "pclk", "baud"; + status =3D "disabled"; + }; + }; + }; +}; --=20 2.52.0