From nobody Tue Mar 3 05:27:02 2026 Received: from mail.hugovil.com (mail.hugovil.com [162.243.120.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0EF42379ECC; Mon, 2 Mar 2026 19:11:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=162.243.120.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772478687; cv=none; b=ADv/EKPFgXMqj0YlYlZZJ9VbrrXUigWyY2CEEnc4z5sr0aeQrqPlt95nwxOZe6A3QlHa0Pp6owXtrsKemxp90OoRwENzPgsdW/PS4Nl/lD35qJfrG7ch9kYPTFmGZ1YxiXY+aFNdG1jwESUYtob++lvtj7T8IfQtEz/8WTt4rUI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772478687; c=relaxed/simple; bh=MmIPxr6/HfB3NDzoicCmQyhvewGDjfMdY6unMOqSvdw=; h=From:To:Cc:Date:Message-ID:In-Reply-To:References:MIME-Version: Subject; b=PJwQ2m0cubnL6pLxu5SMtk5I3YQkuOng7IbSf5dWFKeucX6fAUbDOmdDctKU89/Il8/KNt63uWidqOxjkBdta+Pb9tTgVGdjI44t0Fs5CDiIPpl0oZ0+nGn+mN/UXfIdhcxNIpY05t79OiB8KooNwJgHzgBT2oKNyW42dlH9nCc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=hugovil.com; spf=pass smtp.mailfrom=hugovil.com; dkim=pass (1024-bit key) header.d=hugovil.com header.i=@hugovil.com header.b=ZmV7KRJo; arc=none smtp.client-ip=162.243.120.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=hugovil.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=hugovil.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=hugovil.com header.i=@hugovil.com header.b="ZmV7KRJo" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=hugovil.com ; s=x; h=Subject:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Cc:To :From:subject:date:message-id:reply-to; bh=HOoJmWe2h0lSbumvsX2QPmYQIgLBRq/iMywn4k+tB1U=; b=ZmV7KRJo6W3CvYoZXALdYF4wLM 4tFTyR97yGRLlGllCUOD2ZkYuM+0Kj/38MEtExcmgWC8lmF4CVY+Obnp9AM3YbPdlGJCHwmWXJlXr Bn/aKhlDaUHgrf5qzAcztQ5V9sBPGqoNHiRcFMf4tBe/RZ+cRYKILWdp+kMedq+EJgB8=; Received: from modemcable168.174-80-70.mc.videotron.ca ([70.80.174.168]:59962 helo=pettiford.lan) by mail.hugovil.com with esmtpa (Exim 4.92) (envelope-from ) id 1vx8fa-0007Wl-HB; Mon, 02 Mar 2026 14:11:07 -0500 From: Hugo Villeneuve To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, rfoss@kernel.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, shawnguo@kernel.org, laurent.pinchart+renesas@ideasonboard.com, antonin.godard@bootlin.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, hugo@hugovil.com, Hugo Villeneuve Date: Mon, 2 Mar 2026 14:03:50 -0500 Message-ID: <20260302190953.669325-15-hugo@hugovil.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260302190953.669325-1-hugo@hugovil.com> References: <20260302190953.669325-1-hugo@hugovil.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 70.80.174.168 X-SA-Exim-Mail-From: hugo@hugovil.com X-Spam-Level: X-Spam-Report: * -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP * -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% * [score: 0.0000] Subject: [PATCH 14/14] ARM: dts: imx6ul-var-som: add support for LVDS display panel X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.hugovil.com) Content-Type: text/plain; charset="utf-8" From: Hugo Villeneuve Add support for the LD configuration option (LVDS encoder assembled on SOM) so that the LVDS display panel on the concerto EVK board now works properly. Not all VAR-SOM-6UL SOMs have the LD configuration optionso factor out this functionality to a separate DTSI file. Signed-off-by: Hugo Villeneuve --- .../imx/imx6ul-var-som-concerto-common.dtsi | 35 ++++-- .../nxp/imx/imx6ul-var-som-concerto-full.dts | 1 + .../dts/nxp/imx/imx6ul-var-som-concerto.dts | 1 + .../nxp/imx/imx6ul-var-som-lvds-panel.dtsi | 112 ++++++++++++++++++ .../nxp/imx/imx6ull-var-som-concerto-full.dts | 1 + .../dts/nxp/imx/imx6ull-var-som-concerto.dts | 1 + 6 files changed, 139 insertions(+), 12 deletions(-) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi = b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi index 107b1d0fe7827..658cec2f4d026 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi @@ -44,6 +44,29 @@ led-0 { linux,default-trigger =3D "heartbeat"; }; }; + + lvds_panel: lvds-panel { + compatible =3D "sgd,gktw70sdae4se", "panel-lvds"; + data-mapping =3D "jeida-18"; + width-mm =3D <153>; + height-mm =3D <86>; + + panel-timing { + clock-frequency =3D <35000000>; + hactive =3D <800>; + vactive =3D <480>; + hback-porch =3D <40>; + hfront-porch =3D <40>; + vback-porch =3D <29>; + vfront-porch =3D <13>; + hsync-len =3D <48>; + vsync-len =3D <3>; + hsync-active =3D <0>; + vsync-active =3D <0>; + de-active =3D <1>; + pixelclk-active =3D <0>; + }; + }; }; =20 &can1 { @@ -98,12 +121,6 @@ MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x1b0b0 /* GPLED2 */ >; }; =20 - pinctrl_pwm4: pwm4grp { - fsl,pins =3D < - MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0 - >; - }; - pinctrl_rtc: rtcgrp { fsl,pins =3D < MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 /* RTC alarm IRQ */ @@ -139,12 +156,6 @@ MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B 0x78b0 }; }; =20 -&pwm4 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_pwm4>; - status =3D "okay"; -}; - &snvs_pwrkey { status =3D "disabled"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts b/a= rch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts index 64a3cbd8b7c38..725f34d6b7ee9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts @@ -14,6 +14,7 @@ #include "imx6ul-var-som-enet2.dtsi" #include "imx6ul-var-som-enet1.dtsi" #include "imx6ul-var-som-audio.dtsi" +#include "imx6ul-var-som-lvds-panel.dtsi" =20 / { model =3D "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts b/arch/a= rm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts index f014ee66e18cb..e9e4b6882bca8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts @@ -14,6 +14,7 @@ #include "imx6ul-var-som-sd.dtsi" #include "imx6ul-var-som-enet2.dtsi" #include "imx6ul-var-som-audio.dtsi" +#include "imx6ul-var-som-lvds-panel.dtsi" =20 / { model =3D "Variscite VAR-SOM-6UL Concerto Board (6UL CPU)"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi b/arc= h/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi new file mode 100644 index 0000000000000..996b37d35d6e0 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * LVDS panel support for Variscite VAR-SOM-6UL module. + * + * Copyright 2019-2024 Variscite Ltd. + * Copyright 2026 Dimonoff + */ + +/ { + lcd_backlight: lcd-backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm4 0 2000000 0>; + pwm-names =3D "LCD_BKLT_PWM"; + brightness-levels =3D <0 4 8 16 32 64 128 255>; + default-brightness-level =3D <6>; + status =3D "okay"; + }; + + lvds_encoder: lvds-encoder { + compatible =3D "ti,sn75lvds93", "lvds-encoder"; + power-supply =3D <®_3p3v>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + lvds_enc_in: endpoint { + remote-endpoint =3D <&lcdif_out>; + }; + }; + + port@1 { + reg =3D <1>; + + lvds_enc_out: endpoint { + remote-endpoint =3D <&lvds_panel_in>; + }; + }; + }; + }; +}; + +&iomuxc { + pinctrl_lcdif_ctrl: lcdif-ctrl-grp { + fsl,pins =3D < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + >; + }; + + pinctrl_lcdif_dat: lcdif-dat-grp { + fsl,pins =3D < + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 + >; + }; + + pinctrl_pwm4: pwm4-grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0 /* LCD BACKLIGHT */ + >; + }; +}; + +&lcdif { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl>; + status =3D "okay"; + + port { + lcdif_out: endpoint { + remote-endpoint =3D <&lvds_enc_in>; + }; + }; +}; + +&lvds_panel { + status =3D "okay"; + + port { + lvds_panel_in: endpoint { + remote-endpoint =3D <&lvds_enc_out>; + }; + }; +}; + +/* PWM LCD */ +&pwm4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_pwm4>; + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts b/= arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts index 2e1f75d5f25a6..1b7c1a3383eec 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts @@ -14,6 +14,7 @@ #include "imx6ul-var-som-enet2.dtsi" #include "imx6ul-var-som-enet1.dtsi" #include "imx6ul-var-som-audio.dtsi" +#include "imx6ul-var-som-lvds-panel.dtsi" =20 / { model =3D "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts b/arch/= arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts index 0d0613e3a34f2..7d032e17134a7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts @@ -13,6 +13,7 @@ #include "imx6ul-var-som-sd.dtsi" #include "imx6ul-var-som-enet2.dtsi" #include "imx6ul-var-som-audio.dtsi" +#include "imx6ul-var-som-lvds-panel.dtsi" =20 / { model =3D "Variscite VAR-SOM-6UL Concerto Board (6ULL CPU)"; --=20 2.47.3