From nobody Thu Apr 16 05:08:30 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00C8F32142B; Mon, 2 Mar 2026 14:21:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461265; cv=none; b=qHnXx7rPlWPPA8DI53tu306Te6x6c5gycGQ86Isr4+rcbb8Hl5Zh69414xhWBTqjARWnm+VVMmbTkOfJ27nOTNFXOIGzGmqYmX3a4K2Hlm7H3Jn3uc3Q0H75ng8lvNSoccgYAr1aQ8R9crXzLQ2AEQW2WGK7txvCc1HasjHfLAc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461265; c=relaxed/simple; bh=PUMHJIQe9paGHdzwol89drFjlfxsC2i93u8l7eBbM/Y=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WTBkXYZp5ui28YXJvualXwVCjm3hOq6CA/s88O5n90D7Gm9wB41vDVzDqi1VzV/DoYqAQZQJlAXk6q9k2aoahj9ATTtejCDVglLQUqu285un+KxNuCnFQ4BNNwX+Vcc5IBDkbb535vs9m0yIqRaLyAwqtVXgeOvtrRXAozyeaZs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=0bqyPO/L; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="0bqyPO/L" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1772461264; x=1803997264; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PUMHJIQe9paGHdzwol89drFjlfxsC2i93u8l7eBbM/Y=; b=0bqyPO/LfV3++07vXNZkmgBJsXqvgqJi2wgE/VPm4Pu6NSw5h/826VVE 9M3e83oH+unOMu30y4mHHDLJc318DaSWGVInMSO5gC1Yxsn8bpLMS7w8q 6QmNZmaW9jkl2+t3lWCUaSqWlC/dvdoyMXXj8rwX+iMIcPjWONsfwVb0L 0Xog/Dc35H5HC980ZabIvuQ5UviwALG1xewl9OQU9fuJYquFGbEOpXZS9 ZsBLgBcJp/TfyNHo4OUxTl3Kh/jjr9XDF3icU8wrUUqhfIceuyQSWcR+q wYjzcZcY1MUWBcekxMLvvwfv9mM1SqPcgNJjXZRALZnA1SEuncxZWHMtP g==; X-CSE-ConnectionGUID: QKICduWAQ5ynFNkWd4cNxQ== X-CSE-MsgGUID: BrJgKe7ETDSZMJOlv2niyQ== X-IronPort-AV: E=Sophos;i="6.21,320,1763449200"; d="scan'208";a="221349851" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2026 07:20:56 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Mon, 2 Mar 2026 07:20:21 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 2 Mar 2026 07:20:17 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH v3 1/4] clk: at91: sam9x7: Remove gmac peripheral clock with ID 67 Date: Mon, 2 Mar 2026 16:20:05 +0200 Message-ID: <20260302142008.3253-2-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260302142008.3253-1-mihai.sain@microchip.com> References: <20260302142008.3253-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According with datasheet [1] table 12.1 the instance ID 67 is reserved. This change drops the gmactsu_clk entry from the SAM9X7 clock description table. [1]: https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/Produ= ctDocuments/DataSheets/SAM9X7-Series-Data-Sheet-DS60001813.pdf Signed-off-by: Mihai Sain --- drivers/clk/at91/sam9x7.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index 89868a0aeaba..66aadebc51a4 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -420,7 +420,6 @@ static const struct { { .n =3D "lvdsc_clk", .id =3D 56, }, { .n =3D "pit64b1_clk", .id =3D 58, }, { .n =3D "puf_clk", .id =3D 59, }, - { .n =3D "gmactsu_clk", .id =3D 67, }, }; =20 /* --=20 2.53.0 From nobody Thu Apr 16 05:08:30 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B84A335066; Mon, 2 Mar 2026 14:21:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461266; cv=none; b=NXEzIpW2Ef2KhKHJ26dMkXcT+1byJRbhsaOFN0l4mSoE2RYVxSryQ5vOuwLucnxeTIyce4jrtkJNrL5m82pOtujHwkWEYdQNF04xjP0E3nzTxLFu0mEjLQbtavAXev2sFK2QKkCist2VZdQXUZ9obqR02Nss/Kr7PHs7SD/1jIw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461266; c=relaxed/simple; bh=WF17STSmbvctX89fLvoNysQ2fmO08+e+Vz1+yaw54WQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eA6uZ/bqR3x4JP0klCDw0clK6pQqnOCa0Npn20BiyTee4KMs3XqNVI9KZX8zNAJSyBmmmVzvBr5E6PrFFSX0SOOIfis1M200dpsJFvJF2rCffhLvn+NNBm9mewZFWEyeyd42YudHgh8sX8ucajGfiQddl6dFxfz+7x6k92CsoBY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=0yT+/LNF; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="0yT+/LNF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1772461265; x=1803997265; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WF17STSmbvctX89fLvoNysQ2fmO08+e+Vz1+yaw54WQ=; b=0yT+/LNFAVEOtoL5r2C2IR7nruNxfdhwRgQw7Dccxb9ybhzV1o3TN2aX xpisOqBX8XbMo2leIO0pFXyParyj6WvRelnIZdpKJJtR63p4G4TJbhVrc Oeg2eRAQ8G5hrU+D4QO8Fm55acInC1MdXP8Pmf0VZY3WqEAxfIpxgSqCN ZOwbaqAytETm1x1+MTlznzuh4hCm9hf26kQh7U9zE55l5Zfdkd9nUFOqV VfLAE2CitN33TAfsohGou6ju/UwGkbSnfMYn/VcI5W6HD5oueKYiM+dcd 4r2bEZcA3+vU1eHqfTw5yf4MqxaiK8tmAe9J9m5OvyQpzO4bmJ2tLUbYY A==; X-CSE-ConnectionGUID: QKICduWAQ5ynFNkWd4cNxQ== X-CSE-MsgGUID: /DLabcaGQkCQ3gmxXwN0Pg== X-IronPort-AV: E=Sophos;i="6.21,320,1763449200"; d="scan'208";a="221349854" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2026 07:20:57 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.35; Mon, 2 Mar 2026 07:20:25 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 2 Mar 2026 07:20:21 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH v3 2/4] clk: at91: sam9x7: Rename macb0_clk to gmac_clk Date: Mon, 2 Mar 2026 16:20:06 +0200 Message-ID: <20260302142008.3253-3-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260302142008.3253-1-mihai.sain@microchip.com> References: <20260302142008.3253-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update the peripheral clock name for ID 24 from macb0_clk to gmac_clk to match the actual GMAC hardware block present on SAM9X7 SoCs. This aligns the clock naming with the device tree and avoids confusion with legacy MACB controllers. Signed-off-by: Mihai Sain --- drivers/clk/at91/sam9x7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index 66aadebc51a4..32c082b4ca4b 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -387,7 +387,7 @@ static const struct { { .n =3D "dma0_clk", .id =3D 20, }, { .n =3D "uhphs_clk", .id =3D 22, }, { .n =3D "udphs_clk", .id =3D 23, }, - { .n =3D "macb0_clk", .id =3D 24, }, + { .n =3D "gmac_clk", .id =3D 24, }, { .n =3D "lcd_clk", .id =3D 25, }, { .n =3D "sdmmc1_clk", .id =3D 26, }, { .n =3D "ssc_clk", .id =3D 28, }, --=20 2.53.0 From nobody Thu Apr 16 05:08:30 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A6C643FD13B; Mon, 2 Mar 2026 14:20:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461250; cv=none; b=LTTtUnSDzm0lyXtRxjUdl/bDu0TVSocEBAh7bz12Dt5AGwH6gMHvO6L0XzHo5VJ5aYz8rRurbVrQdkXTSAQV6qXE1nu5YnriEZJLx32Zv/fuiksAte+Mh7TJwCe7pw2YzQc2yf6EJK9+3v0OJD+y7S+o1+9b27NHJVwLkuuYoyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461250; c=relaxed/simple; bh=AZMbzgF0MBXEM33A7JxLatOxJLBIUtQdFwEpG1uKRco=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZjaP02FELUZGUOKKd7OxsxbII38hZftq54LmKFJJYNNEo9XQv5Gig2x6A6ZSjTHlm3iYBp63TPhgJZuG/XcM5ESBtnru3XsChYb4kl0EDy2xiqJe1tZUQQ6v6Uci9N4RStYiNgbdA+XSDIgCGmbdJtEZt4/3UXDtZVg72UC0jYI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=lq71oCnF; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="lq71oCnF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1772461247; x=1803997247; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AZMbzgF0MBXEM33A7JxLatOxJLBIUtQdFwEpG1uKRco=; b=lq71oCnFwrN+08nHz8VnQoYtnNQ9eDz9B8wlWOoxTj4+ug/PxDrNuj2R fx5LM3PdJcQe8wNE9bHgUqktHY5a26nCozxkuuVmh0+FulIHxa3fMgWzl Zhh51yRWPnI4UM190N2qPCfI/SKzE0VOEnHRpYxYvaTetJD87BleFIal+ j0LQpfZqYVqg/I+FDFfI12vLhzRUQH/868JXMsL9VGUejHOPXv2HFx8q7 Tiyeat9YptbsG3o5QN8h8LH71H6tm3Z7LqqYJEYjpnv+BEEEHa8t0U8wX hn6gVsQAUhjwKkeJ3sHntzou5pLX4H8zjpMdvjW0SZkkeckEaby5wP/mV w==; X-CSE-ConnectionGUID: lE1TtW25TS6tGatQdMkbxQ== X-CSE-MsgGUID: JtovAiLOTAKBnZLIpVdlIA== X-IronPort-AV: E=Sophos;i="6.21,320,1763449200"; d="scan'208";a="61529580" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 02 Mar 2026 07:20:45 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 2 Mar 2026 07:20:29 -0700 Received: from archlinux.mchp-main.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 2 Mar 2026 07:20:25 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH 3/4] clk: at91: sam9x7: Fix gmac_gclk clock definition Date: Mon, 2 Mar 2026 16:20:07 +0200 Message-ID: <20260302142008.3253-4-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260302142008.3253-1-mihai.sain@microchip.com> References: <20260302142008.3253-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" According with datasheet [1] table 12.1 the instance ID 24 is used for gmac generic clock. This patch adds the correct gmac_gclk entry at ID 24, aligned with the SoC clock layout, and removes the old misplaced 67 entry. [1]: https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/Produ= ctDocuments/DataSheets/SAM9X75-SIP-Series-Data-Sheet-DS60001827.pdf Fixes: 33013b43e271 ("clk: at91: sam9x7: add sam9x7 pmc driver") Signed-off-by: Mihai Sain --- drivers/clk/at91/sam9x7.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index 32c082b4ca4b..8b52da194849 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -568,6 +568,15 @@ static const struct { .pp_chg_id =3D INT_MIN, }, =20 + { + .n =3D "gmac_gclk", + .id =3D 24, + .pp =3D { "audiopll_divpmcck", "plla_div2pmcck", }, + .pp_mux_table =3D { 6, 8, }, + .pp_count =3D 2, + .pp_chg_id =3D INT_MIN, + }, + { .n =3D "lcd_gclk", .id =3D 25, @@ -701,15 +710,6 @@ static const struct { .pp_count =3D 1, .pp_chg_id =3D INT_MIN, }, - - { - .n =3D "gmac_gclk", - .id =3D 67, - .pp =3D { "audiopll_divpmcck", "plla_div2pmcck", }, - .pp_mux_table =3D { 6, 8, }, - .pp_count =3D 2, - .pp_chg_id =3D INT_MIN, - }, }; =20 static void __init sam9x7_pmc_setup(struct device_node *np) --=20 2.53.0 From nobody Thu Apr 16 05:08:30 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CCAD43FD130; Mon, 2 Mar 2026 14:21:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461267; cv=none; b=aqdhQ4UPnMDwSUpd4wD/T/4J3Ap63hWuKzfeCS/jUq5PsC1e3e3c44XwTb3knvRtazOyyxZc4/kqZisQOsO/zmVM4OdbHKEVyI+Z8dgaMOrIT02mTJv5/tFVkEcANzpXKI1wQS22nqTHnIp3PxDdWx7Lx59o8iOP8adiV0NPAGE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772461267; c=relaxed/simple; bh=HJY0wdSVelljhVy5XonzAMfl6FFec1mLbXSyxYUN/sQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; 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Mon, 2 Mar 2026 07:20:29 -0700 From: Mihai Sain To: , , , , , , , , , , CC: , , , , , Mihai Sain Subject: [PATCH 4/4] ARM: dts: microchip: sam9x7: fix GMAC clock configuration Date: Mon, 2 Mar 2026 16:20:08 +0200 Message-ID: <20260302142008.3253-5-mihai.sain@microchip.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260302142008.3253-1-mihai.sain@microchip.com> References: <20260302142008.3253-1-mihai.sain@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The GMAC node incorrectly listed four clocks, including a separate tx_clk and a TSU GCK clock sourced from ID 67. According to the SAM9X7 clocking scheme, the GMAC uses only three clocks: HCLK, PCLK, and the TSU GCK derived from the GMAC peripheral clock (ID 24). This patch removes the unused tx_clk, updates the clock-names accordingly, and corrects the assigned clock to use GCK 24 instead of GCK 67. This aligns the device tree with the actual hardware clock topology and prevents misconfiguration of the GMAC clock tree. [root@SAM9X75 ~]$ cat /sys/kernel/debug/clk/clk_summary | grep gmac gmac_gclk 1 1 1 266666666 0 0 50000= Y f802c000.ethernet tsu_clk = f802c000.ethernet tsu_clk gmac_clk 2 2 0 266666666 0 0 50000= Y f802c000.ethernet hclk = f802c000.ethernet pclk Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC") Signed-off-by: Mihai Sain --- arch/arm/boot/dts/microchip/sam9x7.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/mi= crochip/sam9x7.dtsi index 46dacbbd201d..a42716e18da3 100644 --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi @@ -990,9 +990,9 @@ gmac: ethernet@f802c000 { <62 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 3 */ <63 IRQ_TYPE_LEVEL_HIGH 3>, /* Queue 4 */ <64 IRQ_TYPE_LEVEL_HIGH 3>; /* Queue 5 */ - clocks =3D <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>= , <&pmc PMC_TYPE_GCK 24>, <&pmc PMC_TYPE_GCK 67>; - clock-names =3D "hclk", "pclk", "tx_clk", "tsu_clk"; - assigned-clocks =3D <&pmc PMC_TYPE_GCK 67>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>= , <&pmc PMC_TYPE_GCK 24>; + clock-names =3D "hclk", "pclk", "tsu_clk"; + assigned-clocks =3D <&pmc PMC_TYPE_GCK 24>; assigned-clock-rates =3D <266666666>; status =3D "disabled"; }; --=20 2.53.0