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Mon, 2 Mar 2026 07:21:38 -0500 From: Antoniu Miclaus To: Lars-Peter Clausen , Michael Hennerich , Marcelo Schmitt , =?UTF-8?q?Nuno=20S=C3=A1?= , Antoniu Miclaus , Jonathan Cameron , "David Lechner" , Andy Shevchenko , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Petre Rodan , Jorge Marques , , , Subject: [PATCH 1/3] iio: accel: adxl372: introduce chip_info structure Date: Mon, 2 Mar 2026 14:20:57 +0200 Message-ID: <20260302122116.1282-2-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260302122116.1282-1-antoniu.miclaus@analog.com> References: <20260302122116.1282-1-antoniu.miclaus@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-ORIG-GUID: BugsD4NSncdE3zudndrrM4W32knxAvy3 X-Authority-Analysis: v=2.4 cv=DeUaa/tW c=1 sm=1 tr=0 ts=69a580dc cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=uXIjobp8t2wMuQ0fPvqm:22 a=gAnH3GRIAAAA:8 a=Qw_mE6-eBWplbBqItqEA:9 a=FHz5paCR_PjzkVn5qDnB:22 X-Proofpoint-GUID: BugsD4NSncdE3zudndrrM4W32knxAvy3 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzAyMDEwMyBTYWx0ZWRfXxdz3BLmBsm8F QDDj5TdHI77G2/bRiItpOpNZzMpAN+Tz45npS0EniGyCMBF16XfLkj8H5Czwi1N1t+FtouZCCTS CSmkcoETAXpP5oyxjzmajfb1E8tzh8W0YrHAxpky9EfFIiJgHNGYSkE3RqSGj3Y/edYfcMl7mej aAjPZ1U5RL80MwkwJkt8u2gwvJYSrno+uTaUkP/W4gGDr9M4VeCjQHfh0GheD/mKUvYFjooSbzk hhytLvI+w1fMi+mgQIIOWKboYeoNX5U2N3OBgaf7BgoNBKQQNYa5Jarzo7vQaxtqMfugFtRmsiS IL0Je0x2ObwTwaRZEQa5+JDaCPzkWJeIjiNGtMJ0Ad0DSknreF2KHxXO3/7tBXPwMSLlYY9Gh67 DcSZOw3qFoWLsHBFOtpCA6FnGtZiYEfr/I+U4yLHbG6dlTkOPnSWb9knZ2BW/cH1IDgG2NpueTg vT91g03hWp9x7eREH3w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-02_03,2026-02-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 suspectscore=0 bulkscore=0 adultscore=0 phishscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603020103 Content-Type: text/plain; charset="utf-8" Introduce a chip_info structure to parameterize device-specific properties such as ODR/bandwidth frequency tables, activity/inactivity timer scale factors, and the maximum ODR value. This refactors the driver to use chip_info lookups instead of hardcoded values, preparing the driver to support multiple device variants. The sampling_frequency_available sysfs attribute is changed from a static const string to a dynamic callback that reads from chip_info, and the SPI/I2C probe functions are updated to pass a chip_info pointer instead of a device name string. No functional change intended. Signed-off-by: Antoniu Miclaus --- drivers/iio/accel/adxl372.c | 94 ++++++++++++++++++++++----------- drivers/iio/accel/adxl372.h | 16 +++++- drivers/iio/accel/adxl372_i2c.c | 12 +++-- drivers/iio/accel/adxl372_spi.c | 12 +++-- 4 files changed, 93 insertions(+), 41 deletions(-) diff --git a/drivers/iio/accel/adxl372.c b/drivers/iio/accel/adxl372.c index 28a8793a53b6..d1f957adea64 100644 --- a/drivers/iio/accel/adxl372.c +++ b/drivers/iio/accel/adxl372.c @@ -222,6 +222,19 @@ static const int adxl372_bw_freq_tbl[5] =3D { 200, 400, 800, 1600, 3200, }; =20 +const struct adxl372_chip_info adxl372_chip_info =3D { + .name =3D "adxl372", + .samp_freq_tbl =3D adxl372_samp_freq_tbl, + .bw_freq_tbl =3D adxl372_bw_freq_tbl, + .num_freqs =3D ARRAY_SIZE(adxl372_samp_freq_tbl), + .act_time_scale_us =3D 3300, + .act_time_scale_low_us =3D 6600, + .inact_time_scale_ms =3D 13, + .inact_time_scale_low_ms =3D 26, + .max_odr =3D ADXL372_ODR_6400HZ, +}; +EXPORT_SYMBOL_NS_GPL(adxl372_chip_info, "IIO_ADXL372"); + struct adxl372_axis_lookup { unsigned int bits; enum adxl372_fifo_format fifo_format; @@ -279,6 +292,7 @@ static const struct iio_chan_spec adxl372_channels[] = =3D { }; =20 struct adxl372_state { + const struct adxl372_chip_info *chip_info; int irq; struct device *dev; struct regmap *regmap; @@ -471,13 +485,14 @@ static int adxl372_set_activity_time_ms(struct adxl37= 2_state *st, int ret; =20 /* - * 3.3 ms per code is the scale factor of the TIME_ACT register for - * ODR =3D 6400 Hz. It is 6.6 ms per code for ODR =3D 3200 Hz and below. + * The scale factor of the TIME_ACT register depends on the ODR. + * A higher scale factor is used at the maximum ODR and a lower + * one at all other rates. */ - if (st->odr =3D=3D ADXL372_ODR_6400HZ) - scale_factor =3D 3300; + if (st->odr =3D=3D st->chip_info->max_odr) + scale_factor =3D st->chip_info->act_time_scale_us; else - scale_factor =3D 6600; + scale_factor =3D st->chip_info->act_time_scale_low_us; =20 reg_val =3D DIV_ROUND_CLOSEST(act_time_ms * 1000, scale_factor); =20 @@ -501,13 +516,14 @@ static int adxl372_set_inactivity_time_ms(struct adxl= 372_state *st, int ret; =20 /* - * 13 ms per code is the scale factor of the TIME_INACT register for - * ODR =3D 6400 Hz. It is 26 ms per code for ODR =3D 3200 Hz and below. + * The scale factor of the TIME_INACT register depends on the ODR. + * A higher scale factor is used at the maximum ODR and a lower + * one at all other rates. */ - if (st->odr =3D=3D ADXL372_ODR_6400HZ) - scale_factor =3D 13; + if (st->odr =3D=3D st->chip_info->max_odr) + scale_factor =3D st->chip_info->inact_time_scale_ms; else - scale_factor =3D 26; + scale_factor =3D st->chip_info->inact_time_scale_low_ms; =20 res =3D DIV_ROUND_CLOSEST(inact_time_ms, scale_factor); reg_val_h =3D (res >> 8) & 0xFF; @@ -717,7 +733,7 @@ static int adxl372_setup(struct adxl372_state *st) if (ret < 0) return ret; =20 - ret =3D adxl372_set_odr(st, ADXL372_ODR_6400HZ); + ret =3D adxl372_set_odr(st, st->chip_info->max_odr); if (ret < 0) return ret; =20 @@ -777,10 +793,10 @@ static int adxl372_read_raw(struct iio_dev *indio_dev, *val2 =3D ADXL372_USCALE; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_SAMP_FREQ: - *val =3D adxl372_samp_freq_tbl[st->odr]; + *val =3D st->chip_info->samp_freq_tbl[st->odr]; return IIO_VAL_INT; case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: - *val =3D adxl372_bw_freq_tbl[st->bw]; + *val =3D st->chip_info->bw_freq_tbl[st->bw]; return IIO_VAL_INT; } =20 @@ -796,23 +812,17 @@ static int adxl372_write_raw(struct iio_dev *indio_de= v, =20 switch (info) { case IIO_CHAN_INFO_SAMP_FREQ: - odr_index =3D adxl372_find_closest_match(adxl372_samp_freq_tbl, - ARRAY_SIZE(adxl372_samp_freq_tbl), - val); + odr_index =3D adxl372_find_closest_match(st->chip_info->samp_freq_tbl, + st->chip_info->num_freqs, + val); ret =3D adxl372_set_odr(st, odr_index); if (ret < 0) return ret; - /* - * The timer period depends on the ODR selected. - * At 3200 Hz and below, it is 6.6 ms; at 6400 Hz, it is 3.3 ms - */ + /* Recalculate activity time as the timer period depends on ODR */ ret =3D adxl372_set_activity_time_ms(st, st->act_time_ms); if (ret < 0) return ret; - /* - * The timer period depends on the ODR selected. - * At 3200 Hz and below, it is 26 ms; at 6400 Hz, it is 13 ms - */ + /* Recalculate inactivity time as the timer period depends on ODR */ ret =3D adxl372_set_inactivity_time_ms(st, st->inact_time_ms); if (ret < 0) return ret; @@ -825,9 +835,9 @@ static int adxl372_write_raw(struct iio_dev *indio_dev, =20 return ret; case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: - bw_index =3D adxl372_find_closest_match(adxl372_bw_freq_tbl, - ARRAY_SIZE(adxl372_bw_freq_tbl), - val); + bw_index =3D adxl372_find_closest_match(st->chip_info->bw_freq_tbl, + st->chip_info->num_freqs, + val); return adxl372_set_bandwidth(st, bw_index); default: return -EINVAL; @@ -968,7 +978,7 @@ static ssize_t adxl372_show_filter_freq_avail(struct de= vice *dev, =20 for (i =3D 0; i <=3D st->odr; i++) len +=3D scnprintf(buf + len, PAGE_SIZE - len, - "%d ", adxl372_bw_freq_tbl[i]); + "%d ", st->chip_info->bw_freq_tbl[i]); =20 buf[len - 1] =3D '\n'; =20 @@ -1142,12 +1152,31 @@ static const struct iio_trigger_ops adxl372_peak_da= ta_trigger_ops =3D { .set_trigger_state =3D adxl372_peak_dready_trig_set_state, }; =20 -static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("400 800 1600 3200 6400"); +static ssize_t adxl372_show_samp_freq_avail(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct iio_dev *indio_dev =3D dev_to_iio_dev(dev); + struct adxl372_state *st =3D iio_priv(indio_dev); + int i; + size_t len =3D 0; + + for (i =3D 0; i < st->chip_info->num_freqs; i++) + len +=3D scnprintf(buf + len, PAGE_SIZE - len, + "%d ", st->chip_info->samp_freq_tbl[i]); + + buf[len - 1] =3D '\n'; + + return len; +} + +static IIO_DEVICE_ATTR(sampling_frequency_available, + 0444, adxl372_show_samp_freq_avail, NULL, 0); static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available, 0444, adxl372_show_filter_freq_avail, NULL, 0); =20 static struct attribute *adxl372_attributes[] =3D { - &iio_const_attr_sampling_frequency_available.dev_attr.attr, + &iio_dev_attr_sampling_frequency_available.dev_attr.attr, &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.a= ttr, NULL, }; @@ -1176,7 +1205,7 @@ bool adxl372_readable_noinc_reg(struct device *dev, u= nsigned int reg) EXPORT_SYMBOL_NS_GPL(adxl372_readable_noinc_reg, "IIO_ADXL372"); =20 int adxl372_probe(struct device *dev, struct regmap *regmap, - int irq, const char *name) + int irq, const struct adxl372_chip_info *chip_info) { struct iio_dev *indio_dev; struct adxl372_state *st; @@ -1192,13 +1221,14 @@ int adxl372_probe(struct device *dev, struct regmap= *regmap, st->dev =3D dev; st->regmap =3D regmap; st->irq =3D irq; + st->chip_info =3D chip_info; =20 mutex_init(&st->threshold_m); =20 indio_dev->channels =3D adxl372_channels; indio_dev->num_channels =3D ARRAY_SIZE(adxl372_channels); indio_dev->available_scan_masks =3D adxl372_channel_masks; - indio_dev->name =3D name; + indio_dev->name =3D chip_info->name; indio_dev->info =3D &adxl372_info; indio_dev->modes =3D INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; =20 diff --git a/drivers/iio/accel/adxl372.h b/drivers/iio/accel/adxl372.h index 80a0aa9714fc..3ce06609446c 100644 --- a/drivers/iio/accel/adxl372.h +++ b/drivers/iio/accel/adxl372.h @@ -10,8 +10,22 @@ =20 #define ADXL372_REVID 0x03 =20 +struct adxl372_chip_info { + const char *name; + const int *samp_freq_tbl; + const int *bw_freq_tbl; + unsigned int num_freqs; + unsigned int act_time_scale_us; + unsigned int act_time_scale_low_us; + unsigned int inact_time_scale_ms; + unsigned int inact_time_scale_low_ms; + unsigned int max_odr; +}; + +extern const struct adxl372_chip_info adxl372_chip_info; + int adxl372_probe(struct device *dev, struct regmap *regmap, - int irq, const char *name); + int irq, const struct adxl372_chip_info *chip_info); bool adxl372_readable_noinc_reg(struct device *dev, unsigned int reg); =20 #endif /* _ADXL372_H_ */ diff --git a/drivers/iio/accel/adxl372_i2c.c b/drivers/iio/accel/adxl372_i2= c.c index 186d4fe9a556..3f97126a87a1 100644 --- a/drivers/iio/accel/adxl372_i2c.c +++ b/drivers/iio/accel/adxl372_i2c.c @@ -20,11 +20,15 @@ static const struct regmap_config adxl372_regmap_config= =3D { =20 static int adxl372_i2c_probe(struct i2c_client *client) { - const struct i2c_device_id *id =3D i2c_client_get_device_id(client); + const struct adxl372_chip_info *chip_info; struct regmap *regmap; unsigned int regval; int ret; =20 + chip_info =3D i2c_get_match_data(client); + if (!chip_info) + return -ENODEV; + regmap =3D devm_regmap_init_i2c(client, &adxl372_regmap_config); if (IS_ERR(regmap)) return PTR_ERR(regmap); @@ -38,17 +42,17 @@ static int adxl372_i2c_probe(struct i2c_client *client) dev_warn(&client->dev, "I2C might not work properly with other devices on the bus"); =20 - return adxl372_probe(&client->dev, regmap, client->irq, id->name); + return adxl372_probe(&client->dev, regmap, client->irq, chip_info); } =20 static const struct i2c_device_id adxl372_i2c_id[] =3D { - { "adxl372" }, + { "adxl372", (kernel_ulong_t)&adxl372_chip_info }, { } }; MODULE_DEVICE_TABLE(i2c, adxl372_i2c_id); =20 static const struct of_device_id adxl372_of_match[] =3D { - { .compatible =3D "adi,adxl372" }, + { .compatible =3D "adi,adxl372", .data =3D &adxl372_chip_info }, { } }; MODULE_DEVICE_TABLE(of, adxl372_of_match); diff --git a/drivers/iio/accel/adxl372_spi.c b/drivers/iio/accel/adxl372_sp= i.c index 39941b519c3b..0e199feb405e 100644 --- a/drivers/iio/accel/adxl372_spi.c +++ b/drivers/iio/accel/adxl372_spi.c @@ -22,24 +22,28 @@ static const struct regmap_config adxl372_spi_regmap_co= nfig =3D { =20 static int adxl372_spi_probe(struct spi_device *spi) { - const struct spi_device_id *id =3D spi_get_device_id(spi); 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The ADXL371 is a +-200g 3-axis MEMS accelerometer nearly identical to the ADXL372 in register layout, differing only in ODR/bandwidth values, timer scale factors, and a silicon anomaly affecting FIFO operation. Update the title and description to reflect both devices. Signed-off-by: Antoniu Miclaus Acked-by: Conor Dooley --- .../devicetree/bindings/iio/accel/adi,adxl372.yaml | 9 ++++++--- MAINTAINERS | 5 ++++- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b= /Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml index 0ba0df46c3a9..02e734946f44 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml @@ -4,20 +4,23 @@ $id: http://devicetree.org/schemas/iio/accel/adi,adxl372.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer +title: Analog Devices ADXL371/ADXL372 3-Axis, +/-(200g) Digital Accelerome= ter =20 maintainers: - Marcelo Schmitt - Nuno S=C3=A1 + - Antoniu Miclaus =20 description: | - Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer that supp= orts - both I2C & SPI interfaces + Analog Devices ADXL371/ADXL372 3-Axis, +/-(200g) Digital Accelerometer t= hat + supports both I2C & SPI interfaces + https://www.analog.com/en/products/adxl371.html https://www.analog.com/en/products/adxl372.html =20 properties: compatible: enum: + - adi,adxl371 - adi,adxl372 =20 reg: diff --git a/MAINTAINERS b/MAINTAINERS index dc82a6bd1a61..34a1e1386b66 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -651,8 +651,11 @@ W: https://ez.analog.com/linux-software-drivers F: Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml F: drivers/iio/accel/adxl367* =20 -ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER +ADXL371/ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER M: Michael Hennerich +M: Marcelo Schmitt +M: Nuno S=C3=A1 +M: Antoniu Miclaus S: Supported W: https://ez.analog.com/linux-software-drivers F: Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml --=20 2.43.0 From nobody Thu Apr 9 12:08:17 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 73F6B36C9ED; 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Mon, 2 Mar 2026 07:21:47 -0500 From: Antoniu Miclaus To: Lars-Peter Clausen , Michael Hennerich , Marcelo Schmitt , =?UTF-8?q?Nuno=20S=C3=A1?= , Antoniu Miclaus , Jonathan Cameron , "David Lechner" , Andy Shevchenko , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Petre Rodan , Jorge Marques , , , Subject: [PATCH 3/3] iio: accel: adxl372: add support for ADXL371 Date: Mon, 2 Mar 2026 14:20:59 +0200 Message-ID: <20260302122116.1282-4-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260302122116.1282-1-antoniu.miclaus@analog.com> References: <20260302122116.1282-1-antoniu.miclaus@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-ORIG-GUID: TGYItOx6emQfgZQ6SZfgTF2BsLhZcNix X-Authority-Analysis: v=2.4 cv=DeUaa/tW c=1 sm=1 tr=0 ts=69a580e6 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22 a=0sLvza09kfJOxVLZPwjg:22 a=uXIjobp8t2wMuQ0fPvqm:22 a=gAnH3GRIAAAA:8 a=BVZaQw-s7qaiGUbcAgwA:9 a=mpv_7z2a4kGo0ltCk4E8:22 X-Proofpoint-GUID: TGYItOx6emQfgZQ6SZfgTF2BsLhZcNix X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzAyMDEwMyBTYWx0ZWRfX85G4JZsG+vA7 W2ipz7H6XyslwoGCAhEBgqpdhDZJCUa6UW1h5xz3V5GkQGxo9SUtzkv6cuKCTEiZcv80g5QGGm/ 9oG+Ybx2+8UujN8Xb5HrzY8BCzUGJqzqJ5n6VuQOWw3y+Ew64X52zUYfTZs5XvqxnrgSR+c7258 e1QXQ2ZAnxNx44bz0mxvH04wexcyYD9RQU466Idc3MwmrRy5xYkVAc8IZcFsv4h8VVsyhUwajao dwRbiZIjQjU/FhSveXVeA1WpaYp9M6EjlZQV+yTkKJgSGDxfg0VgDDoF333VEWOGHIaclDjBerS VFdHTIP7qWf6XTJSbfowigRBqS6ZNhOzKPu3BlWX0K/pxik7AIWNKbntCUsKe+fAhDJb4F7FjLH 7OQCp5CMJgrsmiTwUkQkvV9WUsl3Ig4y7y4J3k+6lQr9kN2AQXy+hS4dF6cB/jzGYmJ+0Xk3bWM ESlFywtGvBVol1ZGugw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-02_03,2026-02-27_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 suspectscore=0 bulkscore=0 adultscore=0 phishscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603020103 Content-Type: text/plain; charset="utf-8" Add support for the Analog Devices ADXL371, a +-200g 3-axis MEMS accelerometer sharing the same register map as the ADXL372 but with different ODR values (320/640/1280/2560/5120 Hz vs 400/800/1600/3200/ 6400 Hz), different bandwidth values, and different timer scale factors for activity/inactivity detection. Due to a silicon anomaly (er001) causing FIFO data misalignment on all current ADXL371 silicon, FIFO and triggered buffer support is disabled for the ADXL371 - only direct mode reads are supported. Signed-off-by: Antoniu Miclaus --- drivers/iio/accel/Kconfig | 12 +-- drivers/iio/accel/adxl372.c | 126 +++++++++++++++++++++----------- drivers/iio/accel/adxl372.h | 4 +- drivers/iio/accel/adxl372_i2c.c | 7 +- drivers/iio/accel/adxl372_spi.c | 7 +- 5 files changed, 102 insertions(+), 54 deletions(-) diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig index 3d3f8d8673dd..4094299e2ed8 100644 --- a/drivers/iio/accel/Kconfig +++ b/drivers/iio/accel/Kconfig @@ -158,24 +158,24 @@ config ADXL372 select IIO_TRIGGERED_BUFFER =20 config ADXL372_SPI - tristate "Analog Devices ADXL372 3-Axis Accelerometer SPI Driver" + tristate "Analog Devices ADXL371/ADXL372 3-Axis Accelerometer SPI Driver" depends on SPI select ADXL372 select REGMAP_SPI help - Say yes here to add support for the Analog Devices ADXL372 triaxial - acceleration sensor. + Say yes here to add support for the Analog Devices ADXL371/ADXL372 + triaxial acceleration sensor. To compile this driver as a module, choose M here: the module will be called adxl372_spi. =20 config ADXL372_I2C - tristate "Analog Devices ADXL372 3-Axis Accelerometer I2C Driver" + tristate "Analog Devices ADXL371/ADXL372 3-Axis Accelerometer I2C Driver" depends on I2C select ADXL372 select REGMAP_I2C help - Say yes here to add support for the Analog Devices ADXL372 triaxial - acceleration sensor. + Say yes here to add support for the Analog Devices ADXL371/ADXL372 + triaxial acceleration sensor. To compile this driver as a module, choose M here: the module will be called adxl372_i2c. =20 diff --git a/drivers/iio/accel/adxl372.c b/drivers/iio/accel/adxl372.c index d1f957adea64..10eb5bf14dad 100644 --- a/drivers/iio/accel/adxl372.c +++ b/drivers/iio/accel/adxl372.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * ADXL372 3-Axis Digital Accelerometer core driver + * ADXL371/ADXL372 3-Axis Digital Accelerometer core driver * * Copyright 2018 Analog Devices Inc. */ @@ -182,6 +182,14 @@ enum adxl372_odr { ADXL372_ODR_6400HZ, }; =20 +enum adxl371_odr { + ADXL371_ODR_320HZ, + ADXL371_ODR_640HZ, + ADXL371_ODR_1280HZ, + ADXL371_ODR_2560HZ, + ADXL371_ODR_5120HZ, +}; + enum adxl372_bandwidth { ADXL372_BW_200HZ, ADXL372_BW_400HZ, @@ -222,6 +230,29 @@ static const int adxl372_bw_freq_tbl[5] =3D { 200, 400, 800, 1600, 3200, }; =20 +static const int adxl371_samp_freq_tbl[5] =3D { + 320, 640, 1280, 2560, 5120, +}; + +static const int adxl371_bw_freq_tbl[5] =3D { + 160, 320, 640, 1280, 2560, +}; + +const struct adxl372_chip_info adxl371_chip_info =3D { + .name =3D "adxl371", + .samp_freq_tbl =3D adxl371_samp_freq_tbl, + .bw_freq_tbl =3D adxl371_bw_freq_tbl, + .num_freqs =3D ARRAY_SIZE(adxl371_samp_freq_tbl), + .act_time_scale_us =3D 4125, + .act_time_scale_low_us =3D 8250, + .inact_time_scale_ms =3D 16, + .inact_time_scale_low_ms =3D 32, + .max_odr =3D ADXL371_ODR_5120HZ, + /* Silicon erratum (er001) causes FIFO data misalignment on ADXL371 */ + .fifo_supported =3D false, +}; +EXPORT_SYMBOL_NS_GPL(adxl371_chip_info, "IIO_ADXL372"); + const struct adxl372_chip_info adxl372_chip_info =3D { .name =3D "adxl372", .samp_freq_tbl =3D adxl372_samp_freq_tbl, @@ -232,6 +263,7 @@ const struct adxl372_chip_info adxl372_chip_info =3D { .inact_time_scale_ms =3D 13, .inact_time_scale_low_ms =3D 26, .max_odr =3D ADXL372_ODR_6400HZ, + .fifo_supported =3D true, }; EXPORT_SYMBOL_NS_GPL(adxl372_chip_info, "IIO_ADXL372"); =20 @@ -1227,10 +1259,15 @@ int adxl372_probe(struct device *dev, struct regmap= *regmap, =20 indio_dev->channels =3D adxl372_channels; indio_dev->num_channels =3D ARRAY_SIZE(adxl372_channels); - indio_dev->available_scan_masks =3D adxl372_channel_masks; indio_dev->name =3D chip_info->name; indio_dev->info =3D &adxl372_info; - indio_dev->modes =3D INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; + + if (chip_info->fifo_supported) { + indio_dev->modes =3D INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; + indio_dev->available_scan_masks =3D adxl372_channel_masks; + } else { + indio_dev->modes =3D INDIO_DIRECT_MODE; + } =20 ret =3D adxl372_setup(st); if (ret < 0) { @@ -1238,50 +1275,52 @@ int adxl372_probe(struct device *dev, struct regmap= *regmap, return ret; } =20 - ret =3D devm_iio_triggered_buffer_setup_ext(dev, - indio_dev, NULL, - adxl372_trigger_handler, - IIO_BUFFER_DIRECTION_IN, - &adxl372_buffer_ops, - adxl372_fifo_attributes); - if (ret < 0) - return ret; - - if (st->irq) { - st->dready_trig =3D devm_iio_trigger_alloc(dev, - "%s-dev%d", - indio_dev->name, - iio_device_id(indio_dev)); - if (st->dready_trig =3D=3D NULL) - return -ENOMEM; - - st->peak_datardy_trig =3D devm_iio_trigger_alloc(dev, - "%s-dev%d-peak", - indio_dev->name, - iio_device_id(indio_dev)); - if (!st->peak_datardy_trig) - return -ENOMEM; - - st->dready_trig->ops =3D &adxl372_trigger_ops; - st->peak_datardy_trig->ops =3D &adxl372_peak_data_trigger_ops; - iio_trigger_set_drvdata(st->dready_trig, indio_dev); - iio_trigger_set_drvdata(st->peak_datardy_trig, indio_dev); - ret =3D devm_iio_trigger_register(dev, st->dready_trig); + if (chip_info->fifo_supported) { + ret =3D devm_iio_triggered_buffer_setup_ext(dev, + indio_dev, NULL, + adxl372_trigger_handler, + IIO_BUFFER_DIRECTION_IN, + &adxl372_buffer_ops, + adxl372_fifo_attributes); if (ret < 0) return ret; =20 - ret =3D devm_iio_trigger_register(dev, st->peak_datardy_trig); - if (ret < 0) - return ret; + if (st->irq) { + st->dready_trig =3D devm_iio_trigger_alloc(dev, + "%s-dev%d", + indio_dev->name, + iio_device_id(indio_dev)); + if (!st->dready_trig) + return -ENOMEM; + + st->peak_datardy_trig =3D devm_iio_trigger_alloc(dev, + "%s-dev%d-peak", + indio_dev->name, + iio_device_id(indio_dev)); + if (!st->peak_datardy_trig) + return -ENOMEM; + + st->dready_trig->ops =3D &adxl372_trigger_ops; + st->peak_datardy_trig->ops =3D &adxl372_peak_data_trigger_ops; + iio_trigger_set_drvdata(st->dready_trig, indio_dev); + iio_trigger_set_drvdata(st->peak_datardy_trig, indio_dev); + ret =3D devm_iio_trigger_register(dev, st->dready_trig); + if (ret < 0) + return ret; + + ret =3D devm_iio_trigger_register(dev, st->peak_datardy_trig); + if (ret < 0) + return ret; =20 - indio_dev->trig =3D iio_trigger_get(st->dready_trig); + indio_dev->trig =3D iio_trigger_get(st->dready_trig); =20 - ret =3D devm_request_irq(dev, st->irq, - iio_trigger_generic_data_rdy_poll, - IRQF_TRIGGER_RISING | IRQF_NO_THREAD, - indio_dev->name, st->dready_trig); - if (ret < 0) - return ret; + ret =3D devm_request_irq(dev, st->irq, + iio_trigger_generic_data_rdy_poll, + IRQF_TRIGGER_RISING | IRQF_NO_THREAD, + indio_dev->name, st->dready_trig); + if (ret < 0) + return ret; + } } =20 return devm_iio_device_register(dev, indio_dev); @@ -1289,5 +1328,6 @@ int adxl372_probe(struct device *dev, struct regmap *= regmap, EXPORT_SYMBOL_NS_GPL(adxl372_probe, "IIO_ADXL372"); =20 MODULE_AUTHOR("Stefan Popa "); -MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer driver"); +MODULE_AUTHOR("Antoniu Miclaus "); +MODULE_DESCRIPTION("Analog Devices ADXL371/ADXL372 3-axis accelerometer dr= iver"); MODULE_LICENSE("GPL"); diff --git a/drivers/iio/accel/adxl372.h b/drivers/iio/accel/adxl372.h index 3ce06609446c..353a8b3a9d76 100644 --- a/drivers/iio/accel/adxl372.h +++ b/drivers/iio/accel/adxl372.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * ADXL372 3-Axis Digital Accelerometer + * ADXL371/ADXL372 3-Axis Digital Accelerometer * * Copyright 2018 Analog Devices Inc. */ @@ -20,8 +20,10 @@ struct adxl372_chip_info { unsigned int inact_time_scale_ms; unsigned int inact_time_scale_low_ms; unsigned int max_odr; + bool fifo_supported; }; =20 +extern const struct adxl372_chip_info adxl371_chip_info; extern const struct adxl372_chip_info adxl372_chip_info; =20 int adxl372_probe(struct device *dev, struct regmap *regmap, diff --git a/drivers/iio/accel/adxl372_i2c.c b/drivers/iio/accel/adxl372_i2= c.c index 3f97126a87a1..40acfa611c83 100644 --- a/drivers/iio/accel/adxl372_i2c.c +++ b/drivers/iio/accel/adxl372_i2c.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * ADXL372 3-Axis Digital Accelerometer I2C driver + * ADXL371/ADXL372 3-Axis Digital Accelerometer I2C driver * * Copyright 2018 Analog Devices Inc. */ @@ -46,12 +46,14 @@ static int adxl372_i2c_probe(struct i2c_client *client) } =20 static const struct i2c_device_id adxl372_i2c_id[] =3D { + { "adxl371", (kernel_ulong_t)&adxl371_chip_info }, { "adxl372", (kernel_ulong_t)&adxl372_chip_info }, { } }; MODULE_DEVICE_TABLE(i2c, adxl372_i2c_id); =20 static const struct of_device_id adxl372_of_match[] =3D { + { .compatible =3D "adi,adxl371", .data =3D &adxl371_chip_info }, { .compatible =3D "adi,adxl372", .data =3D &adxl372_chip_info }, { } }; @@ -69,6 +71,7 @@ static struct i2c_driver adxl372_i2c_driver =3D { module_i2c_driver(adxl372_i2c_driver); =20 MODULE_AUTHOR("Stefan Popa "); -MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer I2C driver= "); +MODULE_AUTHOR("Antoniu Miclaus "); +MODULE_DESCRIPTION("Analog Devices ADXL371/ADXL372 3-axis accelerometer I2= C driver"); MODULE_LICENSE("GPL"); MODULE_IMPORT_NS("IIO_ADXL372"); diff --git a/drivers/iio/accel/adxl372_spi.c b/drivers/iio/accel/adxl372_sp= i.c index 0e199feb405e..438e2bef5b77 100644 --- a/drivers/iio/accel/adxl372_spi.c +++ b/drivers/iio/accel/adxl372_spi.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * ADXL372 3-Axis Digital Accelerometer SPI driver + * ADXL371/ADXL372 3-Axis Digital Accelerometer SPI driver * * Copyright 2018 Analog Devices Inc. */ @@ -37,12 +37,14 @@ static int adxl372_spi_probe(struct spi_device *spi) } =20 static const struct spi_device_id adxl372_spi_id[] =3D { + { "adxl371", (kernel_ulong_t)&adxl371_chip_info }, { "adxl372", (kernel_ulong_t)&adxl372_chip_info }, { } }; MODULE_DEVICE_TABLE(spi, adxl372_spi_id); =20 static const struct of_device_id adxl372_of_match[] =3D { + { .compatible =3D "adi,adxl371", .data =3D &adxl371_chip_info }, { .compatible =3D "adi,adxl372", .data =3D &adxl372_chip_info }, { } }; @@ -60,6 +62,7 @@ static struct spi_driver adxl372_spi_driver =3D { module_spi_driver(adxl372_spi_driver); =20 MODULE_AUTHOR("Stefan Popa "); -MODULE_DESCRIPTION("Analog Devices ADXL372 3-axis accelerometer SPI driver= "); +MODULE_AUTHOR("Antoniu Miclaus "); +MODULE_DESCRIPTION("Analog Devices ADXL371/ADXL372 3-axis accelerometer SP= I driver"); MODULE_LICENSE("GPL"); MODULE_IMPORT_NS("IIO_ADXL372"); --=20 2.43.0