From nobody Thu Apr 9 16:13:55 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50CE23A1CF7 for ; Mon, 2 Mar 2026 10:29:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447383; cv=none; b=KzedtwBoz753nAbC3eRHdqWu+KaRbgBXsFjG9gacy7BCbwDzY/+IjsnLJ4fPeyAIfQKeQ9CciOxShofbUE7hVcYU9ZY3ZZkmwPSunBBFxIKgv9Hy4WIL/SzQ9gyFlHiHqhKma0Y2uo8pysCqFnc250eiNGCiRi9Jeouy1rEYVwg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447383; c=relaxed/simple; bh=gZfp7AFUDRuKyFzNq7gSRxIUj7Mf0Qt8SSGk362fa3U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PZW6ZGcW0HifwbKTBxGO/M2l364FrA/DXZKvCE8obIsGAnD6ZCRWaLQvsq8aPxmUyCbRlJIjvAISulYusxHEl7yA6MpMa0e1ah9U/OuAT4nN/6CChdXe3CdRtC0C6yzYAlYl+JsKA7COrJiSAyIL04Pm4bMTQxhUDkOFBzuxK7E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cefjFVP5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cefjFVP5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2D83AC2BCB0; Mon, 2 Mar 2026 10:29:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772447383; bh=gZfp7AFUDRuKyFzNq7gSRxIUj7Mf0Qt8SSGk362fa3U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cefjFVP5ZXUU503rm5C3FgR8riQwmG/NgPfnQkXVgBpybjKDBzpEfLroCAdqRgyjR N+jZjca+jNX1UkKmGF0jSVMFdb7ALQOvPrgrFY1/flpVVAlSicegQo7JZHQ5RnnD3I aFPoOQYbz62cChFeNKbkex+VuJs64RIxKvwBhChHzlR5TWMdyiHdabzuE3yPZuAnSf G56G1jlcqNhPSz1bviKiQlZY+p8R8qESSmYksR2jgbuNt837ffQdZMx0jKKAmxdIIR VFl5fDFFcfsjFz6I98fuhfCrXiEhIvyDFlbW19aHYfz74kPDYFnXpTxNLFGz+C2SkH 283CmPe0sdfdg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vx0Wz-0000000FBCc-0vne; Mon, 02 Mar 2026 10:29:41 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Catalin Marinas , Will Deacon , Mark Rutland , Thomas Gleixner , Ben Horgan , Daniel Lezcano Subject: [PATCH 5/5] arm64: Convert __delay_cycles() to arch_timer_read_vcounter() Date: Mon, 2 Mar 2026 10:29:37 +0000 Message-ID: <20260302102937.1516059-6-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260302102937.1516059-1-maz@kernel.org> References: <20260302102937.1516059-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, tglx@kernel.org, ben.horgan@arm.com, daniel.lezcano@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Relax the need for disabling preemption in __delay_cycles() by using arch_timer_read_vcounter(), which will disable preemption only when this is actually required. Signed-off-by: Marc Zyngier --- arch/arm64/lib/delay.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/lib/delay.c b/arch/arm64/lib/delay.c index e278e060e78a9..a667df920697d 100644 --- a/arch/arm64/lib/delay.c +++ b/arch/arm64/lib/delay.c @@ -32,10 +32,9 @@ static inline unsigned long xloops_to_cycles(unsigned lo= ng xloops) * Note that userspace cannot change the offset behind our back either, * as the vcpu mutex is held as long as KVM_RUN is in progress. */ -static cycles_t notrace __delay_cycles(void) +static cycles_t __delay_cycles(void) { - guard(preempt_notrace)(); - return __arch_counter_get_cntvct_stable(); + return arch_timer_read_vcounter(); } =20 void __delay(unsigned long cycles) --=20 2.47.3