From nobody Wed Apr 8 02:30:18 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EED3639E17E; Mon, 2 Mar 2026 10:24:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447083; cv=none; b=reTfwLIqd2m7G631+0mOQbiEWXfyphEPKAtFNnUxtAZplFmSZs/mPonOaXm1RAFgup6LI005D7n6ExcJxjmjeFlnZUsgr7bSqVVXYsFUITN1Fy11/1AlD5YfoS4bkGxs980Qp9zYq7i0178xfDjYe6N3oBWOMzx/AXCtsHwHfmk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447083; c=relaxed/simple; bh=8NZwoYwb2VCG1LCRSHv+AVjZPo5V+zxxU36gRDN2zqs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=b7XVl5q5U+JwbQamdazlByD8/1clsI3yTtPlIw5jG0SMssckujR0d8etSqm+RLxpFZS7S+uJyOxK4Rdtt/yZvs3+fud58ngDz2wp37LVKUsPx3m4zpZFBIRbcuYwHyRwmdBEMgYV9cz330BEiX4b3Gmmzt3qJW81os1fojc8mVg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 2 Mar 2026 18:24:30 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 2 Mar 2026 18:24:30 +0800 From: Jacky Chou Date: Mon, 2 Mar 2026 18:24:28 +0800 Subject: [PATCH net-next v6 1/5] dt-bindings: net: ftgmac100: Add delay properties for AST2600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260302-rgmii_delay_2600-v6-1-68319a4c4110@aspeedtech.com> References: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> In-Reply-To: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Po-Yu Chuang , Joel Stanley , Andrew Jeffery CC: , , , , , , Jacky Chou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772447070; l=3348; i=jacky_chou@aspeedtech.com; s=20251031; h=from:subject:message-id; bh=8NZwoYwb2VCG1LCRSHv+AVjZPo5V+zxxU36gRDN2zqs=; b=PrXtRYnWTobVOcowR92HfRVdDkG0LYGyRqdY74i9iNH9IHMIvgJ2igdf+fDectjVVH1j3VUZ4 IAkoYlhVILJBXeARS7VrfUPv6pi7wmIWtKakW3rLfqU79Ohesamajv6 X-Developer-Key: i=jacky_chou@aspeedtech.com; a=ed25519; pk=8XBx7KFM1drEsfCXTH9QC2lbMlGU4XwJTA6Jt9Mabdo= The AST2600 contains two dies, each with its own MAC, and these MACs require different delay configurations. Previously, these delay values were configured during the bootloader stage rather than in the driver. This change introduces the use of the standard properties defined in ethernet-controller.yaml to configure the delay values directly in the driver. Each Aspeed platform has its own delay step value. And for Aspeed platform, the total steps of RGMII delay configuraion is 32 steps, so the total delay is delay-step-ps * 32. Default delay values are declared so that tx-internal-delay-ps and rx-internal-delay-ps become optional. If these properties are not present, the driver will use the default values instead. Add conditional schema constraints for Aspeed AST2600 MAC controllers: - For MAC0/1, per delay step for rgmii is 45 ps - For MAC2/3, per delay step for rgmii is 250 ps - Both require the "aspeed,scu" and "aspeed,rgmii-delay-ps" properties. Other compatible values remain unrestricted. Signed-off-by: Jacky Chou --- .../devicetree/bindings/net/faraday,ftgmac100.yaml | 42 +++++++++++++++++-= ---- 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml b= /Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml index d14410018bcf..4cac216f7339 100644 --- a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml +++ b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml @@ -69,6 +69,30 @@ properties: mdio: $ref: /schemas/net/mdio.yaml# =20 + aspeed,scu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the SCU (System Control Unit) syscon node for Aspeed plat= form. + This reference is used by the MAC controller to configure the RGMII = delays. + + rx-internal-delay-ps: + description: + RGMII Receive Clock Delay defined in pico seconds. There are 32 + steps of RGMII delay for Aspeed platform. Each Aspeed platform has i= ts + own delay step value, it is fixed by hardware design. Total delay is + calculated by delay-step * 32. A value of 0 ps will disable any + delay. The Default is no delay. + default: 0 + + tx-internal-delay-ps: + description: + RGMII Transmit Clock Delay defined in pico seconds. There are 32 + steps of RGMII delay for Aspeed platform. Each Aspeed platform has i= ts + own delay step value, it is fixed by hardware design. Total delay is + calculated by delay-step * 32. A value of 0 ps will disable any + delay. The Default is no delay. + default: 0 + required: - compatible - reg @@ -77,17 +101,17 @@ required: allOf: - $ref: ethernet-controller.yaml# - if: - properties: - compatible: - contains: - enum: - - aspeed,ast2600-mac + not: + properties: + compatible: + contains: + enum: + - aspeed,ast2600-mac then: properties: - resets: true - else: - properties: - resets: false + aspeed,scu: false + rx-internal-delay-ps: false + tx-internal-delay-ps: false =20 unevaluatedProperties: false =20 --=20 2.34.1 From nobody Wed Apr 8 02:30:18 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8040D3A1D05; Mon, 2 Mar 2026 10:24:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447085; cv=none; b=RYQBo7M11G4WuPhgSt47LPD1JI+CdlD4fjNZZsu3soi3L9bCShSwiNU3pr0X4IVh4NGiM/BuTzdEcwAaPQkkHeDGSxtzOrMkIEA4jvR+jQV9NkD1d4yepAKhgcoLcffwZBE0qTvMkpYCj1Pqc2RhnIHQ/Q1JwdcEAHGvqMsXcxY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447085; c=relaxed/simple; bh=aZtDNdr61OwweI7vby67wVIteWF+rJrRIBVHhHKQGhE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=rtDp45XEZ934LjgAkUNrZ9sn0755OAsZ7uKpr0EpreINh5ZKfc2ptpHzqwSubvIf498IPgtUNhZs/3sio/p9XPP65ZvpIZoHObcvzeCqfCTgXBlGOxSz09QKiIbA7lxRFvrj///9xtYEhe7Ffp51eqwsmLCjbz9iIgl8GhRSF2E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 2 Mar 2026 18:24:30 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 2 Mar 2026 18:24:30 +0800 From: Jacky Chou Date: Mon, 2 Mar 2026 18:24:29 +0800 Subject: [PATCH net-next v6 2/5] ARM: dts: aspeed-g6: add aspeed,scu property for MAC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260302-rgmii_delay_2600-v6-2-68319a4c4110@aspeedtech.com> References: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> In-Reply-To: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Po-Yu Chuang , Joel Stanley , Andrew Jeffery CC: , , , , , , Jacky Chou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772447070; l=1457; i=jacky_chou@aspeedtech.com; s=20251031; h=from:subject:message-id; bh=aZtDNdr61OwweI7vby67wVIteWF+rJrRIBVHhHKQGhE=; b=AXmZ0lSoz1tSsrNTPqSr8OhapxV4yxEady0AEJi725vT8llR3TAbxTAXgpQE8otpoSQj+DJ9M 5XXUXwU8FxuBvN1sBZ/0QQuDmszHZgWhD8W55Az/igxDzBMj/K7GkEF X-Developer-Key: i=jacky_chou@aspeedtech.com; a=ed25519; pk=8XBx7KFM1drEsfCXTH9QC2lbMlGU4XwJTA6Jt9Mabdo= Add aspeed,scu property to let MAC driver to configure RGMII delay with scu register. Signed-off-by: Jacky Chou --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/as= peed/aspeed-g6.dtsi index 189bc3bbb47c..cbcdc1c6eadb 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -235,6 +235,7 @@ mac0: ethernet@1e660000 { reg =3D <0x1e660000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC1CLK>; + aspeed,scu =3D <&syscon>; status =3D "disabled"; }; =20 @@ -243,6 +244,7 @@ mac1: ethernet@1e680000 { reg =3D <0x1e680000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC2CLK>; + aspeed,scu =3D <&syscon>; status =3D "disabled"; }; =20 @@ -251,6 +253,7 @@ mac2: ethernet@1e670000 { reg =3D <0x1e670000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC3CLK>; + aspeed,scu =3D <&syscon>; status =3D "disabled"; }; =20 @@ -259,6 +262,7 @@ mac3: ethernet@1e690000 { reg =3D <0x1e690000 0x180>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_GATE_MAC4CLK>; + aspeed,scu =3D <&syscon>; status =3D "disabled"; }; =20 --=20 2.34.1 From nobody Wed Apr 8 02:30:18 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 624713A0B1A; Mon, 2 Mar 2026 10:24:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447087; cv=none; b=q1E235eqa7txHQGQcs2nDCCrU6Im7s0ORRwiFES+TM7EXTqFoeg+lohe0HKn7bxuY3yJ6ztSgx40/9RbXUfWcZ3okED8UMM9SyUz9ej9kRZKWzsoItpkjBIGh/GnC8RtdG5coF1sD1zio0D6YcjNT/ZMqXepWhNUBVzN2mgR4dU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447087; c=relaxed/simple; bh=UqUrbBeIvhqRy5zO6BS/+j9eXsnua0SQu5iczuiSWSw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=CVWrTfKwZzftSXpn6aonZzE1+VbdCRUWAOlBVOjjtsh3tJZ7EBjTidktAzC9sBIeDBdowCaa92lrUzNEbICZ1v0lLRKpvno+TMD4B0sxRh7z0kgDdeqplDUSpfJJYdQ7m/y67BnAI+wPIsnafDYbu1K/342wCJrDjKduWjHMvpo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 2 Mar 2026 18:24:30 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 2 Mar 2026 18:24:30 +0800 From: Jacky Chou Date: Mon, 2 Mar 2026 18:24:30 +0800 Subject: [PATCH net-next v6 3/5] net: ftgmac100: Add RGMII delay support for AST2600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260302-rgmii_delay_2600-v6-3-68319a4c4110@aspeedtech.com> References: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> In-Reply-To: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Po-Yu Chuang , Joel Stanley , Andrew Jeffery CC: , , , , , , Jacky Chou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772447070; l=9482; i=jacky_chou@aspeedtech.com; s=20251031; h=from:subject:message-id; bh=UqUrbBeIvhqRy5zO6BS/+j9eXsnua0SQu5iczuiSWSw=; b=Hyr5u52113fwYtjR+T2Fm/3UsyYDONXJfpqXEsy8g25AktaHUXp+Pcu8OMkaETISqf6d1pcm7 athTal752XkDnVYQaARVK5Gve5sWto8CrQ21396tYPhVQJqjnpLvAxA X-Developer-Key: i=jacky_chou@aspeedtech.com; a=ed25519; pk=8XBx7KFM1drEsfCXTH9QC2lbMlGU4XwJTA6Jt9Mabdo= On the AST2600 platform, the RGMII delay is controlled via the SCU registers. The delay chain configuration differs between MAC0/1 and MAC2/3, even though all four MACs use a 32-stage delay chain. +------+----------+-----------+-------------+-------------+ | |Delay Unit|Delay Stage|TX Edge Stage|RX Edge Stage| +------+----------+-----------+-------------+-------------+ |MAC0/1| 45 ps| 32 | 0 | 0 | +------+----------+-----------+-------------+-------------+ |MAC2/3| 250 ps| 32 | 0 | 26 | +------+----------+-----------+-------------+-------------+ For MAC2/3, the "no delay" condition starts from stage 26. Setting the RX delay stage to 26 means that no additional RX delay is applied. Here lists the RX delay setting of MAC2/3 below. 26 -> 0 ns, 27 -> 0.25 ns, ... , 31 -> 1.25 ns, 0 -> 1.5 ns, 1 -> 1.75 ns, ... , 25 -> 7.75 ns Therefore, we calculate the delay stage from the rx-internal-delay-ps of MAC2/3 to add 26. If the stage is equel to or bigger than 32, the delay stage will be mask 0x1f to get the correct setting. The delay chain is like a ring for configuration. Example for the rx-internal-delay-ps of MAC2/3 is 2000 ps, we will get the delay stage is 2. Signed-off-by: Jacky Chou --- drivers/net/ethernet/faraday/ftgmac100.c | 162 +++++++++++++++++++++++++++= +++- drivers/net/ethernet/faraday/ftgmac100.h | 20 ++++ 2 files changed, 178 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/etherne= t/faraday/ftgmac100.c index 1e91e79c8134..0b2a0bb8a4a9 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.c +++ b/drivers/net/ethernet/faraday/ftgmac100.c @@ -26,6 +26,9 @@ #include #include #include +#include +#include +#include #include #include =20 @@ -42,6 +45,7 @@ enum ftgmac100_mac_id { =20 struct ftgmac100_match_data { enum ftgmac100_mac_id mac_id; + bool rgmii_delay_conf; }; =20 /* Arbitrary values, I am not sure the HW has limits */ @@ -1919,10 +1923,148 @@ static int ftgmac100_probe_dt(struct net_device *n= etdev, return 0; } =20 +static int ftgmac100_set_ast2600_rgmii_delay(struct ftgmac100 *priv, + u32 rgmii_tx_delay, + u32 rgmii_rx_delay, + phy_interface_t phy_intf) +{ + struct device *dev =3D priv->dev; + struct device_node *np; + u32 rgmii_delay_unit; + u32 rx_delay_index; + u32 tx_delay_index; + struct regmap *scu; + int dly_mask; + int dly_reg; + int mac_id; + + np =3D dev->of_node; + + scu =3D syscon_regmap_lookup_by_phandle(np, "aspeed,scu"); + if (IS_ERR(scu)) { + dev_err(dev, "failed to get aspeed,scu"); + return PTR_ERR(scu); + } + + /* According to the register base address to specify the corresponding + * values. + */ + switch (priv->res->start) { + case AST2600_MAC0_BASE_ADDR: + mac_id =3D 0; + rgmii_delay_unit =3D AST2600_MAC01_CLK_DLY_UNIT; + dly_reg =3D AST2600_MAC01_CLK_DLY; + break; + case AST2600_MAC1_BASE_ADDR: + mac_id =3D 1; + rgmii_delay_unit =3D AST2600_MAC01_CLK_DLY_UNIT; + dly_reg =3D AST2600_MAC01_CLK_DLY; + break; + case AST2600_MAC2_BASE_ADDR: + mac_id =3D 2; + rgmii_delay_unit =3D AST2600_MAC23_CLK_DLY_UNIT; + dly_reg =3D AST2600_MAC23_CLK_DLY; + break; + case AST2600_MAC3_BASE_ADDR: + mac_id =3D 3; + rgmii_delay_unit =3D AST2600_MAC23_CLK_DLY_UNIT; + dly_reg =3D AST2600_MAC23_CLK_DLY; + break; + default: + dev_err(dev, "Invalid mac base address"); + return -EINVAL; + } + + /* Please refer to ethernet-controller.yaml. */ + if (phy_intf =3D=3D PHY_INTERFACE_MODE_RGMII && + (rgmii_tx_delay =3D=3D 2000 || rgmii_rx_delay =3D=3D 2000)) { + dev_warn(dev, "RX/TX delay cannot set to 2000 on 'rgmii'\n"); + return -EINVAL; + } + + tx_delay_index =3D DIV_ROUND_CLOSEST(rgmii_tx_delay, rgmii_delay_unit); + if (tx_delay_index >=3D 32) { + dev_err(dev, "The %u ps of TX delay is out of range\n", + rgmii_tx_delay); + return -EINVAL; + } + + rx_delay_index =3D DIV_ROUND_CLOSEST(rgmii_rx_delay, rgmii_delay_unit); + if (rx_delay_index >=3D 32) { + dev_err(dev, "The %u ps of RX delay is out of range\n", + rgmii_rx_delay); + return -EINVAL; + } + + /* Due to the hardware design reason, for MAC2/3 on AST2600, the zero + * delay ns on RX is configured by setting value 0x1a. + * List as below: + * 0x1a -> 0 ns, 0x1b -> 0.25 ns, ... , 0x1f -> 1.25 ns, + * 0x00 -> 1.5 ns, 0x01 -> 1.75 ns, ... , 0x19 -> 7.75 ns, 0x1a -> 0 ns + */ + if (mac_id =3D=3D 2 || mac_id =3D=3D 3) + rx_delay_index =3D (AST2600_MAC23_RX_DLY_0_NS + rx_delay_index) & + AST2600_MAC_TX_RX_DLY_MASK; + + if (mac_id =3D=3D 0 || mac_id =3D=3D 2) { + dly_mask =3D ASPEED_MAC0_2_TX_DLY | ASPEED_MAC0_2_RX_DLY; + tx_delay_index =3D FIELD_PREP(ASPEED_MAC0_2_TX_DLY, tx_delay_index); + rx_delay_index =3D FIELD_PREP(ASPEED_MAC0_2_RX_DLY, rx_delay_index); + } else { + dly_mask =3D ASPEED_MAC1_3_TX_DLY | ASPEED_MAC1_3_RX_DLY; + tx_delay_index =3D FIELD_PREP(ASPEED_MAC1_3_TX_DLY, tx_delay_index); + rx_delay_index =3D FIELD_PREP(ASPEED_MAC1_3_RX_DLY, rx_delay_index); + } + + regmap_update_bits(scu, dly_reg, dly_mask, tx_delay_index | rx_delay_inde= x); + + return 0; +} + +static int ftgmac100_config_rgmii_delay(struct ftgmac100 *priv) +{ + struct device_node *np =3D priv->dev->of_node; + phy_interface_t phy_intf; + u32 rgmii_tx_delay; + u32 rgmii_rx_delay; + int err =3D 0; + + /* Because some old dts using NC-SI mode does not include phy-mode + * property, here need to skip RGMII delay configuration and prevent + * of_get_phy_mode() from returning error. + */ + if (of_get_property(np, "use-ncsi", NULL)) + return 0; + + err =3D of_get_phy_mode(np, &phy_intf); + if (err) { + dev_err(priv->dev, "Failed to get phy mode: %d\n", err); + return err; + } + + /* RMII does not need to configure RGMII delay */ + if (!phy_interface_mode_is_rgmii(phy_intf)) + return 0; + + if (of_property_read_u32(np, "tx-internal-delay-ps", &rgmii_tx_delay)) + rgmii_tx_delay =3D 0; + if (of_property_read_u32(np, "rx-internal-delay-ps", &rgmii_rx_delay)) + rgmii_rx_delay =3D 0; + + if (priv->mac_id =3D=3D FTGMAC100_AST2600) + err =3D ftgmac100_set_ast2600_rgmii_delay(priv, + rgmii_tx_delay, + rgmii_rx_delay, + phy_intf); + + return err; +} + static int ftgmac100_probe(struct platform_device *pdev) { const struct ftgmac100_match_data *match_data; enum ftgmac100_mac_id mac_id; + bool rgmii_delay_conf; struct resource *res; int irq; struct net_device *netdev; @@ -1936,8 +2078,10 @@ static int ftgmac100_probe(struct platform_device *p= dev) if (!match_data) return -EINVAL; mac_id =3D match_data->mac_id; + rgmii_delay_conf =3D match_data->rgmii_delay_conf; } else { mac_id =3D FTGMAC100_FARADAY; + rgmii_delay_conf =3D false; } =20 res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -2006,6 +2150,12 @@ static int ftgmac100_probe(struct platform_device *p= dev) priv->txdes0_edotr_mask =3D BIT(15); } =20 + if (rgmii_delay_conf) { + err =3D ftgmac100_config_rgmii_delay(priv); + if (err) + return err; + } + if (priv->mac_id =3D=3D FTGMAC100_FARADAY || priv->mac_id =3D=3D FTGMAC100_AST2400 || priv->mac_id =3D=3D FTGMAC100_AST2500) { @@ -2100,19 +2250,23 @@ static void ftgmac100_remove(struct platform_device= *pdev) } =20 static const struct ftgmac100_match_data ftgmac100_match_data_ast2400 =3D { - .mac_id =3D FTGMAC100_AST2400 + .mac_id =3D FTGMAC100_AST2400, + .rgmii_delay_conf =3D false }; =20 static const struct ftgmac100_match_data ftgmac100_match_data_ast2500 =3D { - .mac_id =3D FTGMAC100_AST2500 + .mac_id =3D FTGMAC100_AST2500, + .rgmii_delay_conf =3D false }; =20 static const struct ftgmac100_match_data ftgmac100_match_data_ast2600 =3D { - .mac_id =3D FTGMAC100_AST2600 + .mac_id =3D FTGMAC100_AST2600, + .rgmii_delay_conf =3D true }; =20 static const struct ftgmac100_match_data ftgmac100_match_data_faraday =3D { - .mac_id =3D FTGMAC100_FARADAY + .mac_id =3D FTGMAC100_FARADAY, + .rgmii_delay_conf =3D false }; =20 static const struct of_device_id ftgmac100_of_match[] =3D { diff --git a/drivers/net/ethernet/faraday/ftgmac100.h b/drivers/net/etherne= t/faraday/ftgmac100.h index 4968f6f0bdbc..d19d44d1b8e0 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.h +++ b/drivers/net/ethernet/faraday/ftgmac100.h @@ -271,4 +271,24 @@ struct ftgmac100_rxdes { #define FTGMAC100_RXDES1_UDP_CHKSUM_ERR (1 << 26) #define FTGMAC100_RXDES1_IP_CHKSUM_ERR (1 << 27) =20 +/* Aspeed SCU */ +#define AST2600_MAC01_CLK_DLY 0x340 +#define AST2600_MAC23_CLK_DLY 0x350 +#define AST2600_MAC01_CLK_DLY_UNIT 45 /* ps */ +#define AST2600_MAC01_TX_DLY_0_NS 0 +#define AST2600_MAC01_RX_DLY_0_NS 0 +#define AST2600_MAC23_CLK_DLY_UNIT 250 /* ps */ +#define AST2600_MAC23_TX_DLY_0_NS 0 +#define AST2600_MAC23_RX_DLY_0_NS 0x1a +#define AST2600_MAC_TX_RX_DLY_MASK 0x1f +#define ASPEED_MAC0_2_TX_DLY GENMASK(5, 0) +#define ASPEED_MAC0_2_RX_DLY GENMASK(17, 12) +#define ASPEED_MAC1_3_TX_DLY GENMASK(11, 6) +#define ASPEED_MAC1_3_RX_DLY GENMASK(23, 18) + +#define AST2600_MAC0_BASE_ADDR 0x1e660000 +#define AST2600_MAC1_BASE_ADDR 0x1e680000 +#define AST2600_MAC2_BASE_ADDR 0x1e670000 +#define AST2600_MAC3_BASE_ADDR 0x1e690000 + #endif /* __FTGMAC100_H */ --=20 2.34.1 From nobody Wed Apr 8 02:30:18 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 339423A0E8A; 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dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 2 Mar 2026 18:24:30 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 2 Mar 2026 18:24:30 +0800 From: Jacky Chou Date: Mon, 2 Mar 2026 18:24:31 +0800 Subject: [PATCH net-next v6 4/5] net: ftgmac100: Support rgmii delay in old dts with AST2600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260302-rgmii_delay_2600-v6-4-68319a4c4110@aspeedtech.com> References: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> In-Reply-To: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Po-Yu Chuang , Joel Stanley , Andrew Jeffery CC: , , , , , , Jacky Chou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772447070; l=9969; i=jacky_chou@aspeedtech.com; s=20251031; h=from:subject:message-id; bh=GNBVN9sBooVec+i3k+OhnV9U0vINAXVIEnxZwRMxiok=; b=/Bemo3MJ8tUHzhfUnL8BRt6fHMNk16GVTHCryga+He7Qx/E3WIeI75NSxIPE1QjxRyJlBQ92c Pg1w8WIDO3ICGJ+2i9ebXm3zyVQWtrO2KGY771P9ZVmGgCCNag8otkm X-Developer-Key: i=jacky_chou@aspeedtech.com; a=ed25519; pk=8XBx7KFM1drEsfCXTH9QC2lbMlGU4XwJTA6Jt9Mabdo= Strating to this patch, driver will remind the legacy dts to update the "phy-mode" to "rgmii-id, and if necessary, add small "rx-internal-delay-ps" and "tx-internal-delay-ps. If lack the two properties, driver will accord to the original delay value from bootloader to disable RGMII delay and to change the phy interface to phy driver. Signed-off-by: Jacky Chou --- drivers/net/ethernet/faraday/ftgmac100.c | 190 +++++++++++++++++++++++++++= ---- drivers/net/ethernet/faraday/ftgmac100.h | 5 + 2 files changed, 174 insertions(+), 21 deletions(-) diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/etherne= t/faraday/ftgmac100.c index 0b2a0bb8a4a9..5f5b9199a9ef 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.c +++ b/drivers/net/ethernet/faraday/ftgmac100.c @@ -1871,10 +1871,40 @@ static int ftgmac100_probe_ncsi(struct net_device *= netdev, return err; } =20 +static struct phy_device *ftgmac100_ast2600_phy_get(struct net_device *dev, + struct device_node *np, + void (*hndlr)(struct net_device *), + phy_interface_t phy_intf) +{ + struct device_node *phy_np; + struct phy_device *phy; + int ret; + + if (of_phy_is_fixed_link(np)) { + ret =3D of_phy_register_fixed_link(np); + if (ret < 0) { + netdev_err(dev, "broken fixed-link specification\n"); + return NULL; + } + phy_np =3D of_node_get(np); + } else { + phy_np =3D of_parse_phandle(np, "phy-handle", 0); + if (!phy_np) + return NULL; + } + + phy =3D of_phy_connect(dev, phy_np, hndlr, 0, phy_intf); + + of_node_put(phy_np); + + return phy; +} + static int ftgmac100_probe_dt(struct net_device *netdev, struct platform_device *pdev, struct ftgmac100 *priv, - struct device_node *np) + struct device_node *np, + phy_interface_t phy_intf) { struct phy_device *phy; int err; @@ -1890,8 +1920,16 @@ static int ftgmac100_probe_dt(struct net_device *net= dev, * them. 2600 has an independent MDIO controller, not * part of the MAC. */ - phy =3D of_phy_get_and_connect(priv->netdev, np, - &ftgmac100_adjust_link); + if (priv->mac_id =3D=3D FTGMAC100_AST2600) + /* Because AST2600 will use the RGMII delay to determine + * which phy interface to use. + */ + phy =3D ftgmac100_ast2600_phy_get(priv->netdev, np, + &ftgmac100_adjust_link, + phy_intf); + else + phy =3D of_phy_get_and_connect(priv->netdev, np, + &ftgmac100_adjust_link); if (!phy) { dev_err(&pdev->dev, "Failed to connect to phy\n"); return -EINVAL; @@ -1923,10 +1961,62 @@ static int ftgmac100_probe_dt(struct net_device *ne= tdev, return 0; } =20 +static int ftgmac100_get_ast2600_rgmii_flag(u32 delay) +{ + if ((delay > 500 && delay < 1500) || + (delay > 2500 && delay < 7500)) + return AST2600_RGMII_KEEP_DELAY; + + return AST2600_RGMII_DIS_DELAY; +} + +static int ftgmac100_check_ast2600_rgmii_delay(struct regmap *scu, + u32 delay_unit, + int mac_id, int dly_reg) +{ + u32 delay_value; + u32 tx_delay; + u32 rx_delay; + int tx_flag; + int rx_flag; + + regmap_read(scu, dly_reg, &delay_value); + if (mac_id =3D=3D 0 || mac_id =3D=3D 2) { + tx_delay =3D FIELD_GET(ASPEED_MAC0_2_TX_DLY, delay_value); + rx_delay =3D FIELD_GET(ASPEED_MAC0_2_RX_DLY, delay_value); + } else { + tx_delay =3D FIELD_GET(ASPEED_MAC1_3_TX_DLY, delay_value); + rx_delay =3D FIELD_GET(ASPEED_MAC1_3_RX_DLY, delay_value); + } + + /* Due to the hardware design reason, for MAC2/3 on AST2600, + * the zero delay ns on RX is configured by setting value 0x1a. + * List as below: + * 0x1a, 0x1b, ... , 0x1f, 0x00, 0x01, ... , 0x19 + * Covert for calculation purpose. + * 0x00, 0x01, ... , 0x19, 0x1a, 0x1b, ... , 0x1f + */ + if (mac_id =3D=3D 2 || mac_id =3D=3D 3) + rx_delay =3D (rx_delay + 0x06) & 0x1f; + + tx_delay *=3D delay_unit; + rx_delay *=3D delay_unit; + + tx_flag =3D ftgmac100_get_ast2600_rgmii_flag(tx_delay); + rx_flag =3D ftgmac100_get_ast2600_rgmii_flag(rx_delay); + + if (tx_flag =3D=3D AST2600_RGMII_KEEP_DELAY || + rx_flag =3D=3D AST2600_RGMII_KEEP_DELAY) { + return AST2600_RGMII_KEEP_DELAY; + } + + return AST2600_RGMII_DIS_DELAY; +} + static int ftgmac100_set_ast2600_rgmii_delay(struct ftgmac100 *priv, - u32 rgmii_tx_delay, - u32 rgmii_rx_delay, - phy_interface_t phy_intf) + s32 rgmii_tx_delay, + s32 rgmii_rx_delay, + phy_interface_t *phy_intf) { struct device *dev =3D priv->dev; struct device_node *np; @@ -1975,13 +2065,59 @@ static int ftgmac100_set_ast2600_rgmii_delay(struct= ftgmac100 *priv, return -EINVAL; } =20 - /* Please refer to ethernet-controller.yaml. */ - if (phy_intf =3D=3D PHY_INTERFACE_MODE_RGMII && - (rgmii_tx_delay =3D=3D 2000 || rgmii_rx_delay =3D=3D 2000)) { - dev_warn(dev, "RX/TX delay cannot set to 2000 on 'rgmii'\n"); - return -EINVAL; + if (of_phy_is_fixed_link(np)) { + if (rgmii_tx_delay < 0 || rgmii_rx_delay < 0) { + dev_err(dev, + "Add rx/tx-internal-delay-ps for fixed-link\n"); + /* Keep original RGMII delay value*/ + return 0; + } + + /* Must have both of rx/tx-internal-delay-ps for fixed-link */ + goto conf_delay; + } + + if (*phy_intf =3D=3D PHY_INTERFACE_MODE_RGMII_RXID || + *phy_intf =3D=3D PHY_INTERFACE_MODE_RGMII_TXID) + goto out_warn; + + /* Both rx/tx-internal-delay-ps are not existed. */ + if (rgmii_tx_delay < 0 && rgmii_rx_delay < 0) { + int flag; + + flag =3D ftgmac100_check_ast2600_rgmii_delay(scu, + rgmii_delay_unit, + mac_id, + dly_reg); + if (flag =3D=3D AST2600_RGMII_KEEP_DELAY) + goto out_warn; + + if (*phy_intf =3D=3D PHY_INTERFACE_MODE_RGMII) { + dev_err(dev, "Update phy-mode to 'rgmii-id'\n"); + /* Forced phy interface to RGMII_ID and MAC will disable + * RGMII delay. + */ + *phy_intf =3D PHY_INTERFACE_MODE_RGMII_ID; + } + } else { + /* Please refer to ethernet-controller.yaml. */ + if (*phy_intf =3D=3D PHY_INTERFACE_MODE_RGMII && + (rgmii_tx_delay =3D=3D 2000 || rgmii_rx_delay =3D=3D 2000)) { + dev_warn(dev, + "RX/TX delay cannot set to 2000 on 'rgmii'\n"); + return -EINVAL; + } } =20 + /* The value is negative, which means the rx/tx-internal-delay-ps + * property is not existed in dts. Therefore, set to default 0. + */ + if (rgmii_tx_delay < 0) + rgmii_tx_delay =3D 0; + if (rgmii_rx_delay < 0) + rgmii_rx_delay =3D 0; + +conf_delay: tx_delay_index =3D DIV_ROUND_CLOSEST(rgmii_tx_delay, rgmii_delay_unit); if (tx_delay_index >=3D 32) { dev_err(dev, "The %u ps of TX delay is out of range\n", @@ -2018,15 +2154,21 @@ static int ftgmac100_set_ast2600_rgmii_delay(struct= ftgmac100 *priv, =20 regmap_update_bits(scu, dly_reg, dly_mask, tx_delay_index | rx_delay_inde= x); =20 + return 0; + +out_warn: + /* Print the warning message. Keep the phy-mode and the RGMII delay value= . */ + dev_warn(dev, "Update phy-mode to 'rgmii-id' and add rx/tx-internal-delay= -ps\n"); + return 0; } =20 -static int ftgmac100_config_rgmii_delay(struct ftgmac100 *priv) +static int ftgmac100_config_rgmii_delay(struct ftgmac100 *priv, + phy_interface_t *phy_intf) { struct device_node *np =3D priv->dev->of_node; - phy_interface_t phy_intf; - u32 rgmii_tx_delay; - u32 rgmii_rx_delay; + s32 rgmii_tx_delay; + s32 rgmii_rx_delay; int err =3D 0; =20 /* Because some old dts using NC-SI mode does not include phy-mode @@ -2036,20 +2178,23 @@ static int ftgmac100_config_rgmii_delay(struct ftgm= ac100 *priv) if (of_get_property(np, "use-ncsi", NULL)) return 0; =20 - err =3D of_get_phy_mode(np, &phy_intf); + err =3D of_get_phy_mode(np, phy_intf); if (err) { dev_err(priv->dev, "Failed to get phy mode: %d\n", err); return err; } =20 /* RMII does not need to configure RGMII delay */ - if (!phy_interface_mode_is_rgmii(phy_intf)) + if (!phy_interface_mode_is_rgmii(*phy_intf)) return 0; =20 + /* AST2600 needs to know if the "tx/rx-internal-delay-ps" properties + * are existed in dts. If not existed, set -1 and delay is equal to 0. + */ if (of_property_read_u32(np, "tx-internal-delay-ps", &rgmii_tx_delay)) - rgmii_tx_delay =3D 0; + rgmii_tx_delay =3D -1; if (of_property_read_u32(np, "rx-internal-delay-ps", &rgmii_rx_delay)) - rgmii_rx_delay =3D 0; + rgmii_rx_delay =3D -1; =20 if (priv->mac_id =3D=3D FTGMAC100_AST2600) err =3D ftgmac100_set_ast2600_rgmii_delay(priv, @@ -2068,10 +2213,13 @@ static int ftgmac100_probe(struct platform_device *= pdev) struct resource *res; int irq; struct net_device *netdev; + phy_interface_t phy_intf; struct ftgmac100 *priv; struct device_node *np; int err =3D 0; =20 + phy_intf =3D PHY_INTERFACE_MODE_NA; + np =3D pdev->dev.of_node; if (np) { match_data =3D of_device_get_match_data(&pdev->dev); @@ -2151,7 +2299,7 @@ static int ftgmac100_probe(struct platform_device *pd= ev) } =20 if (rgmii_delay_conf) { - err =3D ftgmac100_config_rgmii_delay(priv); + err =3D ftgmac100_config_rgmii_delay(priv, &phy_intf); if (err) return err; } @@ -2165,7 +2313,7 @@ static int ftgmac100_probe(struct platform_device *pd= ev) } =20 if (np) { - err =3D ftgmac100_probe_dt(netdev, pdev, priv, np); + err =3D ftgmac100_probe_dt(netdev, pdev, priv, np, phy_intf); if (err) goto err; } diff --git a/drivers/net/ethernet/faraday/ftgmac100.h b/drivers/net/etherne= t/faraday/ftgmac100.h index d19d44d1b8e0..1b2f79a104ea 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.h +++ b/drivers/net/ethernet/faraday/ftgmac100.h @@ -291,4 +291,9 @@ struct ftgmac100_rxdes { #define AST2600_MAC2_BASE_ADDR 0x1e670000 #define AST2600_MAC3_BASE_ADDR 0x1e690000 =20 +/* Keep original delay */ +#define AST2600_RGMII_KEEP_DELAY 0x01 +/* Need to disable delay on MAC side */ +#define AST2600_RGMII_DIS_DELAY 0x02 + #endif /* __FTGMAC100_H */ --=20 2.34.1 From nobody Wed Apr 8 02:30:18 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 536E43AEF53; Mon, 2 Mar 2026 10:24:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447090; cv=none; b=i5hc3aZ72iTxso3H+Ppld5BpYcaOlPNCto46vTunt4LFc9pIOad6ucc77nY7Thtc220rjpXCkEP6/mX3XN6FSiEU9nZsEAfFbwZnyULTST5SBMDUp2KJYhWuof3E+RGYPmAaGLgDmCNFLKkecA4KUB86KDML55R8AVmw6lNMkPM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772447090; c=relaxed/simple; bh=mSTj0/1ebY8L7mt7gTJMaZk9J3MyMEdQcNyTSUI6OwE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=AO4PFpuTjrEG7qtRzYiOSrUY8mrSPRFO0fEQgUSBV5S/5ti9Zyiw42xd310XOYvAJOI05H1G8BHhF8qC3kNPTKIh9Fl8wVJyFDnzJi4INnbG6iNcV5Cyr+LRYPj1/xvuvfpwRLrtsi4BZE3IzpukPuSolIituYLaUAE17/v2Mro= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 2 Mar 2026 18:24:30 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 2 Mar 2026 18:24:30 +0800 From: Jacky Chou Date: Mon, 2 Mar 2026 18:24:32 +0800 Subject: [PATCH net-next v6 5/5] ARM: dts: aspeed: ast2600-evb: Configure RGMII delay for MAC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260302-rgmii_delay_2600-v6-5-68319a4c4110@aspeedtech.com> References: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> In-Reply-To: <20260302-rgmii_delay_2600-v6-0-68319a4c4110@aspeedtech.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Po-Yu Chuang , Joel Stanley , Andrew Jeffery CC: , , , , , , Jacky Chou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772447070; l=1846; i=jacky_chou@aspeedtech.com; s=20251031; h=from:subject:message-id; bh=mSTj0/1ebY8L7mt7gTJMaZk9J3MyMEdQcNyTSUI6OwE=; b=5fzmv3bsgeb2/RQViDqnCtMOTTx6t3KTiHO1+AoPpZJLdthznMTUVInVZgZpZHoimVgMVO/Ca t+4evIfn0Q2DOJiX+nJBH6rdMAyJo0hfb2mFFnCByKyM59DRd5+oO5e X-Developer-Key: i=jacky_chou@aspeedtech.com; a=ed25519; pk=8XBx7KFM1drEsfCXTH9QC2lbMlGU4XwJTA6Jt9Mabdo= This change sets the rx-internal-delay-ps and tx-internal-delay-ps properties to control the RGMII signal delay. The phy-mode for MAC0=E2=80=93MAC3 is updated to "rgmii-id" to enable TX/RX internal delay on the PHY and disable the corresponding delay on the MAC. Signed-off-by: Jacky Chou --- arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts b/arch/arm/boo= t/dts/aspeed/aspeed-ast2600-evb.dts index 3f2ca9da0be2..a2a1c1dbb830 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts @@ -123,42 +123,54 @@ ethphy3: ethernet-phy@0 { &mac0 { status =3D "okay"; =20 - phy-mode =3D "rgmii-rxid"; + phy-mode =3D "rgmii-id"; phy-handle =3D <ðphy0>; =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii1_default>; + + rx-internal-delay-ps =3D <0>; + tx-internal-delay-ps =3D <0>; }; =20 =20 &mac1 { status =3D "okay"; =20 - phy-mode =3D "rgmii-rxid"; + phy-mode =3D "rgmii-id"; phy-handle =3D <ðphy1>; =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii2_default>; + + rx-internal-delay-ps =3D <0>; + tx-internal-delay-ps =3D <0>; }; =20 &mac2 { status =3D "okay"; =20 - phy-mode =3D "rgmii"; + phy-mode =3D "rgmii-id"; phy-handle =3D <ðphy2>; =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii3_default>; + + rx-internal-delay-ps =3D <0>; + tx-internal-delay-ps =3D <0>; }; =20 &mac3 { status =3D "okay"; =20 - phy-mode =3D "rgmii"; + phy-mode =3D "rgmii-id"; phy-handle =3D <ðphy3>; =20 pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_rgmii4_default>; + + rx-internal-delay-ps =3D <0>; + tx-internal-delay-ps =3D <0>; }; =20 &emmc_controller { --=20 2.34.1