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Mon, 02 Mar 2026 02:49:38 -0800 (PST) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8273a054b49sm12225956b3a.53.2026.03.02.02.49.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Mar 2026 02:49:38 -0800 (PST) From: Abhinaba Rakshit Date: Mon, 02 Mar 2026 16:19:13 +0530 Subject: [PATCH v7 1/3] soc: qcom: ice: Add OPP-based clock scaling support for ICE Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260302-enable-ufs-ice-clock-scaling-v7-1-669b96ecadd8@oss.qualcomm.com> References: <20260302-enable-ufs-ice-clock-scaling-v7-0-669b96ecadd8@oss.qualcomm.com> In-Reply-To: <20260302-enable-ufs-ice-clock-scaling-v7-0-669b96ecadd8@oss.qualcomm.com> To: Herbert Xu , "David S. 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Introduce clock scaling API qcom_ice_scale_clk which scale ICE core clock based on the target frequency provided and if a valid OPP-table is registered. Use round_ceil passed to decide on the rounding of the clock freq against OPP-table. Disable clock scaling if OPP-table is not registered. When an ICE-device specific OPP table is available, use the PM OPP framework to manage frequency scaling and maintain proper power-domain constraints. Also, ensure to drop the votes in suspend to prevent power/thermal retention. Subsequently restore the frequency in resume from core_clk_freq which stores the last ICE core clock operating frequency. Signed-off-by: Abhinaba Rakshit --- drivers/soc/qcom/ice.c | 82 ++++++++++++++++++++++++++++++++++++++++++++++= ++-- include/soc/qcom/ice.h | 2 ++ 2 files changed, 81 insertions(+), 3 deletions(-) diff --git a/drivers/soc/qcom/ice.c b/drivers/soc/qcom/ice.c index b203bc685cadd21d6f96eb1799963a13db4b2b72..7976a18d9a4cda1ad6b62b66ce0= 11e244d0f6856 100644 --- a/drivers/soc/qcom/ice.c +++ b/drivers/soc/qcom/ice.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 #include =20 @@ -111,6 +112,8 @@ struct qcom_ice { bool use_hwkm; bool hwkm_init_complete; u8 hwkm_version; + unsigned long core_clk_freq; + bool has_opp; }; =20 static bool qcom_ice_check_supported(struct qcom_ice *ice) @@ -310,6 +313,10 @@ int qcom_ice_resume(struct qcom_ice *ice) struct device *dev =3D ice->dev; int err; =20 + /* Restore the ICE core clk freq */ + if (ice->has_opp && ice->core_clk_freq) + dev_pm_opp_set_rate(ice->dev, ice->core_clk_freq); + err =3D clk_prepare_enable(ice->core_clk); if (err) { dev_err(dev, "failed to enable core clock (%d)\n", @@ -324,6 +331,11 @@ EXPORT_SYMBOL_GPL(qcom_ice_resume); int qcom_ice_suspend(struct qcom_ice *ice) { clk_disable_unprepare(ice->core_clk); + + /* Drop the clock votes while suspend */ + if (ice->has_opp) + dev_pm_opp_set_rate(ice->dev, 0); + ice->hwkm_init_complete =3D false; =20 return 0; @@ -549,10 +561,54 @@ int qcom_ice_import_key(struct qcom_ice *ice, } EXPORT_SYMBOL_GPL(qcom_ice_import_key); =20 +/** + * qcom_ice_scale_clk() - Scale ICE clock for DVFS-aware operations + * @ice: ICE driver data + * @target_freq: requested frequency in Hz + * @round_ceil: when true, selects nearest freq >=3D @target_freq; + * otherwise, selects nearest freq <=3D @target_freq + * + * Selects an OPP frequency based on @target_freq and the rounding directi= on + * specified by @round_ceil, then programs it using dev_pm_opp_set_rate(), + * including any voltage or power-domain transitions handled by the OPP + * framework. Updates ice->core_clk_freq on success. + * + * Return: 0 on success; -EOPNOTSUPP if no OPP table; -EINVAL in-case of + * incorrect flags; or error from dev_pm_opp_set_rate()/OPP lookup. + */ +int qcom_ice_scale_clk(struct qcom_ice *ice, unsigned long target_freq, + bool round_ceil) +{ + unsigned long ice_freq =3D target_freq; + struct dev_pm_opp *opp; + int ret; + + if (!ice->has_opp) + return -EOPNOTSUPP; + + if (round_ceil) + opp =3D dev_pm_opp_find_freq_ceil(ice->dev, &ice_freq); + else + opp =3D dev_pm_opp_find_freq_floor(ice->dev, &ice_freq); + + if (IS_ERR(opp)) + return PTR_ERR(opp); + dev_pm_opp_put(opp); + + ret =3D dev_pm_opp_set_rate(ice->dev, ice_freq); + if (!ret) + ice->core_clk_freq =3D ice_freq; + + return ret; +} +EXPORT_SYMBOL_GPL(qcom_ice_scale_clk); + static struct qcom_ice *qcom_ice_create(struct device *dev, - void __iomem *base) + void __iomem *base, + bool is_legacy_binding) { struct qcom_ice *engine; + int err; =20 if (!qcom_scm_is_available()) return ERR_PTR(-EPROBE_DEFER); @@ -584,6 +640,26 @@ static struct qcom_ice *qcom_ice_create(struct device = *dev, if (IS_ERR(engine->core_clk)) return ERR_CAST(engine->core_clk); =20 + /* + * Register the OPP table only when ICE is described as a standalone + * device node. Older platforms place ICE inside the storage controller + * node, so they don't need an OPP table here, as they are handled in + * storage controller. + */ + if (!is_legacy_binding) { + /* OPP table is optional */ + err =3D devm_pm_opp_of_add_table(dev); + if (err && err !=3D -ENODEV) { + dev_err(dev, "Invalid OPP table in Device tree\n"); + return ERR_PTR(err); + } + engine->has_opp =3D (err =3D=3D 0); + + if (!engine->has_opp) + dev_info(dev, "ICE OPP table is not registered, please update your DT\n= "); + } + + engine->core_clk_freq =3D clk_get_rate(engine->core_clk); if (!qcom_ice_check_supported(engine)) return ERR_PTR(-EOPNOTSUPP); =20 @@ -628,7 +704,7 @@ static struct qcom_ice *of_qcom_ice_get(struct device *= dev) return ERR_CAST(base); =20 /* create ICE instance using consumer dev */ - return qcom_ice_create(&pdev->dev, base); + return qcom_ice_create(&pdev->dev, base, true); } =20 /* @@ -725,7 +801,7 @@ static int qcom_ice_probe(struct platform_device *pdev) return PTR_ERR(base); } =20 - engine =3D qcom_ice_create(&pdev->dev, base); + engine =3D qcom_ice_create(&pdev->dev, base, false); if (IS_ERR(engine)) return PTR_ERR(engine); =20 diff --git a/include/soc/qcom/ice.h b/include/soc/qcom/ice.h index 4bee553f0a59d86ec6ce20f7c7b4bce28a706415..4eb58a264d416e71228ed4b13e7= f53c549261fdc 100644 --- a/include/soc/qcom/ice.h +++ b/include/soc/qcom/ice.h @@ -30,5 +30,7 @@ int qcom_ice_import_key(struct qcom_ice *ice, const u8 *raw_key, size_t raw_key_size, u8 lt_key[BLK_CRYPTO_MAX_HW_WRAPPED_KEY_SIZE]); struct qcom_ice *devm_of_qcom_ice_get(struct device *dev); +int qcom_ice_scale_clk(struct qcom_ice *ice, unsigned long target_freq, + bool round_ceil); =20 #endif /* __QCOM_ICE_H__ */ --=20 2.34.1