From nobody Thu Apr 16 08:57:14 2026 Received: from out-185.mta0.migadu.com (out-185.mta0.migadu.com [91.218.175.185]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E795D239E80 for ; Sat, 28 Feb 2026 20:47:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.185 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311644; cv=none; b=gFEfw1doq3Mw1QIoYs+E5SwvSlogdyk1UbjfYb07ZrH2f4s9/MhHDyfOZ/Z50fE0bO8Cc17gpjZvu97jOvqrQ8h7zD/puLHpc4xa7EVk0/gFHVb4aYtcH7sad5ZCdybzkbB06XD9ohLqut1q0rEXyGlPGh56uMKS7g+VHwD1flk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311644; c=relaxed/simple; bh=q2B2Ljgs5Ws079qJ03QnY0pPOMhYQcO46xILryodcrg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bZU8EU1zAsRD3VOh9M50gdsTygXqHpHl0Q4qrWjU/q9K7eKpRBmXDJ2ZJWhwHBjg4fU43ilBHYqMS5q2/7Atve2MKkh1mFFb6OeISjBB2VDjhAIuVVImVrJjLXbypDdkwm/q5G1EtBSuuPu4JdDD++mY6atMBBWbcKfQn5dI8pw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=NBK2DHWQ; arc=none smtp.client-ip=91.218.175.185 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="NBK2DHWQ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1772311639; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=fZ4YCYZelX6xrgCcTEYuiYxr56vs8RNwPeKvzB3MVZM=; b=NBK2DHWQWSYe0nAGnvxSHCMvur5X+VTXIVhTLbIL8H0awrd1rKSBub5hQOdsQCq7QRlC78 iN2H8Szoh6ccacMOYeOfYEwWbXTnR3enb/faANe5Xl6wTUavzLJk1+wKbl93+BMh1BkeUf VzYgN1yd/x15/UdIkIDsQF+HCntqPTlXPbnfOWZR0HI/5jzov+4ANRBuj7iG2ZIsFc/RIR NWHQTOtO6LT0HsTGQI8xfW/E8vVEwmZ/V4XPHd04HMVowTMO5do0sN/T9jWTQ+1jILTfAi AZj+i0P9DaXAYTbVUmNITPYSXmSEwxvlvrDZwUQ0Gn0hdrv689b1IziXTAcGHw== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Adam Skladowski Cc: Val Packett , linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/6] dt-bindings: clock: qcom,sm6115-dispcc: Define MDSS resets Date: Sat, 28 Feb 2026 17:41:27 -0300 Message-ID: <20260228204638.11705-2-val@packett.cool> In-Reply-To: <20260228204638.11705-1-val@packett.cool> References: <20260228204638.11705-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add the missing defines for MDSS resets, which are necessary to reset the display subsystem in order to avoid issues caused by state left over from the bootloader. While here, align comment style with other SoCs. Fixes: 38557c6fc077 ("dt-bindings: clock: add QCOM SM6115 display clock bin= dings") Signed-off-by: Val Packett Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/qcom,sm6115-dispcc.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/dt-bindings/clock/qcom,sm6115-dispcc.h b/include/dt-bi= ndings/clock/qcom,sm6115-dispcc.h index d1a6c45b5029..ab8d312ade37 100644 --- a/include/dt-bindings/clock/qcom,sm6115-dispcc.h +++ b/include/dt-bindings/clock/qcom,sm6115-dispcc.h @@ -6,7 +6,7 @@ #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6115_H =20 -/* DISP_CC clocks */ +/* Clocks */ #define DISP_CC_PLL0 0 #define DISP_CC_PLL0_OUT_MAIN 1 #define DISP_CC_MDSS_AHB_CLK 2 @@ -30,7 +30,10 @@ #define DISP_CC_SLEEP_CLK 20 #define DISP_CC_SLEEP_CLK_SRC 21 =20 -/* DISP_CC GDSCR */ +/* Resets */ +#define DISP_CC_MDSS_CORE_BCR 0 + +/* GDSCs */ #define MDSS_GDSC 0 =20 #endif --=20 2.52.0 From nobody Thu Apr 16 08:57:14 2026 Received: from out-177.mta0.migadu.com (out-177.mta0.migadu.com [91.218.175.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C66EC2F1FEC for ; Sat, 28 Feb 2026 20:47:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311649; cv=none; b=oqLvefzOdPGRh+05W7R8N/fIzUsFS8hS8JAA0yLUocPrB9kmEK6ecMmNW298p8pdUmNiAD59ma9owgolMflfqelT5SWgJkn/kZlp1QnTSR9Ec6XqURDJH/QhV7mLQi+XhWdI8kh0qaoWmLq3JqOP44sOpqCUUfgEpE2s28sOU9Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311649; c=relaxed/simple; bh=XUGN+GnOejal3C8oiuZa9mM7ZV/xkp7Jj6M5/UwS7M4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K8AzyaMKo/g6CZHnfpaIBI4tdcrsqi74sqaFypi9EWjPk5MCjXh/kzDbH3KuOAXL1IrDa3UsjhWZj/7SDH89DvocHBRUt3ebPuXr2peM9wlCyHlBMOw/j17Lo8zp/SJqKudvmt5NPkHxhWcpSOvafY0MB7lwzT6vxST2KdIop6k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=p0kA8oKH; arc=none smtp.client-ip=91.218.175.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="p0kA8oKH" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1772311645; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GjzkTi2eTl1DSbdR7B9YM2t9btgxa+XI7HMUFcZbvJ8=; b=p0kA8oKHfIvc3UHi9pPildv1J/1dXlYpiJdj1JSxwmhNB+YLHPu69PbJNLW9GCV5LqJKY2 dUtlV1prEWtrak8ucrD3gDkkoxRfHadowT5U04JPSb84Bckk08upj54jMbRyYcFNdrbdy+ xoSKBn+hTUAtPUXcekid2x3Y191E0PFiQZjTmAQoVkauSe3j6DLBa/THamEQCbBgk9JEW/ GtC2nm3ps67XqvbKoJO3NAQ0Hr8Aw0UMzoOOoxkb4hUuHA6YazBSwg8ko96f7Nw9f4R2v2 DyJ15/Jh90rKqghJrg73spOLpNMqE3olmHZwDpqb2TclVGut2goD8ksXSNV4uw== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Rob Herring , Conor Dooley , Adam Skladowski , Martin Botka , Marijn Suijten Cc: Val Packett , linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 2/6] dt-bindings: clock: qcom,dispcc-sm6125: Define MDSS resets Date: Sat, 28 Feb 2026 17:41:28 -0300 Message-ID: <20260228204638.11705-3-val@packett.cool> In-Reply-To: <20260228204638.11705-1-val@packett.cool> References: <20260228204638.11705-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add the missing defines for MDSS resets, which are necessary to reset the display subsystem in order to avoid issues caused by state left over from the bootloader. While here, align comment style with other SoCs. Fixes: 8397c9c0c26b ("dt-bindings: clock: add QCOM SM6125 display clock bin= dings") Signed-off-by: Val Packett Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/qcom,dispcc-sm6125.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/qcom,dispcc-sm6125.h b/include/dt-bi= ndings/clock/qcom,dispcc-sm6125.h index 4ff974f4fcc3..f58b85d2c814 100644 --- a/include/dt-bindings/clock/qcom,dispcc-sm6125.h +++ b/include/dt-bindings/clock/qcom,dispcc-sm6125.h @@ -6,6 +6,7 @@ #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H =20 +/* Clocks */ #define DISP_CC_PLL0 0 #define DISP_CC_MDSS_AHB_CLK 1 #define DISP_CC_MDSS_AHB_CLK_SRC 2 @@ -35,7 +36,10 @@ #define DISP_CC_MDSS_VSYNC_CLK_SRC 26 #define DISP_CC_XO_CLK 27 =20 -/* DISP_CC GDSCR */ +/* Resets */ +#define DISP_CC_MDSS_CORE_BCR 0 + +/* GDSCs */ #define MDSS_GDSC 0 =20 #endif --=20 2.52.0 From nobody Thu Apr 16 08:57:14 2026 Received: from out-186.mta0.migadu.com (out-186.mta0.migadu.com [91.218.175.186]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1A7130BB85 for ; Sat, 28 Feb 2026 20:47:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.186 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311654; cv=none; b=ds0LDFWk6zu1UKsxpaIrj5eslNfUz6AZOEAlxwCjhm77Qt5ukiV3EoCcYsadX9y1+SwHedO9FiV/TTwmyLfk01VMr6yDXkKmXfw2NIWYkZkF9uKNv7rx0UIAWJellE1L1K7Q1cwBHMbciJ+KfdRYoxLX/S3Mt1wEGQMGBfz48EM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311654; c=relaxed/simple; bh=n6Kysv3y+Bh7w5m/Mx9pi9ekuHYd4YNBA/XVZLCnfd8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=V8HQNHFn3/Zd2UqDaZSgeIoSKYeTtF4neYYaePGjd5udwNIzSkdKbznDzIJuex8HIMnH3qlQ0ln3rvOAF1G1kKZM/YxGN34//PBDeHtTN22YiTc1Mv2lVnhWFNKXJXOlXte/gcIBxN0cZIBDLTchB//vahn/+2TAuZsy1j4QmnA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=SDl2zt+6; arc=none smtp.client-ip=91.218.175.186 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="SDl2zt+6" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1772311651; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VsrcVA9q15mmQyK3nCK8woc/QzSwfJr7l6sf3pEqHBk=; b=SDl2zt+6Ys7QxNZD+Kix0iZMkrhi38ST8yPZ6XM07Z7Q2QvfHO23W09XvLIO0H0/oE4oOp gFaSDfSThWUbCkA3IJm9voIoCtRg82EOABmGUr4IltRjj7iVaVLbfguxjLKvVe44yxUlo3 bo+VWXADJ0TPo6eY6/txXIIh85zO+eH0mjHxB82WfxKwwT77yCpnD/uDh0WwZr5qzAdlFn VcwshOgTlsIfoDsmcHaMWLo/SB6Hne9FACWt91D/aQ+KHNhZbMgZhvY53qhWRfQB3tjwQb IVfWv0owP14AYqhY70HGR7N/2/7QQqOyfhDcROipgDB7ndIyg+EPUxVjYbDWSg== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Adam Skladowski Cc: Val Packett , linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov , Konrad Dybcio Subject: [PATCH v2 3/6] clk: qcom: dispcc-sm6115: Add missing MDSS resets Date: Sat, 28 Feb 2026 17:41:29 -0300 Message-ID: <20260228204638.11705-4-val@packett.cool> In-Reply-To: <20260228204638.11705-1-val@packett.cool> References: <20260228204638.11705-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The MDSS resets were left undescribed. Add them to allow resetting the display subsystem, which is necessary to avoid issues caused by state left over from the bootloader on various platforms. Fixes: 9b518788631c ("clk: qcom: Add display clock controller driver for SM= 6115") Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Val Packett --- drivers/clk/qcom/dispcc-sm6115.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sm6115.c b/drivers/clk/qcom/dispcc-sm6= 115.c index 8ae25d51db94..75bd57213079 100644 --- a/drivers/clk/qcom/dispcc-sm6115.c +++ b/drivers/clk/qcom/dispcc-sm6115.c @@ -22,6 +22,7 @@ #include "clk-regmap-divider.h" #include "common.h" #include "gdsc.h" +#include "reset.h" =20 enum { DT_BI_TCXO, @@ -511,6 +512,10 @@ static struct clk_branch disp_cc_sleep_clk =3D { }, }; =20 +static const struct qcom_reset_map disp_cc_sm6115_resets[] =3D { + [DISP_CC_MDSS_CORE_BCR] =3D { 0x2000 }, +}; + static struct gdsc mdss_gdsc =3D { .gdscr =3D 0x3000, .pd =3D { @@ -561,6 +566,8 @@ static const struct qcom_cc_desc disp_cc_sm6115_desc = =3D { .config =3D &disp_cc_sm6115_regmap_config, .clks =3D disp_cc_sm6115_clocks, .num_clks =3D ARRAY_SIZE(disp_cc_sm6115_clocks), + .resets =3D disp_cc_sm6115_resets, + .num_resets =3D ARRAY_SIZE(disp_cc_sm6115_resets), .gdscs =3D disp_cc_sm6115_gdscs, .num_gdscs =3D ARRAY_SIZE(disp_cc_sm6115_gdscs), }; --=20 2.52.0 From nobody Thu Apr 16 08:57:14 2026 Received: from out-186.mta0.migadu.com (out-186.mta0.migadu.com [91.218.175.186]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC4603002D1 for ; Sat, 28 Feb 2026 20:47:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.186 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311660; cv=none; b=myM+Dre3CojeSqlI2lwGKNVGvMiQ2Y+BVzS8unoddw2R6b3wPEvbvz6vJPqHnCubVl9kSs8GJItzJQO6AGukgVQT9xAISemkc/kckuDTxWfv7WQsduxs1TgoMgKqfxfin7E7FFjYoB6ERTPfeNxnLImnj2ha5wjga6tKDNaWUb4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311660; c=relaxed/simple; bh=dcQi2nbUZD1i0Tnlv+ymMpJgvfb8tkQT2XZ6lA9C2Mo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=prG8rTtzBvtilfRMtek16ep/67xVLWc5YTjKJ0QTuQoTSNqqUHqaUHTWcK3I3CQQVuDoZCOTSGB7+C7gOTqF2UxopSoCiOFwiucvKE2CGoWSGV89ku1oRQfe3sgoBO6kXWPfqgDlAI99EEqd8VRrYkI1+5EU+ZO0o0K6h0qKnP4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=rykXTcqZ; arc=none smtp.client-ip=91.218.175.186 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="rykXTcqZ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1772311657; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pSQbyc3KzSWaX/5WfKEJcewBM7+uUPCiSw58qLGCf1k=; b=rykXTcqZZQG9Btdc+M4B66oUchPQJ8QsB1YWj/yAHqYSs4/Sj0O103u7vs9FOHfTU4bqCz XEQi7mOs7v3kLGGCClzIaOdny38LyihyS9ChdCc6mL66H/PgIup+PfiQG22U76mK/GIib5 CaSZpeCz6R9IIwH0xRZcxOt7ZmpaAfNsLeZ8PeC1V02JRDDnYLsOohIcqTOgS939Be8fKg 94udtyeyVme/YIL5oHzHqVBawfDHA9OJdC6zKxLc/JeX4abIgIUCKKssMreiPmL3ILt3Uw IYCCFNV3DoSCdYUfMIlKHpSTH/iUgXnMjkd/j/v9yyqijKhDn5TzrhWG/2/kxA== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Adam Skladowski , Martin Botka , AngeloGioacchino Del Regno , Marijn Suijten Cc: Val Packett , linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov , Konrad Dybcio Subject: [PATCH v2 4/6] clk: qcom: dispcc-sm6125: Add missing MDSS resets Date: Sat, 28 Feb 2026 17:41:30 -0300 Message-ID: <20260228204638.11705-5-val@packett.cool> In-Reply-To: <20260228204638.11705-1-val@packett.cool> References: <20260228204638.11705-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The MDSS resets were left undescribed. Add them to allow resetting the display subsystem, which is necessary to avoid issues caused by state left over from the bootloader on various platforms. Fixes: 6e87c8f07407 ("clk: qcom: Add display clock controller driver for SM= 6125") Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Val Packett --- drivers/clk/qcom/dispcc-sm6125.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sm6125.c b/drivers/clk/qcom/dispcc-sm6= 125.c index 851d38a487d3..2c67abcfef12 100644 --- a/drivers/clk/qcom/dispcc-sm6125.c +++ b/drivers/clk/qcom/dispcc-sm6125.c @@ -17,6 +17,7 @@ #include "clk-regmap.h" #include "common.h" #include "gdsc.h" +#include "reset.h" =20 enum { P_BI_TCXO, @@ -607,6 +608,10 @@ static struct clk_branch disp_cc_xo_clk =3D { }, }; =20 +static const struct qcom_reset_map disp_cc_sm6125_resets[] =3D { + [DISP_CC_MDSS_CORE_BCR] =3D { 0x2000 }, +}; + static struct gdsc mdss_gdsc =3D { .gdscr =3D 0x3000, .pd =3D { @@ -663,6 +668,8 @@ static const struct qcom_cc_desc disp_cc_sm6125_desc = =3D { .config =3D &disp_cc_sm6125_regmap_config, .clks =3D disp_cc_sm6125_clocks, .num_clks =3D ARRAY_SIZE(disp_cc_sm6125_clocks), + .resets =3D disp_cc_sm6125_resets, + .num_resets =3D ARRAY_SIZE(disp_cc_sm6125_resets), .gdscs =3D disp_cc_sm6125_gdscs, .num_gdscs =3D ARRAY_SIZE(disp_cc_sm6125_gdscs), }; --=20 2.52.0 From nobody Thu Apr 16 08:57:14 2026 Received: from out-184.mta0.migadu.com (out-184.mta0.migadu.com [91.218.175.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2910A3019A6 for ; Sat, 28 Feb 2026 20:47:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311665; cv=none; b=VtBXSrAIuDlWgh7S18w7dhD9QDmSMB3ujqdfZm7KIk5FAA1KLGSFsBFcfnveELKR9p25WCqusN/b/0eoi0fb9zJV3AsQDNhWdpUDj4iIbiJT2VI5FDuL2k7J1yLPr99ODxmpxDO3LyUfEOJP1r86QwqfyBybCW3iARxoItG1DHE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311665; c=relaxed/simple; bh=6XdLF9JTJRWCKGHMMMV7qKvxDe5yc3EsPTrCvvgF8cc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X5M3vAb6JsA3zygOQ3+fQ/SyzDJQHcSKrTGMlRVeLzYhA5+UkNx0sJby0MY09xvJHK/cS+PI9ztj90kM9BHGnv97PcGfKI2RY+I6pAHp71oT8DoiCG2IE/9uaZwXwFpXIKmHKTefvDzVHRWlzmX+BBj17ifteHzhdo7ZyS3byHc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=Vb0z5Y6K; arc=none smtp.client-ip=91.218.175.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="Vb0z5Y6K" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1772311662; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0i1+OkKQaK2cithGqyj/94PMbbQBAN7UMU6yAQl/SDo=; b=Vb0z5Y6KHkj0Jq4zsLTbkk45Dvg6la7YRbRCByaMs9P91C+fnnNRxC6neaW7pMZxDbbrN2 sCtOD4OMd/7djQkwtPWEU2HZwIksH54xc9nh9vH9cPsWWNb4SVDUT+QRQsV/9NEJYvPPKW FXwjhgH/j9yHvyPpWrg4a+S2l5U8F8WWG9WoMtEumr9JIQc8RAAoGY83/iTRbl0aqZ5sDJ G/HLiK802JbJHAxgRGEcfniWSiZbyutNyWMxBzp+ubAg1ttAGAz7wxCFlvaEcQP5aN0VDz O4qa5Bc5hIdqyB7ESq1FTSVVYNin4XqejzmsSZHYlUl4+io2FOhMPAVSKxe++w== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Adam Skladowski Cc: Val Packett , linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov , Konrad Dybcio Subject: [PATCH v2 5/6] arm64: dts: qcom: sm6115: Add missing MDSS core reset Date: Sat, 28 Feb 2026 17:41:31 -0300 Message-ID: <20260228204638.11705-6-val@packett.cool> In-Reply-To: <20260228204638.11705-1-val@packett.cool> References: <20260228204638.11705-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" To make sure the display subsystem starts in a predictable state, we need to reset it. Otherwise, unpredictable issues can happen, e.g. on the motorola-guamp smartphone DSI would not transmit anything. Wire up the reset to fix. Fixes: 705e50427d81 ("arm64: dts: qcom: sm6115: Add mdss/dpu node") Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Val Packett --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qco= m/sm6115.dtsi index e9336adbc391..3a9a1ad8d581 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1864,6 +1864,8 @@ mdss: display-subsystem@5e00000 { <&gcc GCC_DISP_HF_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>; =20 + resets =3D <&dispcc DISP_CC_MDSS_CORE_BCR>; + interrupts =3D ; interrupt-controller; #interrupt-cells =3D <1>; --=20 2.52.0 From nobody Thu Apr 16 08:57:14 2026 Received: from out-172.mta0.migadu.com (out-172.mta0.migadu.com [91.218.175.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 413BD239E80 for ; Sat, 28 Feb 2026 20:47:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311671; cv=none; b=lnL+qJ5E6rzrgrZO8xN1+HqZuR8qrz8vHAQ4cK20L/+c7vGJDVWXzDuK1lZFcvskRqVu961OSDD4TJpITtrBMszCFD/cs4WEQ2r8HdnIbXWHxBqTBeOTEVYVce/cHmjFyRoi/RISn7tIKRv+lsVZJ5ZThoXlM9d66tKRtHTUab0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772311671; c=relaxed/simple; bh=vN79aVq15KJmINuT84+yvI/rNP53bO1GbNxLL6+n1X4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ii3mARjwD0MW2S4YDqS9yHpZKRai8WUOYUbVuS2S8G4F6BrlDmW0/IBSbHGsAcESpgS2JrrS2PUsQO6OJV7KLm9TJgHvAU2YT8fGIhb6YpidDIUxMW4xgQcDYD2M29Ih4+z9pbe7ugKpcRTo7RvHj7ka25lBzOSzJBw926++sQs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=Icwlohg0; arc=none smtp.client-ip=91.218.175.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="Icwlohg0" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1772311667; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RG3ZEWSeGQFYP6X+wKEUzoO+lwsoqVPpKdpIj2KNtZg=; b=Icwlohg0Z17tmo7s/HYVjyK+RfW6dGxe5tDSC9i+9ENJBpTt/nPaSjriHhFcf2WQv8pbr9 7OoydCwIcgMRFw9/Ga5h7cIVY+qWLRGjOdWPqghYqEiCGgI52qVdOSA+/jUZ5GQ4VBYT1S o9vdyF2j0NWekwY3A0trkI9+1/rHWdP3nog643kVTRUxp6uP8+hgBEOetsyCeX3V0PpQk4 4Dd0m4KTbdMwAKj6PLYzaYrhCRD9OHH64lWtRbqwBEOJKv0el8T3KpDpdpvptFCsc4FcIZ /cNQpvZ34SvclVDfzUFQFNPSSiOCzoAqEBXOysrXNb2fwbADbLkIuUxIZvs+WQ== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Adam Skladowski , Dmitry Baryshkov , Marijn Suijten Cc: Val Packett , linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov , Konrad Dybcio , Yedaya Katsman Subject: [PATCH v2 6/6] arm64: dts: qcom: sm6125: Add missing MDSS core reset Date: Sat, 28 Feb 2026 17:41:32 -0300 Message-ID: <20260228204638.11705-7-val@packett.cool> In-Reply-To: <20260228204638.11705-1-val@packett.cool> References: <20260228204638.11705-1-val@packett.cool> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" To make sure the display subsystem starts in a predictable state, we need to reset it. Otherwise, unpredictable issues can happen, e.g. on the xiaomi-laurel-sprout smartphone DSI would not work on boot. Wire up the reset to fix. Fixes: 0865d23a0226 ("arm64: dts: qcom: sm6125: Add display hardware nodes") Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Tested-by: Yedaya Katsman Signed-off-by: Val Packett --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qco= m/sm6125.dtsi index 80c42dff5399..a22374e5a17f 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -1238,6 +1238,8 @@ mdss: display-subsystem@5e00000 { "ahb", "core"; =20 + resets =3D <&dispcc DISP_CC_MDSS_CORE_BCR>; + power-domains =3D <&dispcc MDSS_GDSC>; =20 iommus =3D <&apps_smmu 0x400 0x0>; @@ -1437,6 +1439,7 @@ dispcc: clock-controller@5f00000 { power-domains =3D <&rpmpd RPMPD_VDDCX>; =20 #clock-cells =3D <1>; + #reset-cells =3D <1>; #power-domain-cells =3D <1>; }; =20 --=20 2.52.0