From nobody Sat Apr 18 12:54:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0108396D2C; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772265411; cv=none; b=YYA/NEt/kY1BuZNFrXK7Gmm8ormVpUgsZqcrEprMRj0i7umWYtwac6+mg9gyehcPg9GjGJ8pg7f+tkGc4whwvVrHCzBqQJ1DaMToA05Zlld63HNDfiAUzicgkI5/eLmuHvzPJOUXeQKsC94aLq5bBSoqxomAuqNKUwI+Wm/yL/Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772265411; c=relaxed/simple; bh=dmYhvJWltKPlnfSCZp2xF0fuBjC8r/ExyToKNbYqzIg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sOjruwwWUz58i3nPWu3u3zHar/3FZgb1Tj+u7TVCVbzmJspjl0I34GJPE1CsfpkYTCujFG2K1AmMAkSBni0jf7pQMTXD0rr36DWgnIJgoK3Qr3U55y9V4U7wMDDrZWGHRDyqaFPsHUwQx2/MReZVCiiPZ+a7M2tEssxkZ/XHW+s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XXyzPTHO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XXyzPTHO" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6F80BC19423; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772265411; bh=dmYhvJWltKPlnfSCZp2xF0fuBjC8r/ExyToKNbYqzIg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=XXyzPTHOownWQBjTi3ljJh1ILOyelEDhNCgQcUU6UDsu+maFjbeygq9zqJp1YIDEg bw1DN/CqUOAiai0rE1kGBiREzjmyB5Rsru0EUdYni7oayIeTXAeaKE3ZeY/tYe2Feg wIiW5Yl3q/C5tEtd4QRXZKtqV3yrTU7TF9bL4YiDiyTiy60E0Wr0BMJhEW76Lq5s10 YYMMCz88zeGCSplEHPPnzHU1nBBaJNpncjUvsAMXkfdEXKP9R3V4F7Fly6sfGpqIgZ /xYjxo/e5VLkbfZp9WQkfiYBqy/7/d8L6i1WDEfxS5IfxndaaGLIf07gbmaFrvaXO8 kdn9SVw3WBYEQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F1ADFEE4CD; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Sat, 28 Feb 2026 07:56:14 +0000 Subject: [PATCH v2 1/3] dt-bindings: arm: amlogic: add A311Y3 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260228-a9-baisc-dts-v2-1-47489d5cc1a8@amlogic.com> References: <20260228-a9-baisc-dts-v2-0-47489d5cc1a8@amlogic.com> In-Reply-To: <20260228-a9-baisc-dts-v2-0-47489d5cc1a8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772265409; l=1053; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=SsR9Sz9BWoMX3UnJeit5aTZNxRC651zrkqb0PjHBQcE=; b=k08vJ2okoMYlC+VuCctfB+kZ0JSYV4iwtRbRQFEyaS95ke3jOVuYpXYOqEZqJATMHxtJFju5J q5h+x/uY+KEAZZZpsxZHV0ui25r6INX4CzHLy6OVrvyoov1fhexElTe X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add bindings for the Amlogic BY401 board, using A311Y3 Soc from Amlogic A9 family chip. Reviewed-by: Martin Blumenstingl Acked-by: Krzysztof Kozlowski Signed-off-by: Xianwei Zhao --- Documentation/devicetree/bindings/arm/amlogic.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documenta= tion/devicetree/bindings/arm/amlogic.yaml index a885278bc4e2..9f73a0054fb2 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -234,6 +234,12 @@ properties: - amlogic,av400 - const: amlogic,a5 =20 + - description: Boards with the Amlogic A9 A311Y3 SoC + items: + - enum: + - amlogic,by401 + - const: amlogic,a9 + - description: Boards with the Amlogic C3 C302X/C308L SoC items: - enum: --=20 2.52.0 From nobody Sat Apr 18 12:54:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D005C396D28; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772265411; cv=none; b=g6/I9JnDoEsiZgPB1rJ6Ke1lduXxNu7xrJFGIC6ZQCcE6qSg7HCIwb0zDUt1CjDY0Bc1CdTUOTVD1EX2vSqctUG1CIDTVvZRYBkn0LQGYzDjNj+VIj1T+J9dskNV/vDQpizrbw9TtO3mZLdYUjZVIacKCOTG9oxVvWhQUXQkxww= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772265411; c=relaxed/simple; bh=1sDzeoes75xwXJ7VUGZIFhW7VWqP9FhBjTm8+3+hMtI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=o7tqODLOpis+1+Hi7MefcAhSKJJandbo80cL93c2U2SIAdYliDMxF4fmZs8Gr8fzCVof/vvbKIdUe1GsdBA0njtDD5vrua5tKnoJNVRg+aKndlLe6o9fbkOGfaCEX8dlHaHQO4kFPkcos4dGtfeFO/qgkuSqNvpSnKkw4823/u4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ty0EuTiu; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ty0EuTiu" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8B6ABC4AF09; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772265411; bh=1sDzeoes75xwXJ7VUGZIFhW7VWqP9FhBjTm8+3+hMtI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ty0EuTiuKuqBzCk7UooM0bEhZi9vQm6n+Ipb52bnkGlYc+m/8FXUf4fiWhDGpQm9C I1zCM0t32fyaBkgabNeHE5MMfZ0o2tHSCcJtrhpdOdX1jHMrHbr7CW8fsCKCFL8fe/ nYWk3VcUkcJStT8t2Qjs/Y8qrGM5xML2rjoMYw+1HyUC27aRf5/izrb1adLrLNHVs3 +eXQwJHBM1KHxBnAmpqyiU01+otwhwx7RMmkYJMMXvJVZ6JE6O8eRvlNcVaRfTZz6x /e6QAs62fAR0eB/qPkPzhIqNL2zQ3vBKIukDhBfzUAWsMbYnGy6tGiO7w+PlzPV1Ab y0Eb2PK5tFL/g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B7D3FEE4CA; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Sat, 28 Feb 2026 07:56:15 +0000 Subject: [PATCH v2 2/3] dt-bindings: serial: amlogic,meson-uart: Add compatible string for A9 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260228-a9-baisc-dts-v2-2-47489d5cc1a8@amlogic.com> References: <20260228-a9-baisc-dts-v2-0-47489d5cc1a8@amlogic.com> In-Reply-To: <20260228-a9-baisc-dts-v2-0-47489d5cc1a8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772265409; l=1065; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=GG2+tqcGh5gPHmuDgyTzLzwkbN2gsDbUKOMY7yAnDbc=; b=SdE8J/H9E6GHbGZm3hRNHAiA920OOqHG2MVxfERGdlqZ3fenopSCmEzxuw9oSbCnD+angO5Lb R+igIGF/be0DIriKSjtzT+WsJ7jsJrwrC3GW7+5FOzgq1y5LZ1vuXyQ X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Amlogic A9 SoCs uses the same UART controller as S4 SoCs. There is no need for an extra compatible line in the driver, but add A9 compatible line for documentation. Reviewed-by: Martin Blumenstingl Acked-by: Krzysztof Kozlowski Signed-off-by: Xianwei Zhao --- Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.ya= ml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml index d8ad1bb6172d..a2702319685d 100644 --- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml +++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml @@ -56,6 +56,7 @@ properties: items: - enum: - amlogic,a4-uart + - amlogic,a9-uart - amlogic,s6-uart - amlogic,s7-uart - amlogic,s7d-uart --=20 2.52.0 From nobody Sat Apr 18 12:54:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFFC3396B6F; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772265411; cv=none; b=BF14DtbaX2jxdvM7bsNPV6WEHZNyMdH9TdOpCNfA6KsAZq8hnknPgGg0OeMYZq0FOrfQT4txtsGEkREnl6MVzXpgcin+GKxaLM+ejRuaE81uiiDndtTYctRnNORYrPf5/AM7SI5oGuXIsQLJWSHqlYWfhOYD5xuv6eYRV9imqYY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772265411; c=relaxed/simple; bh=h40S+7vVYas5eS5klAqSYGKwyMJIOjQdWlgud+FPWnU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LSLRzwwmOZloeUVxz3cS16ar+zbm/4o5KzCR/04Z+pTsY6g51uHn8f0iK2k93OgvZ35EzGCCfKbNDspOr4YRpDAsE7VDbTBoM6ur45zC+eFQMnivblKwxCdTeeJaLmMycpJDwewvJxFiF02DTXTHs45cW6BI64Gj3RlBxoxvXm8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gcMoL2YO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gcMoL2YO" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9B8F2C2BCB1; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772265411; bh=h40S+7vVYas5eS5klAqSYGKwyMJIOjQdWlgud+FPWnU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=gcMoL2YOaHqplAhP+hHlyr/oa6m6zBhllYTEdP+ln+xquPWKk1bYdxUFhByzS0qNK lR5d7QbYfyLXvAIPWOzg7bCIFJSPaFIfgli+32qjv88n1yzrgk3CxmW7HNgoR3GvNi xw4LU5HRX9tdITYBFGctBwIerqKVDwgf0ZM8T1bQjaWQzgda+Lv90B9b9kdCDwTviZ AyMmt2rWh7f6ispUDNLCn8YefjQ+dDmp0Qii53bpDZ2xW6MduPkcj6c3h4MYS6BIp0 T9xFx/ia7bJGCOr42kTUcKBnaWFFOlZhQA5TOrJ4ywTIlJwoTisDCgVjdtUM+l6Xdd fs957wbM0R9vQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9178DFEE4CF; Sat, 28 Feb 2026 07:56:51 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Sat, 28 Feb 2026 07:56:16 +0000 Subject: [PATCH v2 3/3] arm64: dts: add support for A9 based Amlogic BY401 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260228-a9-baisc-dts-v2-3-47489d5cc1a8@amlogic.com> References: <20260228-a9-baisc-dts-v2-0-47489d5cc1a8@amlogic.com> In-Reply-To: <20260228-a9-baisc-dts-v2-0-47489d5cc1a8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772265409; l=5462; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=KDU+0xilnLHLEud6QxE0VeFpH70rsOteNGxypE9pTdQ=; b=ZbSTebYmeDoDL59Ur84DN0hwTOZfyfy2EN5OUpQg1QvW8f2NrLkJdhY55kfNj7rlBTgnBbCSu X85Xqnd40Q7ASZCjZpDde2xRRHby7ikWBd5iig4afR+ZlgQmTfouFz4 X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add basic support for the A9 based Amlogic BY401 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Signed-off-by: Xianwei Zhao Reviewed-by: Martin Blumenstingl --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../boot/dts/amlogic/amlogic-a9-a311y3-by401.dts | 40 +++++++ arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 129 +++++++++++++++++= ++++ 3 files changed, 170 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/aml= ogic/Makefile index 15f9c817e502..57bc440fa55c 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a4-a113l2-ba400.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a5-a113x2-av400.dtb +dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a9-a311y3-by401.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c302x-aw409.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c308l-aw419.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-s6-s905x5-bl209.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts b/arch= /arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts new file mode 100644 index 000000000000..a6b380ca47a5 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-a9.dtsi" +/ { + model =3D "Amlogic A311DY3 BY401 Development Board"; + compatible =3D "amlogic,by401", "amlogic,a9"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &uart_b; + }; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x0 0x0 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 35 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@5000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x05000000 0x0 0x2300000>; + no-map; + }; + }; +}; + +&uart_b { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a9.dtsi new file mode 100644 index 000000000000..7460e9fb3f0e --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +#include +#include +#include + +/ { + interrupt-parent =3D <&gic>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x0>; + enable-method =3D "psci"; + }; + + cpu1: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x100>; + enable-method =3D "psci"; + }; + + cpu2: cpu@200 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x200>; + enable-method =3D "psci"; + }; + + cpu3: cpu@300 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x300>; + enable-method =3D "psci"; + }; + + cpu4: cpu@400 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x400>; + enable-method =3D "psci"; + }; + + cpu5: cpu@500 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x500>; + enable-method =3D "psci"; + }; + + cpu6: cpu@600 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x600>; + enable-method =3D "psci"; + }; + + cpu7: cpu@700 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x700>; + enable-method =3D "psci"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + }; + + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + }; + + xtal: xtal-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <24000000>; + clock-output-names =3D "xtal"; + #clock-cells =3D <0>; + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + gic: interrupt-controller@ff800000 { + compatible =3D "arm,gic-v3"; + #interrupt-cells =3D <3>; + #address-cells =3D <0>; + interrupt-controller; + reg =3D <0x0 0xff800000 0 0x1000>, + <0x0 0xff840000 0 0x8000>; + interrupts =3D ; + }; + + aobus: bus@ffa00000 { + compatible =3D "simple-bus"; + reg =3D <0x0 0xffa00000 0x0 0x100000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0xffa00000 0x0 0x100000>; + + uart_b: serial@1e000 { + compatible =3D "amlogic,a9-uart", + "amlogic,meson-s4-uart"; + reg =3D <0x0 0x1e000 0x0 0x18>; + interrupts =3D ; + clocks =3D <&xtal>, <&xtal>, <&xtal>; + clock-names =3D "xtal", "pclk", "baud"; + status =3D "disabled"; + }; + }; + }; +}; + --=20 2.52.0