From nobody Thu Apr 2 23:55:37 2026 Received: from mail-43101.protonmail.ch (mail-43101.protonmail.ch [185.70.43.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98F7B36E472 for ; Fri, 27 Feb 2026 18:16:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.101 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772216163; cv=none; b=LvdU2IYWxyVa1Gar2rHmVqN0NSATu+immtPbPAr7bh3TR0R1+sBWtVPi1ANcxGZbArIUcEH8Y7u1hWkqAv3mAwKboFdz9xFInCeecb36RKO2MeAiF0/PRwSuEfdDzvHGZ19oYTpIueKiFiM4lvMDmvSbzI0XWypX18zMbL89dDY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772216163; c=relaxed/simple; bh=0+Fi1shsqkA5k9Wt5WwcpWWFptWOgmCFGdHIEqxrYE8=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PHBi5hL9WpaRme84FoqEB0gyglGP/FFt8iUm1WCxBWKnaSEwwdRgkG78iaZjY9PoVRY8bdv5P73zfFuB9tMUMh9uNeiagAptO1bhJRL5MZv6J77/sEkYVvHWvr2rfOnv9onVPeMOLeMg5Yh6UzdbtbWQZ5Zz3Wu9geFarSZEAJE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=iRCns1pQ; arc=none smtp.client-ip=185.70.43.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="iRCns1pQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1772216153; x=1772475353; bh=GYNWoyNeM61dMX+Jlp03IYq35smbPMrmiwnNODDRNgM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=iRCns1pQxEIUw84b42Lohz//YaJ7C7QUqmTO7tGYWh/R5j5jRnFY3yzJdrB1eDl04 Zyuan9c7BCA1gIT4O4YZHQwONNiG8ImT5F+Opay0qTjgqrfFZvanelEkjQrdpKAXZP m6XcslYnv28U7bDHX3eCtci53PF8B3siLdNBvqCBXLT0CtpSWzSIkJbQ1GWQ8lrSQC zRT5V2YRBrtnKPLIR2z5p7WYyFCZDGXjXUI2RE5ntoJ0326oqGnp57gMxsz62nqFkD bN9ymR5kZHgmF9BIZPPrRH5EIsCo1NUgkTM/RHWpAcSU4NAjsjoNr0kyllPRxXEdlk Me3YW6YQblRXw== Date: Fri, 27 Feb 2026 18:15:49 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek From: Harry Austen Cc: Shubhrajyoti Datta , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen , Krzysztof Kozlowski Subject: [PATCH v5 1/2] dt-bindings: clock: xilinx: add description of user monitor interrupt Message-ID: <20260227181507.19890-2-hpausten@protonmail.com> In-Reply-To: <20260227181507.19890-1-hpausten@protonmail.com> References: <20260227181507.19890-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: 4b6ac4651e9d8cd4d080f05b8b64032d3422bbe5 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This Xilinx clocking wizard IP core outputs this interrupt signal to indicate when one of the four optional user clock inputs is either stopped, overruns, underruns or glitches. This functionality was only added from version 6.0 onwards, so restrict it to particular compatible strings. Signed-off-by: Harry Austen Reviewed-by: Krzysztof Kozlowski --- v4 -> v5: Add Krzysztof's R-b tag v3 -> v4: Remove allOf and rebase, removing Krzysztof's R-b tag v2 -> v3: Add Krzysztof's R-b tag v1 -> v2: Fix binding errors by moving interrupts up front, restrict later .../bindings/clock/xlnx,clocking-wizard.yaml | 24 ++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.y= aml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml index b497c28e8094f..7688601f1f31b 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml @@ -38,6 +38,14 @@ properties: - const: clk_in1 - const: s_axi_aclk =20 + interrupts: + items: + - description: user clock monitor interrupt + + interrupt-names: + items: + - const: monitor + xlnx,static-config: $ref: /schemas/types.yaml#/definitions/flag description: @@ -66,12 +74,24 @@ required: - xlnx,speed-grade - xlnx,nr-outputs =20 +if: + properties: + compatible: + enum: + - xlnx,clocking-wizard + - xlnx,clocking-wizard-v5.2 +then: + properties: + interrupts: false + interrupt-names: false + additionalProperties: false =20 examples: - | + #include clock-controller@b0000000 { - compatible =3D "xlnx,clocking-wizard"; + compatible =3D "xlnx,clocking-wizard-v6.0"; reg =3D <0xb0000000 0x10000>; #clock-cells =3D <1>; xlnx,static-config; @@ -79,5 +99,7 @@ examples: xlnx,nr-outputs =3D <6>; clock-names =3D "clk_in1", "s_axi_aclk"; clocks =3D <&clkc 15>, <&clkc 15>; + interrupts-extended =3D <&intc 52 IRQ_TYPE_EDGE_RISING>; + interrupt-names =3D "monitor"; }; ... --=20 2.53.0 From nobody Thu Apr 2 23:55:37 2026 Received: from mail-24417.protonmail.ch (mail-24417.protonmail.ch [109.224.244.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 167D736E472; Fri, 27 Feb 2026 18:16:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772216173; cv=none; b=sEO3eJvZYGBVfIi4/6La1I/RdF930mGyR2xnywn0DtXHzFxgbh8zJCTmu17kEoKTsmPwlPcetyCKWhVF/fduz8C5h16C4CsfxLa9nxsKMBwj64L+pc519rOuUi7Cc8YFl4JO54mTe0zDbPM8uDfO+h8H7w/svf6Z2RnT0dabnhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772216173; c=relaxed/simple; bh=cz34H5f/3nIS4cZAaLwMAgTYn1RioAwZNPXp7ymY1Sw=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Gf5Nc6YWj7ZvemUZKW6fl/eDMhCwtReYXR3rFzQ8ydWRNW/iAh1FNcRcy3dlftG4QTHv9kKU/aF2gPvkR4vS5d1lb9hP+ieaKxhe++m0Pj4NHuPeNCvgU4d4u2sHAndxDiASNe6dsgX51QQRVWSE5kyk+UviM+sokDHiq+wC/vU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com; spf=pass smtp.mailfrom=protonmail.com; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b=CinSFcgl; arc=none smtp.client-ip=109.224.244.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=protonmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=protonmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=protonmail.com header.i=@protonmail.com header.b="CinSFcgl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1772216162; x=1772475362; bh=KT8q0oWYh7AAT+B1rR0Z03IGDGzEfiFTCLxE4tZSwFs=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=CinSFcglL52lw5XXwWNnIE2Lq18A2m0RH+j8Frc7vwgqlDFbczDBQWJDw0IuRpzjs 5W3i3FM6gD3lZPAGhGRq9D3DPenbLhc7xLGSzYlh6Cj/x8OpgrcyuBNMQQookg76x4 JclqGeSTF4Zn/8QlLOdEnqgitwcjHwzkKyAEHQ89baSVCHFC3sMH5F1pp43NtVKQQ1 M9kCzhb+PeSHodH9zQcgUKAPAdnTDWdy1DITVHcu8/46YYvXBbo+gzX7us4z59/nQO DvKjebFWRSBiK7w51HuUEggJNwIIQQCO1bU+KU9sXZwCPq8vjMI5f8wrKJSLYj+ggB JcmGDbORZngdg== Date: Fri, 27 Feb 2026 18:15:57 +0000 To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michal Simek From: Harry Austen Cc: Shubhrajyoti Datta , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen Subject: [PATCH v5 2/2] clk: clocking-wizard: add user clock monitor support Message-ID: <20260227181507.19890-3-hpausten@protonmail.com> In-Reply-To: <20260227181507.19890-1-hpausten@protonmail.com> References: <20260227181507.19890-1-hpausten@protonmail.com> Feedback-ID: 53116287:user:proton X-Pm-Message-ID: d86f7603c42fa73ab5332658cb0b44be36c54010 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Xilinx clocking wizard IP core supports monitoring of up to four optional user clock inputs, with a corresponding interrupt for notification in change of clock state (stop, underrun, overrun or glitch). Give userspace access to this monitor logic through use of the devcoredump framework. Use presence of the user monitor interrupt description in devicetree to indicate whether or not this functionality should be enabled. Also, this functionality is only supported from v6.0 onwards, so add indication of support to the device match data, in order to be tied to the utilised compatible string. All 16 user clock monitor trigger sources are enabled in the IER. When triggered, the values of the first 5 registers are recorded through devcoredump. Signed-off-by: Harry Austen --- v4 -> v5: Fix bug by moving dev_coredumpv() after iowrite32() v3 -> v4: Rework from auxiliary bus and UIO to devcoredump v2 -> v3: No change v1 -> v2: - Remove direct UIO dependency by utilising auxiliary device - Move some logic from probe into clk_wzrd_setup_monitor for tidiness drivers/clk/xilinx/Kconfig | 1 + drivers/clk/xilinx/clk-xlnx-clock-wizard.c | 69 ++++++++++++++++++++-- 2 files changed, 66 insertions(+), 4 deletions(-) diff --git a/drivers/clk/xilinx/Kconfig b/drivers/clk/xilinx/Kconfig index 051756953558b..37758ac9ab552 100644 --- a/drivers/clk/xilinx/Kconfig +++ b/drivers/clk/xilinx/Kconfig @@ -21,6 +21,7 @@ config COMMON_CLK_XLNX_CLKWZRD tristate "Xilinx Clocking Wizard" depends on OF depends on HAS_IOMEM + select WANT_DEV_COREDUMP help Support for the Xilinx Clocking Wizard IP core clock generator. Adds support for clocking wizard and compatible. diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xilin= x/clk-xlnx-clock-wizard.c index 4a0136349f71a..4bbe4d93e208d 100644 --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -19,11 +20,15 @@ #include #include #include +#include #include =20 #define WZRD_NUM_OUTPUTS 7 #define WZRD_ACLK_MAX_FREQ 250000000UL +#define WZRD_NUM_DUMP_REGS 5 =20 +#define WZRD_INTR_STATUS 0x0C +#define WZRD_INTR_ENABLE 0x10 #define WZRD_CLK_CFG_REG(v, n) (0x200 + 0x130 * (v) + 4 * (n)) =20 #define WZRD_CLKOUT0_FRAC_EN BIT(18) @@ -124,6 +129,7 @@ enum clk_wzrd_int_clks { /** * struct clk_wzrd - Clock wizard private data structure * + * @pdev: Platform device * @nb: Notifier block * @base: Memory base * @clk_in1: Handle to input clock 'clk_in1' @@ -131,9 +137,11 @@ enum clk_wzrd_int_clks { * @clks_internal: Internal clocks * @speed_grade: Speed grade of the device * @suspended: Flag indicating power state of the device + * @work: Delayed work for devcoredump * @clk_data: Output clock data */ struct clk_wzrd { + struct platform_device *pdev; struct notifier_block nb; void __iomem *base; struct clk *clk_in1; @@ -141,6 +149,7 @@ struct clk_wzrd { struct clk_hw *clks_internal[wzrd_clk_int_max]; unsigned int speed_grade; bool suspended; + struct delayed_work work; struct clk_hw_onecell_data clk_data; }; =20 @@ -177,8 +186,9 @@ struct clk_wzrd_divider { spinlock_t *lock; /* divider lock */ }; =20 -struct versal_clk_data { +struct clk_wzrd_data { bool is_versal; + bool has_monitor; }; =20 #define to_clk_wzrd(_nb) container_of(_nb, struct clk_wzrd, nb) @@ -984,8 +994,13 @@ static int __maybe_unused clk_wzrd_resume(struct devic= e *dev) static SIMPLE_DEV_PM_OPS(clk_wzrd_dev_pm_ops, clk_wzrd_suspend, clk_wzrd_resume); =20 -static const struct versal_clk_data versal_data =3D { +static const struct clk_wzrd_data version_6_0_data =3D { + .is_versal =3D false, + .has_monitor =3D true, +}; +static const struct clk_wzrd_data versal_data =3D { .is_versal =3D true, + .has_monitor =3D true, }; =20 static int clk_wzrd_register_output_clocks(struct device *dev, int nr_outp= uts) @@ -993,7 +1008,7 @@ static int clk_wzrd_register_output_clocks(struct devi= ce *dev, int nr_outputs) const char *clkout_name, *clk_name, *clk_mul_name; struct clk_wzrd *clk_wzrd =3D dev_get_drvdata(dev); u32 regl, regh, edge, regld, reghd, edged, div; - const struct versal_clk_data *data; + const struct clk_wzrd_data *data; unsigned long flags =3D 0; bool is_versal =3D false; void __iomem *ctrl_reg; @@ -1150,14 +1165,45 @@ static int clk_wzrd_register_output_clocks(struct d= evice *dev, int nr_outputs) return 0; } =20 +static irqreturn_t clk_wzrd_user_mon_intr_handler(int irq, void *data) +{ + struct clk_wzrd *clk_wzrd =3D platform_get_drvdata(data); + + schedule_delayed_work(&clk_wzrd->work, msecs_to_jiffies(10)); + return IRQ_HANDLED; +} + +static void clk_wzrd_user_mon_work(struct work_struct *work) +{ + struct clk_wzrd *clk_wzrd =3D container_of(work, struct clk_wzrd, work.wo= rk); + u32 *dump =3D vmalloc(WZRD_NUM_DUMP_REGS * sizeof(*dump)); + + ioread32_rep(clk_wzrd->base, dump, WZRD_NUM_DUMP_REGS); + iowrite32(dump[WZRD_INTR_STATUS / sizeof(*dump)], clk_wzrd->base + WZRD_I= NTR_STATUS); + dev_coredumpv(&clk_wzrd->pdev->dev, dump, WZRD_NUM_DUMP_REGS * sizeof(*du= mp), GFP_KERNEL); +} + +static void clk_wzrd_cancel_delayed_work(void *data) +{ + struct delayed_work *work =3D data; + + cancel_delayed_work_sync(work); +} + static int clk_wzrd_probe(struct platform_device *pdev) { + const struct clk_wzrd_data *data =3D device_get_match_data(&pdev->dev); struct device_node *np =3D pdev->dev.of_node; struct clk_wzrd *clk_wzrd; unsigned long rate; int nr_outputs; + int irq; int ret; =20 + irq =3D platform_get_irq_optional(pdev, 0); + if (irq < 0 && irq !=3D -ENXIO) + return dev_err_probe(&pdev->dev, irq, "failed to get irq\n"); + ret =3D of_property_read_u32(np, "xlnx,nr-outputs", &nr_outputs); if (ret || nr_outputs > WZRD_NUM_OUTPUTS) return -EINVAL; @@ -1226,6 +1272,21 @@ static int clk_wzrd_probe(struct platform_device *pd= ev) } } =20 + if (data && data->has_monitor && irq > 0) { + ret =3D devm_request_irq(&pdev->dev, irq, clk_wzrd_user_mon_intr_handler= , IRQF_SHARED, + "user_mon", clk_wzrd); + if (ret) + return dev_err_probe(&pdev->dev, ret, "failed to request irq\n"); + + INIT_DELAYED_WORK(&clk_wzrd->work, clk_wzrd_user_mon_work); + ret =3D devm_add_action_or_reset(&pdev->dev, clk_wzrd_cancel_delayed_wor= k, + &clk_wzrd->work); + if (ret) + return ret; + + writel(GENMASK(15, 0), clk_wzrd->base + WZRD_INTR_ENABLE); + } + return 0; } =20 @@ -1233,7 +1294,7 @@ static const struct of_device_id clk_wzrd_ids[] =3D { { .compatible =3D "xlnx,versal-clk-wizard", .data =3D &versal_data }, { .compatible =3D "xlnx,clocking-wizard" }, { .compatible =3D "xlnx,clocking-wizard-v5.2" }, - { .compatible =3D "xlnx,clocking-wizard-v6.0" }, + { .compatible =3D "xlnx,clocking-wizard-v6.0", .data =3D &version_6_0_dat= a }, { }, }; MODULE_DEVICE_TABLE(of, clk_wzrd_ids); --=20 2.53.0