From nobody Thu Apr 16 12:27:29 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24D8B362149; Fri, 27 Feb 2026 17:52:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772214725; cv=none; b=u2F6U594NET/YxG4PJ/uanQB9BnjzaDjVREeb1+e6riIbhadGzS3nPTzweq5VKE6NB8GEdFb/gfHho5NWihfL8p8ikAW95YzxZAf35h+QeCLT/zq2NAxfIl+u9GNNDqLIZWZnWJX73c6JeOfkg+NvXJslQuiJ1A/Yw8m38G5aDI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772214725; c=relaxed/simple; bh=wFLm7k88fcySk3WbqBdNrrXtxAUhx3c2WSVbqeGab6k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JtaSmFW/PT5ZcBiXOeshf0bdLdMI6rFoVX86IisJxHA/NYWn3LHGpcr+e/zVIGHC5p1zqP/YDx9tNiww1axaYniR1PWNBCxf+A1E4kZUViZvOBdk0Ghyp68Bz1LZMm8YJA3zaLWAUS6XakSLvYJmXpkq9lTOIEhpfMpGc9H2lRk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=heXXfdoP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="heXXfdoP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8E91BC19421; Fri, 27 Feb 2026 17:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772214724; bh=wFLm7k88fcySk3WbqBdNrrXtxAUhx3c2WSVbqeGab6k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=heXXfdoP5arDJG3XvK6VZxm+PHg6R8na5fMOeoSlO2E6O4YGrgRkiBriyJHTSr8bX /R86Tpaugnokera4ihUa40vBWWIz7TRrKhxpJEjvXX8flVv0QoRThSIrMEjFo2XnkC zK5CU8cebHKiUc+b9vp0ekw3EfyRtcOmiNalvLJLxg97tMNa4J0A+C+MtOaVDFmmyl N59oSqG8Zxb4UyVAw/zfertnV0JIdCcedq+fPs3k6JpO+Xf5vmc9YVZ0M9PBgvFVT0 T0FA3ylv0Rz6q2tk+pG261JRF2j9fYATOU3+hcfL+BKwB5TUGjWbpBPCrv30SkEF1D sVNE6RmUGJDXQ== Received: by wens.tw (Postfix, from userid 1000) id 1C4DE5F9D2; Sat, 28 Feb 2026 01:52:02 +0800 (CST) From: Chen-Yu Tsai To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Brown Cc: linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs Date: Sat, 28 Feb 2026 01:51:53 +0800 Message-ID: <20260227175157.2339758-2-wens@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260227175157.2339758-1-wens@kernel.org> References: <20260227175157.2339758-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support for Dual SPI and Quad SPI was added to the Linux driver in commit 0605d9fb411f ("spi: sun6i: add quirk for dual and quad SPI modes support") and commit 25453d797d7a ("spi: sun6i: add dual and quad SPI modes support for R329/D1/R528/T113s"). However the binding was never updated to allow these modes. Allow them by adding 2 and 4 to the allowed bus widths for the newer variants. While at it, also add 0 to the allowed bus widths. This signals that RX or TX is not available, i.e. the MISO or MOSI pin is disconnected. Signed-off-by: Chen-Yu Tsai Reviewed-by: Krzysztof Kozlowski --- .../bindings/spi/allwinner,sun6i-a31-spi.yaml | 31 ++++++++++++++++--- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.= yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml index a6067030c5ed..2197f65d878b 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml @@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# =20 title: Allwinner A31 SPI Controller =20 -allOf: - - $ref: spi-controller.yaml - maintainers: - Chen-Yu Tsai - Maxime Ripard @@ -82,11 +79,35 @@ patternProperties: =20 spi-rx-bus-width: items: - - const: 1 + enum: [0, 1, 2, 4] =20 spi-tx-bus-width: items: - - const: 1 + enum: [0, 1, 2, 4] + +allOf: + - $ref: spi-controller.yaml + - if: + not: + properties: + compatible: + contains: + enum: + - allwinner,sun50i-r329-spi + - allwinner,sun55i-a523-spi + then: + patternProperties: + "^.*@[0-9a-f]+": + type: object + + properties: + spi-rx-bus-width: + items: + enum: [0, 1] + + spi-tx-bus-width: + items: + enum: [0, 1] =20 required: - compatible --=20 2.47.3 From nobody Thu Apr 16 12:27:29 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24C4421D3F4; Fri, 27 Feb 2026 17:52:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772214725; cv=none; b=TP0DodEzoVWWLmQ+1DRj7Fe1lOmiNmYmlFeUSoVMW6zSyiwrzo9IaHiFCJvVDx4RwWZP49tKj+4okzmEjTQYVRvh8NS37HdHwbvQTUwkbnbS07Y05bjpuX8fEH7xuoWC+bQNjLaSQXmiLcH11tu1/QPH84sAfg7os7QfGHzoynQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772214725; c=relaxed/simple; bh=rbxhkxoFkbgVJcHFFqOrA4/4vQ1RgZNPDVV7X5oTc9I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Zeq0EwSTkdx1OaAt6vQ3qifo4VcZYkvzWP+ra8CpKGK2DuLfdpAfo7pNTUlkJmUNpHwmUOHvyeSz1IDBr9z/USBC/Dkgwe9TNlEulPiHMSd5KX8lEkKJVtSHxz2CtOYujkGnmvFIzRKtzDCD8OOSeSCO6AFPrhjtVAGp2oxoGNk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kHMUBrwN; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kHMUBrwN" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93165C2BC87; Fri, 27 Feb 2026 17:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772214724; bh=rbxhkxoFkbgVJcHFFqOrA4/4vQ1RgZNPDVV7X5oTc9I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kHMUBrwNR1dSDEPxiwjji5YgXG1sVOeJaLHndrWPf0urS20mOLrpKvNY7obAdT/YA +4Boi4EcubM28rxBW7O7AvHFWILbgVKEKQoscqgRcTUHvyYd17epCl2Xo/a0e69dBt TH87WGO7FIZ4R+WHxnBpPBTUyoyKm0XAllkbeE308cdr6UVO6ULtlHLZ7CVcaTdLP+ mahUq5LDvdf12eUSt4+yixkVbOD4L1V7CdjpTUxQQ5uX2vWiuSC3ZhXfuzSrtOvszI JXypgCvzDIbzDeYKU/KKkuwTpgWnn0VX4gAd/W4+l15X3mHZtGsI6rbB4zR4/D6ELV AQoykA5oVzAWw== Received: by wens.tw (Postfix, from userid 1000) id 23DD65FEB2; Sat, 28 Feb 2026 01:52:02 +0800 (CST) From: Chen-Yu Tsai To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Brown Cc: linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: allwinner: sun55i-a523: Add pinmux for spi0 on PJ pins Date: Sat, 28 Feb 2026 01:51:54 +0800 Message-ID: <20260227175157.2339758-3-wens@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260227175157.2339758-1-wens@kernel.org> References: <20260227175157.2339758-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Avaota A1 board uses spi0 on the PJ pins to connect a SPI NAND chip. Add the full set of pins. Even though this board doesn't use CS1, other boards may do so in the future. Signed-off-by: Chen-Yu Tsai Reviewed-by: Jernej Skrabec --- .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun55i-a523.dtsi index b8263e2872af..fbdf23e90cf7 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -245,6 +245,13 @@ spi0_pc_pins: spi0-pc-pins { allwinner,pinmux =3D <4>; }; =20 + /omit-if-no-ref/ + spi0_pj_pins: spi0-pj-pins { + pins =3D "PJ21", "PJ22", "PJ23"; + function =3D "spi0"; + allwinner,pinmux =3D <5>; + }; + /omit-if-no-ref/ spi0_cs0_pc_pin: spi0-cs0-pc-pin { pins =3D "PC3"; @@ -252,6 +259,13 @@ spi0_cs0_pc_pin: spi0-cs0-pc-pin { allwinner,pinmux =3D <4>; }; =20 + /omit-if-no-ref/ + spi0_cs0_pj_pin: spi0-cs0-pj-pin { + pins =3D "PJ20"; + function =3D "spi0"; + allwinner,pinmux =3D <5>; + }; + /omit-if-no-ref/ spi0_cs1_pc_pin: spi0-cs1-pc-pin { pins =3D "PC7"; @@ -259,6 +273,13 @@ spi0_cs1_pc_pin: spi0-cs1-pc-pin { allwinner,pinmux =3D <4>; }; =20 + /omit-if-no-ref/ + spi0_cs1_pj_pin: spi0-cs1-pj-pin { + pins =3D "PJ24"; + function =3D "spi0"; + allwinner,pinmux =3D <5>; + }; + /omit-if-no-ref/ spi0_hold_pc_pin: spi0-hold-pc-pin { /* conflicts with eMMC D7 */ @@ -267,6 +288,13 @@ spi0_hold_pc_pin: spi0-hold-pc-pin { allwinner,pinmux =3D <4>; }; =20 + /omit-if-no-ref/ + spi0_hold_pj_pin: spi0-hold-pj-pin { + pins =3D "PJ26"; + function =3D "spi0"; + allwinner,pinmux =3D <5>; + }; + /omit-if-no-ref/ spi0_wp_pc_pin: spi0-wp-pc-pin { /* conflicts with eMMC D2 */ @@ -275,6 +303,13 @@ spi0_wp_pc_pin: spi0-wp-pc-pin { allwinner,pinmux =3D <4>; }; =20 + /omit-if-no-ref/ + spi0_wp_pj_pin: spi0-wp-pj-pin { + pins =3D "PJ25"; + function =3D "spi0"; + allwinner,pinmux =3D <5>; + }; + uart0_pb_pins: uart0-pb-pins { pins =3D "PB9", "PB10"; allwinner,pinmux =3D <2>; --=20 2.47.3 From nobody Thu Apr 16 12:27:29 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24CEB36213E; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G81d3nso" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8CAF7C116C6; Fri, 27 Feb 2026 17:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772214724; bh=tKKtBVOvZWHv6aIPkC7sIoW5DK8EutIUgmSN3eswTBA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G81d3nsoIkSP4l8EnshSuzG53FbA2uBKo7cHmYqM4QAN9wBs6KEUmqrXchmKOEmeA GtIfbAnXwStm69ApGhzxRvzH/Ah+R/2n9A/UQM/0aBGnqQXEuwhJYe1SAXIx6pIEQJ araXge3dpXQ7YTPJ6aGk2YEA2t2AKgwgVGTYGdsNGufsh8aKTmV4OB2zf/ukUfSK3h AJBCxCUPnEHqgENsX/+mtyE6pykB+LDjg7cIg6l3RqB0QQQgkuNUImoHyU0Zyo7hvJ MMElxskvLzf5mAHWn8SxZIh/sztYhv69LIqUtgTtgsRxodmdaE0n6Fg8NlHACTZ9pa O+vhlqHBX1oSw== Received: by wens.tw (Postfix, from userid 1000) id 2E4965FEC0; Sat, 28 Feb 2026 01:52:02 +0800 (CST) From: Chen-Yu Tsai To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Brown Cc: linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND Date: Sat, 28 Feb 2026 01:51:55 +0800 Message-ID: <20260227175157.2339758-4-wens@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260227175157.2339758-1-wens@kernel.org> References: <20260227175157.2339758-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Avaota A1 board has a SPI NAND chip connected to spi0 on the PJ pins with support for QSPI. Enable spi0 and add a device node for the SPI NAND chip. Signed-off-by: Chen-Yu Tsai Acked-by: Jernej Skrabec --- .../boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch= /arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts index 7c24121de88f..474354fbfcec 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -403,6 +403,21 @@ &rtc { assigned-clock-rates =3D <32768>; }; =20 +&spi0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi0_pj_pins>, <&spi0_cs0_pj_pin>, + <&spi0_hold_pj_pin>, <&spi0_wp_pj_pin>; + status =3D "okay"; + + nand@0 { + compatible =3D "spi-nand"; + reg =3D <0>; + spi-max-frequency =3D <100000000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + }; +}; + &uart0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&uart0_pb_pins>; --=20 2.47.3