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Fri, 27 Feb 2026 02:24:48 -0800 (PST) Received: from hu-mchunara-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8273a0299d9sm5350234b3a.51.2026.02.27.02.24.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 02:24:48 -0800 (PST) From: Monish Chunara To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@oss.qualcomm.com, mani@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, sarthak.garg@oss.qualcomm.com, pradeep.pragallapati@oss.qualcomm.com, nitin.rawat@oss.qualcomm.com, Monish Chunara Subject: [PATCH V1 2/2] arm64: dts: qcom: lemans-evk: Add SDHCI support for eMMC via overlay Date: Fri, 27 Feb 2026 15:54:05 +0530 Message-Id: <20260227102405.2339544-3-monish.chunara@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260227102405.2339544-1-monish.chunara@oss.qualcomm.com> References: <20260227102405.2339544-1-monish.chunara@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI3MDA5MCBTYWx0ZWRfX7ZE4w/dFxQrJ F/czltRPnZA11e7qUJL9T19rnWVqx3SkvxB8wmo+BD6w1jVSczsu3IlLOXoM6V6Edq6fPO4V0cC M/QrHGcNSML3EWV23FdAEBGTK9AHRmO9+oyzHiSRSXJesb9XTJBqgiXEdmWQAZ6MH4ftl9wuGMa 2F87SbXeGMUIFThblcYbMoo8PkQTn+g1kTssVbMXmAVr6kvrI99AH4R+Y6+YSiia2y7BwXrV/J2 W4bjTtvV/JFjtdIMT5d6UsSBGhqtrNKV49yl9u1oCOI6ukYtC16kEbmjsAIGvsazYsazy8jy9dI 4MW25tsw1swvsiTMrRybmhByuiNkEowQvRDldiWCh3cagvs/L0ZeVLw6jIfkxHxQfnAkIcnDyRc r6lZQ9t+i+3rwv3KWlkTZA4LD2qag8c5Dmo0Y9RS5pEPtj1EH4jbz+AQejUM4cIo4i1NG2k/EWo Co2RDtPcGfpTcRG5b4w== X-Proofpoint-GUID: GpsqcFojJXFP_-15pqKtwrHpqDcX7FgG X-Authority-Analysis: v=2.4 cv=KZzfcAYD c=1 sm=1 tr=0 ts=69a170f2 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=m25OAOzQKwXoSehIqtIA:9 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-ORIG-GUID: GpsqcFojJXFP_-15pqKtwrHpqDcX7FgG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-27_01,2026-02-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 bulkscore=0 adultscore=0 phishscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2602270090 Content-Type: text/plain; charset="utf-8" Enable the SDHCI controller for eMMC functionality on the lemans EVK using a device tree overlay. Configure the corresponding addresse space and resources for eMMC. Signed-off-by: Monish Chunara --- arch/arm64/boot/dts/qcom/Makefile | 3 + arch/arm64/boot/dts/qcom/lemans-evk-emmc.dtso | 64 +++++++++++++++++++ arch/arm64/boot/dts/qcom/lemans.dtsi | 10 ++- 3 files changed, 74 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/lemans-evk-emmc.dtso diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index e5ea8de55df7..5f5fcbef81d4 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -35,6 +35,9 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D kaanapali-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D kaanapali-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk.dtb =20 +lemans-evk-emmc-dtbs :=3D lemans-evk.dtb lemans-evk-emmc.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-emmc.dtb + lemans-evk-sd-card-dtbs :=3D lemans-evk.dtb lemans-evk-sd-card.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-sd-card.dtb =20 diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-emmc.dtso b/arch/arm64/boo= t/dts/qcom/lemans-evk-emmc.dtso new file mode 100644 index 000000000000..52739d39a1ff --- /dev/null +++ b/arch/arm64/boot/dts/qcom/lemans-evk-emmc.dtso @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +/ { + vmmc_sdc1: regulator-l8c { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg-sdc1"; + + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + }; + + vqmmc_sdc1: regulator-s4a { + compatible =3D "regulator-fixed"; + regulator-name =3D "vqmmc-sdc1"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; +}; + +&sdhc { + vmmc-supply =3D <&vmmc_sdc1>; + vqmmc-supply =3D <&vqmmc_sdc1>; + + pinctrl-0 =3D <&sdc_default>, <&sdc_rclk>; + pinctrl-1 =3D <&sdc_sleep>, <&sdc_rclk_sleep>; + + pinctrl-names =3D "default", "sleep"; + + supports-cqe; + non-removable; + + qcom,dll-config =3D <0x000F64EC>; + max-frequency =3D <50000000>; + + bus-width =3D <8>; + no-sd; + no-sdio; + + status =3D "okay"; +}; + +&tlmm { + sdc_rclk: sdc1-rclk-state { + pins =3D "sdc1_rclk"; + bias-pull-down; + }; + + sdc_rclk_sleep: sdc1-rclk-sleep-state { + pins =3D "sdc1_rclk"; + drive-strength =3D <2>; + bias-bus-hold; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index 808827b83553..23d48f901e08 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -3953,7 +3953,9 @@ apss_tpdm2_out: endpoint { =20 sdhc: mmc@87c4000 { compatible =3D "qcom,sa8775p-sdhci", "qcom,sdhci-msm-v5"; - reg =3D <0x0 0x087c4000 0x0 0x1000>; + reg =3D <0x0 0x87C4000 0x0 0x1000>, + <0x0 0x87C5000 0x0 0x1000>; + reg-names =3D "hc", "cqhci"; =20 interrupts =3D , ; @@ -3961,9 +3963,11 @@ sdhc: mmc@87c4000 { "pwr_irq"; =20 clocks =3D <&gcc GCC_SDCC1_AHB_CLK>, - <&gcc GCC_SDCC1_APPS_CLK>; + <&gcc GCC_SDCC1_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; clock-names =3D "iface", - "core"; + "core", + "xo"; =20 interconnects =3D <&aggre1_noc MASTER_SDC QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, --=20 2.34.1