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Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , Satananda Burla , "Abhijit Ayarekar" Subject: [PATCH net v2 1/4] octeon_ep: Relocate counter updates before NAPI Date: Fri, 27 Feb 2026 09:13:57 +0000 Message-ID: <20260227091402.1773833-2-vimleshk@marvell.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260227091402.1773833-1-vimleshk@marvell.com> References: <20260227091402.1773833-1-vimleshk@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: queF7QBYG0PE8njXM4uHpRLegMlRBf7S X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI3MDA3OSBTYWx0ZWRfX4S2ODsWUBI0A UPqIeNZLkIVeFAdBHmszA0LpBYsvXaMWXcw8BIHJoJXV9D9JuMKNdniIBXcfzpHTwd9d9fC9vlu XBn9GQck56naEb5pBzEfvYsUwxGpfq9RGUUPJ5kQXMBD3+6BjoqnSY1jUpGNzU1aI8fjy6mt14e jIwR3joApwOkWwoqLVJz4Tu+58xxzGzQwmdEaXfP5q/WHqpPKPkyzXahVnaSpevpNDbpIAhCi2/ u6D0LHyMaC+nKvRyZRo4ipZtvjHvrozwUylVRzyD7lPrwHLADhECVyEAvFgOeyMZT85Q4biLN5b /QfAY53B9or/kfd46ASFBtg5Epn02VhhyBqjBE/vVqL0qUwcY1SHGbyRGRGITQSzFiuJA7WMeIW LWdIelc/l45+WlerjGbcE0Xgwm0yS3brL4FZkPdmBhoVBdcWVMnAMHM5DnzXMllL0FqUimE05/5 Hs+76/VLd3OtBGStPdw== X-Proofpoint-GUID: queF7QBYG0PE8njXM4uHpRLegMlRBf7S X-Authority-Analysis: v=2.4 cv=f7JFxeyM c=1 sm=1 tr=0 ts=69a16062 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=qit2iCtTFQkLgVSMPQTB:22 a=M5GUcnROAAAA:8 a=l8fbD5RvBbpoYuFOKEoA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-27_01,2026-02-26_01,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Relocate IQ/OQ IN/OUT_CNTS updates to occur before NAPI completion, and replace napi_complete with napi_complete_done. Moving the IQ/OQ counter updates before napi_complete_done ensures 1. Counter registers are updated before re-enabling interrupts. 2. Prevents a race where new packets arrive but counters aren't properly synchronized. napi_complete_done (vs napi_complete) allows for better interrupt coalescing. Fixes: 37d79d0596062 ("octeon_ep: add Tx/Rx processing and interrupt suppor= t") Signed-off-by: Sathesh Edara Signed-off-by: Shinas Rasheed Signed-off-by: Vimlesh Kumar --- .../ethernet/marvell/octeon_ep/octep_main.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_main.c b/drivers/= net/ethernet/marvell/octeon_ep/octep_main.c index bcea3fc26a8c..a93c3c9994c2 100644 --- a/drivers/net/ethernet/marvell/octeon_ep/octep_main.c +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_main.c @@ -555,12 +555,12 @@ static void octep_clean_irqs(struct octep_device *oct) } =20 /** - * octep_enable_ioq_irq() - Enable MSI-x interrupt of a Tx/Rx queue. + * octep_update_pkt() - Update IQ/OQ IN/OUT_CNT registers. * * @iq: Octeon Tx queue data structure. * @oq: Octeon Rx queue data structure. */ -static void octep_enable_ioq_irq(struct octep_iq *iq, struct octep_oq *oq) +static void octep_update_pkt(struct octep_iq *iq, struct octep_oq *oq) { u32 pkts_pend =3D oq->pkts_pending; =20 @@ -576,7 +576,17 @@ static void octep_enable_ioq_irq(struct octep_iq *iq, = struct octep_oq *oq) } =20 /* Flush the previous wrties before writing to RESEND bit */ - wmb(); + smp_wmb(); +} + +/** + * octep_enable_ioq_irq() - Enable MSI-x interrupt of a Tx/Rx queue. + * + * @iq: Octeon Tx queue data structure. + * @oq: Octeon Rx queue data structure. + */ +static void octep_enable_ioq_irq(struct octep_iq *iq, struct octep_oq *oq) +{ writeq(1UL << OCTEP_OQ_INTR_RESEND_BIT, oq->pkts_sent_reg); writeq(1UL << OCTEP_IQ_INTR_RESEND_BIT, iq->inst_cnt_reg); } @@ -602,7 +612,8 @@ static int octep_napi_poll(struct napi_struct *napi, in= t budget) if (tx_pending || rx_done >=3D budget) return budget; =20 - napi_complete(napi); + octep_update_pkt(ioq_vector->iq, ioq_vector->oq); + napi_complete_done(napi, rx_done); octep_enable_ioq_irq(ioq_vector->iq, ioq_vector->oq); return rx_done; } --=20 2.47.3 From nobody Thu Apr 2 19:00:20 2026 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21DE32DD60F; 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Fri, 27 Feb 2026 01:14:14 -0800 (PST) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.25; Fri, 27 Feb 2026 01:14:12 -0800 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend Transport; Fri, 27 Feb 2026 01:14:12 -0800 Received: from 101hsapphire1.sclab.marvell.com (unknown [10.111.168.47]) by maili.marvell.com (Postfix) with ESMTP id 3609E3F705E; Fri, 27 Feb 2026 01:14:12 -0800 (PST) From: Vimlesh Kumar To: , CC: , , , "Vimlesh Kumar" , Veerasenareddy Burru , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , "Paolo Abeni" , Abhijit Ayarekar , Satananda Burla Subject: [PATCH net v2 2/4] octeon_ep: avoid compiler and IQ/OQ reordering Date: Fri, 27 Feb 2026 09:13:58 +0000 Message-ID: <20260227091402.1773833-3-vimleshk@marvell.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260227091402.1773833-1-vimleshk@marvell.com> References: <20260227091402.1773833-1-vimleshk@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=Y6H1cxeN c=1 sm=1 tr=0 ts=69a16066 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=VwQbUJbxAAAA:8 a=M5GUcnROAAAA:8 a=OZLdTvkJ1xrx5OaBTMEA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-ORIG-GUID: qUZVOHdPHjkZcCaYEbeO464eb0svZdba X-Proofpoint-GUID: qUZVOHdPHjkZcCaYEbeO464eb0svZdba X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI3MDA3OSBTYWx0ZWRfX2r/A8O7azJrG 8hCVrO4ofWDHIJZyM6el0ehgY1joH/pjeg3v6pOmYQYKYVBK7inwxKFC79JhStISrteOFZwDFo7 hL4QEgl1gcoA1Z16UsTUdnoyv2mr9GBTCUljd7rHrwWu7efCzv+tUk5ZLkjl4TFR7ko7GsSqjgy t4E38e8zWkM0h7u0xllJYFlABGd9N0/4WeeGFQmF1CmZ81nyKLk97aGPR4XFy1xR7qtRDcI4V4P miNgKShVPo0BJR4e8f3dUmpujtkzfAfp4AgJDWtSc4YGQZWQl/M0y1a4ucy/IuEBtBjqXYon5Ab HGTyby2MBSdcuOw+Ls5+mqjRF/lZ1JesdjTbpbznkytniaQdk9yEIDBN8hzAGXZcymiRDj5yqvT rs4eL3WYjIvL6EcRfw8MqNxih0d4j52uT/7wg2PulOMCokRnmtoIw4K3m4GcPFBpdyKZQn1lqmx wUjhI8mj4whHbqh1kEA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-27_01,2026-02-26_01,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Utilize READ_ONCE and WRITE_ONCE APIs for IO queue Tx/Rx variable access to prevent compiler optimization and reordering. Additionally, ensure IO queue OUT/IN_CNT registers are flushed by performing a read-back after writing. The compiler could reorder reads/writes to pkts_pending, last_pkt_count, etc., causing stale values to be used when calculating packets to process or register updates to send to hardware. The Octeon hardware requires a read-back after writing to OUT_CNT/IN_CNT registers to ensure the write has been flushed through any posted write buffers before the interrupt resend bit is set. Without this, we have observed cases where the hardware didn't properly update its internal state. wmb/rmb only provides ordering guarantees but doesn't prevent the compiler from performing optimizations like caching in registers, load tearing etc. Fixes: 37d79d0596062 ("octeon_ep: add Tx/Rx processing and interrupt suppor= t") Signed-off-by: Sathesh Edara Signed-off-by: Shinas Rasheed Signed-off-by: Vimlesh Kumar --- V1: https://lore.kernel.org/all/20260212121634.360252-2-vimleshk@marvell.co= m/ .../ethernet/marvell/octeon_ep/octep_main.c | 21 +++++++++------ .../net/ethernet/marvell/octeon_ep/octep_rx.c | 27 +++++++++++++------ 2 files changed, 32 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_main.c b/drivers/= net/ethernet/marvell/octeon_ep/octep_main.c index a93c3c9994c2..ccfb248d0914 100644 --- a/drivers/net/ethernet/marvell/octeon_ep/octep_main.c +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_main.c @@ -562,17 +562,22 @@ static void octep_clean_irqs(struct octep_device *oct) */ static void octep_update_pkt(struct octep_iq *iq, struct octep_oq *oq) { - u32 pkts_pend =3D oq->pkts_pending; + u32 pkts_pend =3D READ_ONCE(oq->pkts_pending); + u32 last_pkt_count =3D READ_ONCE(oq->last_pkt_count); + u32 pkts_processed =3D READ_ONCE(iq->pkts_processed); + u32 pkt_in_done =3D READ_ONCE(iq->pkt_in_done); =20 netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no); - if (iq->pkts_processed) { - writel(iq->pkts_processed, iq->inst_cnt_reg); - iq->pkt_in_done -=3D iq->pkts_processed; - iq->pkts_processed =3D 0; + if (pkts_processed) { + writel(pkts_processed, iq->inst_cnt_reg); + readl(iq->inst_cnt_reg); + WRITE_ONCE(iq->pkt_in_done, (pkt_in_done - pkts_processed)); + WRITE_ONCE(iq->pkts_processed, 0); } - if (oq->last_pkt_count - pkts_pend) { - writel(oq->last_pkt_count - pkts_pend, oq->pkts_sent_reg); - oq->last_pkt_count =3D pkts_pend; + if (last_pkt_count - pkts_pend) { + writel(last_pkt_count - pkts_pend, oq->pkts_sent_reg); + readl(oq->pkts_sent_reg); + WRITE_ONCE(oq->last_pkt_count, pkts_pend); } =20 /* Flush the previous wrties before writing to RESEND bit */ diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c b/drivers/ne= t/ethernet/marvell/octeon_ep/octep_rx.c index 82b6b19e76b4..11f1b45d0f92 100644 --- a/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c @@ -318,10 +318,16 @@ static int octep_oq_check_hw_for_pkts(struct octep_de= vice *oct, struct octep_oq *oq) { u32 pkt_count, new_pkts; + u32 last_pkt_count, pkts_pending; =20 pkt_count =3D readl(oq->pkts_sent_reg); - new_pkts =3D pkt_count - oq->last_pkt_count; + last_pkt_count =3D READ_ONCE(oq->last_pkt_count); + new_pkts =3D pkt_count - last_pkt_count; =20 + if (pkt_count < last_pkt_count) { + dev_err(oq->dev, "OQ-%u pkt_count(%u) < oq->last_pkt_count(%u)\n", + oq->q_no, pkt_count, last_pkt_count); + } /* Clear the hardware packets counter register if the rx queue is * being processed continuously with-in a single interrupt and * reached half its max value. @@ -332,8 +338,9 @@ static int octep_oq_check_hw_for_pkts(struct octep_devi= ce *oct, pkt_count =3D readl(oq->pkts_sent_reg); new_pkts +=3D pkt_count; } - oq->last_pkt_count =3D pkt_count; - oq->pkts_pending +=3D new_pkts; + WRITE_ONCE(oq->last_pkt_count, pkt_count); + pkts_pending =3D READ_ONCE(oq->pkts_pending); + WRITE_ONCE(oq->pkts_pending, (pkts_pending + new_pkts)); return new_pkts; } =20 @@ -408,7 +415,7 @@ static int __octep_oq_process_rx(struct octep_device *o= ct, u16 rx_ol_flags; u32 read_idx; =20 - read_idx =3D oq->host_read_idx; + read_idx =3D READ_ONCE(oq->host_read_idx); rx_bytes =3D 0; desc_used =3D 0; for (pkt =3D 0; pkt < pkts_to_process; pkt++) { @@ -493,7 +500,7 @@ static int __octep_oq_process_rx(struct octep_device *o= ct, napi_gro_receive(oq->napi, skb); } =20 - oq->host_read_idx =3D read_idx; + WRITE_ONCE(oq->host_read_idx, read_idx); oq->refill_count +=3D desc_used; oq->stats->packets +=3D pkt; oq->stats->bytes +=3D rx_bytes; @@ -516,22 +523,26 @@ int octep_oq_process_rx(struct octep_oq *oq, int budg= et) { u32 pkts_available, pkts_processed, total_pkts_processed; struct octep_device *oct =3D oq->octep_dev; + u32 pkts_pending; =20 pkts_available =3D 0; pkts_processed =3D 0; total_pkts_processed =3D 0; while (total_pkts_processed < budget) { /* update pending count only when current one exhausted */ - if (oq->pkts_pending =3D=3D 0) + pkts_pending =3D READ_ONCE(oq->pkts_pending); + if (pkts_pending =3D=3D 0) octep_oq_check_hw_for_pkts(oct, oq); + pkts_pending =3D READ_ONCE(oq->pkts_pending); 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Subject: [PATCH net v2 3/4] octeon_ep_vf: Relocate counter updates before NAPI Date: Fri, 27 Feb 2026 09:13:59 +0000 Message-ID: <20260227091402.1773833-4-vimleshk@marvell.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260227091402.1773833-1-vimleshk@marvell.com> References: <20260227091402.1773833-1-vimleshk@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: 68xEKrNVg6vqEA5VjOGCqnzosQQqHrrl X-Proofpoint-ORIG-GUID: 68xEKrNVg6vqEA5VjOGCqnzosQQqHrrl X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI3MDA3OSBTYWx0ZWRfX+srhLAQ/aRRi IDB585ZrimtU77h7n/w96mewOttaXsS6W7T3WbSi+WkrLs/GBDE9zgGKT0G+f87Ados+LRqmkub 3nFRanUrFU9R2kVRqNRNvHiafNzm72fbDAJJ4qsfudfxOv8cx+nADkxOS3/IfpdtkuZrqmM7CZd ioGcyJB8U+jPisgmZUicpH3e8o57bBVuoWtWMU9j1VmSuLqQW7wTIokUzD7c4cOQUqeRVISU+9m XoIyNsuz1bwCXH5w9Mf6+rgJQ9iykoFsFCBoEziumTXw6NpO1t3cQeuuu22ZJ2hW7pgBRECkw61 YPaYWGrm/y7Ep3ex/ikwh6b4k1f7tgVIWxJHQ2A6lU4VKT6yHuX9Alu9dSpdx8aEMM2Khnj1PcH kfXcS7QQ6MKL2jiE085uCWIiMH3qp76bqIUkd5cyU9H3np7H2Tj7qNuYWP4NbLrKO+e4bJ7BYHs pO14LTsF/kQi5Sp3ipg== X-Authority-Analysis: v=2.4 cv=B/S0EetM c=1 sm=1 tr=0 ts=69a16069 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=QXcCYyLzdtTjyudCfB6f:22 a=M5GUcnROAAAA:8 a=2r72hCCS2uxvEu3KRW0A:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-27_01,2026-02-26_01,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Relocate IQ/OQ IN/OUT_CNTS updates to occur before NAPI completion. Moving the IQ/OQ counter updates before napi_complete_done ensures 1. Counter registers are updated before re-enabling interrupts. 2. Prevents a race where new packets arrive but counters aren't properly synchronized. Fixes: 1cd3b407977c3 ("octeon_ep_vf: add Tx/Rx processing and interrupt sup= port") Signed-off-by: Sathesh Edara Signed-off-by: Shinas Rasheed Signed-off-by: Vimlesh Kumar --- .../marvell/octeon_ep_vf/octep_vf_main.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c b/dr= ivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c index 420c3f4cf741..e113c846f9d1 100644 --- a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c +++ b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c @@ -286,12 +286,13 @@ static void octep_vf_clean_irqs(struct octep_vf_devic= e *oct) } =20 /** - * octep_vf_enable_ioq_irq() - Enable MSI-x interrupt of a Tx/Rx queue. + * octep_vf_update_pkt() - Update IQ/OQ IN/OUT_CNT registers. * * @iq: Octeon Tx queue data structure. * @oq: Octeon Rx queue data structure. */ -static void octep_vf_enable_ioq_irq(struct octep_vf_iq *iq, struct octep_v= f_oq *oq) + +static void octep_vf_update_pkt(struct octep_vf_iq *iq, struct octep_vf_oq= *oq) { u32 pkts_pend =3D oq->pkts_pending; =20 @@ -308,6 +309,17 @@ static void octep_vf_enable_ioq_irq(struct octep_vf_iq= *iq, struct octep_vf_oq * =20 /* Flush the previous wrties before writing to RESEND bit */ smp_wmb(); +} + +/** + * octep_vf_enable_ioq_irq() - Enable MSI-x interrupt of a Tx/Rx queue. + * + * @iq: Octeon Tx queue data structure. + * @oq: Octeon Rx queue data structure. + */ +static void octep_vf_enable_ioq_irq(struct octep_vf_iq *iq, + struct octep_vf_oq *oq) +{ writeq(1UL << OCTEP_VF_OQ_INTR_RESEND_BIT, oq->pkts_sent_reg); writeq(1UL << OCTEP_VF_IQ_INTR_RESEND_BIT, iq->inst_cnt_reg); } @@ -333,6 +345,7 @@ static int octep_vf_napi_poll(struct napi_struct *napi,= int budget) if (tx_pending || rx_done >=3D budget) return budget; =20 + octep_vf_update_pkt(ioq_vector->iq, ioq_vector->oq); if (likely(napi_complete_done(napi, rx_done))) octep_vf_enable_ioq_irq(ioq_vector->iq, ioq_vector->oq); =20 --=20 2.47.3 From nobody Thu Apr 2 19:00:20 2026 Received: from mx0a-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 117B93ACEE3; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Subject: [PATCH net v2 4/4] octeon_ep_vf: avoid compiler and IQ/OQ reordering Date: Fri, 27 Feb 2026 09:14:00 +0000 Message-ID: <20260227091402.1773833-5-vimleshk@marvell.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260227091402.1773833-1-vimleshk@marvell.com> References: <20260227091402.1773833-1-vimleshk@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: -FAlnb9fNyZ0nokk1QrsdHLu7m3YK0IH X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI3MDA3OSBTYWx0ZWRfX3LxRzh2SIrkI 92Ul8YiyC1GLHPPYVbLkL1pQyt45txa/VkQNxXhOoEirimrETzm91+rOuufQghC62KnDk7TUnAP qvjn1fp+GlUP3KfRmshJG5l0Bn4vk/sT+rW9y3ddlp513f097lQDxceE4k6dtPTt3VbdPZRmxPA Qmj6shlOepWJxL+wOyEjPRTAedA7tFxLPk1TXP8QqHU3oCM+eltPgkPGkNjIxZK1bUcV9IQDnyy kHAn8dETbevXX8ag8C6Vigg5yUEifV4R7LZX5QJ3q2BI1HDVSHdrU9u9z5hcvPoJoaoutveaia+ bgsq7sbiI45Oh9mnVsk+jGJRAlMo1g3TeipyIhgaNo061UjO3uHY70tZ6Oiy90dTjwnZNMwdxo3 0ooA9tsKEAEE2h5lFXVc/CJfTkG3Ez0lgA3Zpq04OB41Be9kQdNKIhiOpa0q0X1jwEKLvC2pY+Z QjoHleKEpZSUAaV2mUg== X-Proofpoint-ORIG-GUID: -FAlnb9fNyZ0nokk1QrsdHLu7m3YK0IH X-Authority-Analysis: v=2.4 cv=WYMBqkhX c=1 sm=1 tr=0 ts=69a1606d cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=TtqV-g6YmW1Jfm2GSLaY:22 a=VwQbUJbxAAAA:8 a=M5GUcnROAAAA:8 a=eIslcybm3wAIAy_GHo8A:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-27_01,2026-02-26_01,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Utilize READ_ONCE and WRITE_ONCE APIs for IO queue Tx/Rx variable access to prevent compiler optimization and reordering. Additionally, ensure IO queue OUT/IN_CNT registers are flushed by performing a read-back after writing. The compiler could reorder reads/writes to pkts_pending, last_pkt_count, etc., causing stale values to be used when calculating packets to process or register updates to send to hardware. The Octeon hardware requires a read-back after writing to OUT_CNT/IN_CNT registers to ensure the write has been flushed through any posted write buffers before the interrupt resend bit is set. Without this, we have observed cases where the hardware didn't properly update its internal state. wmb/rmb only provides ordering guarantees but doesn't prevent the compiler from performing optimizations like caching in registers, load tearing etc. Fixes: 1cd3b407977c3 ("octeon_ep_vf: add Tx/Rx processing and interrupt sup= port") Signed-off-by: Sathesh Edara Signed-off-by: Shinas Rasheed Signed-off-by: Vimlesh Kumar --- V1: https://lore.kernel.org/all/20260212121634.360252-3-vimleshk@marvell.co= m/=20 .../marvell/octeon_ep_vf/octep_vf_main.c | 21 ++++++++------ .../marvell/octeon_ep_vf/octep_vf_rx.c | 28 +++++++++++++------ 2 files changed, 33 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c b/dr= ivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c index e113c846f9d1..27a5fc38bccb 100644 --- a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c +++ b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c @@ -294,17 +294,22 @@ static void octep_vf_clean_irqs(struct octep_vf_devic= e *oct) =20 static void octep_vf_update_pkt(struct octep_vf_iq *iq, struct octep_vf_oq= *oq) { - u32 pkts_pend =3D oq->pkts_pending; + u32 pkts_pend =3D READ_ONCE(oq->pkts_pending); + u32 last_pkt_count =3D READ_ONCE(oq->last_pkt_count); + u32 pkts_processed =3D READ_ONCE(iq->pkts_processed); + u32 pkt_in_done =3D READ_ONCE(iq->pkt_in_done); =20 netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no); - if (iq->pkts_processed) { - writel(iq->pkts_processed, iq->inst_cnt_reg); - iq->pkt_in_done -=3D iq->pkts_processed; - iq->pkts_processed =3D 0; + if (pkts_processed) { + writel(pkts_processed, iq->inst_cnt_reg); + readl(iq->inst_cnt_reg); + WRITE_ONCE(iq->pkt_in_done, (pkt_in_done - pkts_processed)); + WRITE_ONCE(iq->pkts_processed, 0); } - if (oq->last_pkt_count - pkts_pend) { - writel(oq->last_pkt_count - pkts_pend, oq->pkts_sent_reg); - oq->last_pkt_count =3D pkts_pend; + if (last_pkt_count - pkts_pend) { + writel(last_pkt_count - pkts_pend, oq->pkts_sent_reg); + readl(oq->pkts_sent_reg); + WRITE_ONCE(oq->last_pkt_count, pkts_pend); } =20 /* Flush the previous wrties before writing to RESEND bit */ diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c b/driv= ers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c index d70c8be3cfc4..31380962c212 100644 --- a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c +++ b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c @@ -319,9 +319,16 @@ static int octep_vf_oq_check_hw_for_pkts(struct octep_= vf_device *oct, struct octep_vf_oq *oq) { u32 pkt_count, new_pkts; + u32 last_pkt_count, pkts_pending; =20 pkt_count =3D readl(oq->pkts_sent_reg); - new_pkts =3D pkt_count - oq->last_pkt_count; + last_pkt_count =3D READ_ONCE(oq->last_pkt_count); + new_pkts =3D pkt_count - last_pkt_count; + + if (pkt_count < last_pkt_count) { + dev_err(oq->dev, "OQ-%u pkt_count(%u) < oq->last_pkt_count(%u)\n", + oq->q_no, pkt_count, last_pkt_count); + } =20 /* Clear the hardware packets counter register if the rx queue is * being processed continuously with-in a single interrupt and @@ -333,8 +340,9 @@ static int octep_vf_oq_check_hw_for_pkts(struct octep_v= f_device *oct, pkt_count =3D readl(oq->pkts_sent_reg); new_pkts +=3D pkt_count; } - oq->last_pkt_count =3D pkt_count; - oq->pkts_pending +=3D new_pkts; + WRITE_ONCE(oq->last_pkt_count, pkt_count); + pkts_pending =3D READ_ONCE(oq->pkts_pending); + WRITE_ONCE(oq->pkts_pending, (pkts_pending + new_pkts)); return new_pkts; } =20 @@ -363,7 +371,7 @@ static int __octep_vf_oq_process_rx(struct octep_vf_dev= ice *oct, struct sk_buff *skb; u32 read_idx; =20 - read_idx =3D oq->host_read_idx; + read_idx =3D READ_ONCE(oq->host_read_idx); rx_bytes =3D 0; desc_used =3D 0; for (pkt =3D 0; pkt < pkts_to_process; pkt++) { @@ -457,7 +465,7 @@ static int __octep_vf_oq_process_rx(struct octep_vf_dev= ice *oct, napi_gro_receive(oq->napi, skb); } =20 - oq->host_read_idx =3D read_idx; + WRITE_ONCE(oq->host_read_idx, read_idx); oq->refill_count +=3D desc_used; oq->stats->packets +=3D pkt; oq->stats->bytes +=3D rx_bytes; @@ -480,22 +488,26 @@ int octep_vf_oq_process_rx(struct octep_vf_oq *oq, in= t budget) { u32 pkts_available, pkts_processed, total_pkts_processed; struct octep_vf_device *oct =3D oq->octep_vf_dev; + u32 pkts_pending; =20 pkts_available =3D 0; pkts_processed =3D 0; total_pkts_processed =3D 0; while (total_pkts_processed < budget) { /* update pending count only when current one exhausted */ - if (oq->pkts_pending =3D=3D 0) + pkts_pending =3D READ_ONCE(oq->pkts_pending); + if (pkts_pending =3D=3D 0) octep_vf_oq_check_hw_for_pkts(oct, oq); + pkts_pending =3D READ_ONCE(oq->pkts_pending); pkts_available =3D min(budget - total_pkts_processed, - oq->pkts_pending); + pkts_pending); if (!pkts_available) break; =20 pkts_processed =3D __octep_vf_oq_process_rx(oct, oq, pkts_available); - oq->pkts_pending -=3D pkts_processed; + pkts_pending =3D READ_ONCE(oq->pkts_pending); + WRITE_ONCE(oq->pkts_pending, (pkts_pending - pkts_processed)); total_pkts_processed +=3D pkts_processed; } =20 --=20 2.47.3