From nobody Thu Apr 9 12:06:54 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B1A529B8C7; Fri, 27 Feb 2026 07:20:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772176830; cv=none; b=eJp9F422JzWFp7vyPvo7MuHI/b0rlwKWWQiIl4YwWS6AeIMe0QAWmgECndEnZEwng9vTkdRno+5puQhJ/euF4DDefPZvPJ3kujm/CZqzdMNuI1y9UgiBRF72PBtEgm9OfBnvZv/q2Kq4KJPv84sxXLRMSSZeIYq+sFkpj6RaMpw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772176830; c=relaxed/simple; bh=5LqXlDaWAq/8TXIbV3fX9rXHaDbI2PpJbWwGZMlzwgo=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=OOjlTsmFPfU17giXVLWeL/H4PuTzQRlOBwgtOwYnhHNDGhTK5SMpEuioh/MWBrU6jNkqI22n+TyRmjewSvQRIpM0atS+QQuA6olSvKs2aKiGB/XCsiWsNKfyKazJ5RRosqOSNaORLvFFj3lH5CKOQ5IG0LqmQnNHVTNdErNirmw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lvZmSE6t; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lvZmSE6t" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4A373C116C6; Fri, 27 Feb 2026 07:20:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772176830; bh=5LqXlDaWAq/8TXIbV3fX9rXHaDbI2PpJbWwGZMlzwgo=; h=From:To:Cc:Subject:Date:From; b=lvZmSE6tZPcbwCNO9WASZPlQL6JlNsetEr8mr8bhA49BTuArozEnb5Gw3TDsNLIBT FfF3RNroSlpnPD/Gbso4NEhtFacR0EZx1GvEQCm0T00OUFebCaF7knjKu8P2lC29Ps wRI18VYb+AvshyaTXJmnWG22nNi7hLcUyWATIKXD3ciYbCSQkkLJh6/TeLOafqBflw GQp/xVGQkLhmjmvlOybOY2Uwfd4/gn6mZnltDKR/jj3KG/XMSGP13pLb9AtlNsMHTN MDMDZWffexJSr4HWbEz98ZxioRyW2J5xmo0OoGx5QbriBlKAMvowECSLVA+rnU/SFo xPRwOJUVWW6Gg== From: Shawn Guo To: Wei Xu Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo , stable@vger.kernel.org Subject: [PATCH] arm64: dts: hisilicon: poplar: Correct PCIe reset GPIO polarity Date: Fri, 27 Feb 2026 15:19:58 +0800 Message-ID: <20260227071958.1350024-1-shawnguo@kernel.org> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The PCIe reset GPIO on Poplar is actually active low. The active high worked before because kernel driver didn't respect the setting from DT. This is changed since commit 1d26a55fbeb9 ("PCI: histb: Switch to using gpiod API"), and thus PCIe on Poplar got brken since then. Fix the problem by correcting the polarity. Fixes: 32fa01761bd9 ("arm64: dts: hi3798cv200: enable PCIe support for popl= ar board") Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts b/arch/ar= m64/boot/dts/hisilicon/hi3798cv200-poplar.dts index 7d370dac4c85..579d55daa7d0 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts @@ -179,7 +179,7 @@ &ohci { }; =20 &pcie { - reset-gpios =3D <&gpio4 4 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&gpio4 4 GPIO_ACTIVE_LOW>; vpcie-supply =3D <®_pcie>; status =3D "okay"; }; --=20 2.47.3